Xiaoqing Wen

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 9,696,377
- Issue date Jul 4, 2017
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT method for detecting or locating crossing cloc...
- Patent number 9,678,156
- Issue date Jun 13, 2017
- SYNTEST TECHNOLOGIES, INC.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,316,688
- Issue date Apr 19, 2016
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,274,168
- Issue date Mar 1, 2016
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,091,730
- Issue date Jul 28, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 8,775,985
- Issue date Jul 8, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 8,543,950
- Issue date Sep 24, 2013
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 8,219,945
- Issue date Jul 10, 2012
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for unifying self-test with scan-test during p...
- Patent number 7,945,830
- Issue date May 17, 2011
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for scan-based integrated circuits
- Patent number 7,904,773
- Issue date Mar 8, 2011
- Syntest Technologies, Inc.
- Laung-Terng (L. T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 7,779,323
- Issue date Aug 17, 2010
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for unifying self-test with scan-test during p...
- Patent number 7,747,920
- Issue date Jun 29, 2010
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mask network design for scan-based integrated circuits
- Patent number 7,735,049
- Issue date Jun 8, 2010
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 7,721,173
- Issue date May 18, 2010
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 7,552,373
- Issue date Jun 23, 2009
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for shifting at-speed scan patterns in a scan-...
- Patent number 7,512,851
- Issue date Mar 31, 2009
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for scan-based integrated circuits
- Patent number 7,451,371
- Issue date Nov 11, 2008
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for unifying self-test with scan-test during p...
- Patent number 7,444,567
- Issue date Oct 28, 2008
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 7,412,672
- Issue date Aug 12, 2008
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 7,331,032
- Issue date Feb 12, 2008
- Syntest Technologies, Inc.
- Laung-Terng (L. -T.) Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for diagnosing failures in an integrated circu...
- Patent number 7,284,175
- Issue date Oct 16, 2007
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 7,260,756
- Issue date Aug 21, 2007
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for diagnosing failures in an integrated circu...
- Patent number 7,191,373
- Issue date Mar 13, 2007
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Smart capture for ATPG (automatic test pattern generation) and faul...
- Patent number 7,124,342
- Issue date Oct 17, 2006
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for debug, diagnosis, and yield improvement of...
- Patent number 7,058,869
- Issue date Jun 6, 2006
- Syntest Technologies, Inc.
- Khader S. Abdel-Hafez
- G01 - MEASURING TESTING
Information Patent Grant
Mask network design for scan-based integrated circuits
- Patent number 7,032,148
- Issue date Apr 18, 2006
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 7,007,213
- Issue date Feb 28, 2006
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 6,957,403
- Issue date Oct 18, 2005
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-capture DFT system for scan-based integrated circuits
- Patent number 6,954,887
- Issue date Oct 11, 2005
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE-CAPTURE DFT METHOD FOR DETECTING OR LOCATING CROSSING CLOC...
- Publication number 20160131707
- Publication date May 12, 2016
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...
- Publication number 20130305200
- Publication date Nov 14, 2013
- Laung-Terng WANG
- G01 - MEASURING TESTING
Information Patent Application
COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...
- Publication number 20120246604
- Publication date Sep 27, 2012
- Syntest Technologies, Inc.
- Laung-Terng (L. -T.) WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...
- Publication number 20110197171
- Publication date Aug 11, 2011
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unifying Self-Test with Scan-Test During P...
- Publication number 20100218062
- Publication date Aug 26, 2010
- Laung-Terng (L.-T.) WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR BROADCASTING SCAN PATTERNS IN A SCAN-BASED...
- Publication number 20090235132
- Publication date Sep 17, 2009
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Multiple-capture DFT system for detecting or locating crossing cloc...
- Publication number 20090132880
- Publication date May 21, 2009
- Syntest Technologies, Inc.
- Laung-Terng (L.- T.) Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple-Capture DFT system for scan-based integrated circuits
- Publication number 20090070646
- Publication date Mar 12, 2009
- Syntest Technologies, Inc.
- Laung-Terng (L.T.) Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for unifying self-test with scan-test during p...
- Publication number 20090037786
- Publication date Feb 5, 2009
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for broadcasting scan patterns in a scan-based...
- Publication number 20080276141
- Publication date Nov 6, 2008
- Syntest Technologies Inc.
- Laung-Terng(L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for diagnosing failures in an integrated circu...
- Publication number 20070168803
- Publication date Jul 19, 2007
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Mask network design for scan-based integrated circuits
- Publication number 20060156122
- Publication date Jul 13, 2006
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Smart capture for ATPG (automatic test pattern generation) and faul...
- Publication number 20050262409
- Publication date Nov 24, 2005
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Multiple-capture DFT system for scan-based integrated circuits
- Publication number 20050235186
- Publication date Oct 20, 2005
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Computer-aided design system to automate scan synthesis at register...
- Publication number 20050229123
- Publication date Oct 13, 2005
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mask network design for scan-based integrated circuits
- Publication number 20050060625
- Publication date Mar 17, 2005
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for shifting at-speed scan patterns in a scan-...
- Publication number 20050055617
- Publication date Mar 10, 2005
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for unifying self-test with scan-test during p...
- Publication number 20040268181
- Publication date Dec 30, 2004
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for debug, diagnosis, and yield improvement of...
- Publication number 20040237015
- Publication date Nov 25, 2004
- Khader S. Abdel-Hafez
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for testing asynchronous set/reset faults in a...
- Publication number 20040153926
- Publication date Aug 5, 2004
- Khader S. Abdel-Hafez
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for broadcasting scan patterns in a scan-based...
- Publication number 20030154433
- Publication date Aug 14, 2003
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Computer-aided design system to automate scan synthesis at register...
- Publication number 20030023941
- Publication date Jan 30, 2003
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and system to optimize test cost and disable defects for sca...
- Publication number 20020194558
- Publication date Dec 19, 2002
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Multiple-capture DFT system for scan-based integrated circuits
- Publication number 20020184560
- Publication date Dec 5, 2002
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for diagnosing failures in an integrated circu...
- Publication number 20020138801
- Publication date Sep 26, 2002
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Multiple-capture DFT system for detecting or locating crossing cloc...
- Publication number 20020120896
- Publication date Aug 29, 2002
- Laung-Terng Wang
- G01 - MEASURING TESTING

Xiaoqing Wen

Person

Patents Grantslast 30 patents

Method and apparatus for broadcasting scan patterns in a scan-based...

Multiple-capture DFT method for detecting or locating crossing cloc...

Multiple-capture DFT system for detecting or locating crossing cloc...

Multiple-capture DFT system for detecting or locating crossing cloc...

Multiple-capture DFT system for detecting or locating crossing cloc...

Computer-aided design system to automate scan synthesis at register...

Computer-aided design system to automate scan synthesis at register...

Computer-aided design system to automate scan synthesis at register...

Method and apparatus for unifying self-test with scan-test during p...

Multiple-capture DFT system for scan-based integrated circuits

Multiple-capture DFT system for detecting or locating crossing cloc...

Method and apparatus for unifying self-test with scan-test during p...

Mask network design for scan-based integrated circuits

Method and apparatus for broadcasting scan patterns in a scan-based...

Method and apparatus for broadcasting scan patterns in a scan-based...

Method and apparatus for shifting at-speed scan patterns in a scan-...

Multiple-capture DFT system for scan-based integrated circuits

Method and apparatus for unifying self-test with scan-test during p...

Method and apparatus for broadcasting scan patterns in a scan-based...

Computer-aided design system to automate scan synthesis at register...

Method and apparatus for diagnosing failures in an integrated circu...

Multiple-capture DFT system for detecting or locating crossing cloc...

Method and apparatus for diagnosing failures in an integrated circu...

Smart capture for ATPG (automatic test pattern generation) and faul...

Method and apparatus for debug, diagnosis, and yield improvement of...

Mask network design for scan-based integrated circuits

Multiple-capture DFT system for detecting or locating crossing cloc...

Computer-aided design system to automate scan synthesis at register...

Multiple-capture DFT system for scan-based integrated circuits

Patents Applicationslast 30 patents

MULTIPLE-CAPTURE DFT METHOD FOR DETECTING OR LOCATING CROSSING CLOC...

COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...

COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...

COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...

Method and Apparatus for Unifying Self-Test with Scan-Test During P...

METHOD AND APPARATUS FOR BROADCASTING SCAN PATTERNS IN A SCAN-BASED...

Multiple-capture DFT system for detecting or locating crossing cloc...

Multiple-Capture DFT system for scan-based integrated circuits

Method and apparatus for unifying self-test with scan-test during p...

Method and apparatus for broadcasting scan patterns in a scan-based...

Method and apparatus for diagnosing failures in an integrated circu...

Mask network design for scan-based integrated circuits

Smart capture for ATPG (automatic test pattern generation) and faul...

Multiple-capture DFT system for scan-based integrated circuits

Computer-aided design system to automate scan synthesis at register...

Mask network design for scan-based integrated circuits

Method and apparatus for shifting at-speed scan patterns in a scan-...

Method and apparatus for unifying self-test with scan-test during p...

Method and apparatus for debug, diagnosis, and yield improvement of...

Method and apparatus for testing asynchronous set/reset faults in a...

Method and apparatus for broadcasting scan patterns in a scan-based...

Computer-aided design system to automate scan synthesis at register...

Method and system to optimize test cost and disable defects for sca...

Multiple-capture DFT system for scan-based integrated circuits

Method and apparatus for diagnosing failures in an integrated circu...

Multiple-capture DFT system for detecting or locating crossing cloc...