Yan-Liang Lin

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Kaohsiung, TW

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Patents Grantslast 30 patents

Information Patent Grant
2×VDD-tolerant logic circuits and a related 2×VDD-tolerant I/O buff...
- Patent number 7,932,748
- Issue date Apr 26, 2011
- National Sun Yat-Sen University
- Ming-Dou Ker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
2×VDD-tolerant logic circuits and a related 2×VDD-tolerant I/O buff...
- Patent number 7,915,914
- Issue date Mar 29, 2011
- National Sun Yat-sen University
- Ming-Dou Ker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
I/O buffer with twice the supply voltage tolerance using normal sup...
- Patent number 7,868,659
- Issue date Jan 11, 2011
- National Sun Yat-sen University
- Ming-Dou Ker
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
I/O BUFFER WITH TWICE THE SUPPLY VOLTAGE TOLERANCE USING NORMAL SUP...
- Publication number 20100253392
- Publication date Oct 7, 2010
- Ming-Dou KER
- H03 - BASIC ELECTRONIC CIRCUITRY