Yanzhong Xu

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Resilient storage circuits
- Patent number 11,637,548
- Issue date Apr 25, 2023
- Microsoft Technology Licensing, LLC
- Yanzhong Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Resilient storage circuits
- Patent number 11,381,226
- Issue date Jul 5, 2022
- Microsoft Technology Licensing, LLC
- Yanzhong Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for detecting and correcting errors on a ring oscillator
- Patent number 10,483,951
- Issue date Nov 19, 2019
- Altera Corporation
- Nelson Gaspard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory elements with soft-error-upset (SEU) immunity using parasiti...
- Patent number 10,242,732
- Issue date Mar 26, 2019
- Intel Corporation
- Weimin Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with single-event latchup prevention circuitry
- Patent number 10,204,906
- Issue date Feb 12, 2019
- Intel Corporation
- Weimin Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
On-die capacitor (ODC) structure
- Patent number 9,859,358
- Issue date Jan 2, 2018
- Altera Corporation
- Kyung Suk Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for detecting and correcting errors on a ring oscillator
- Patent number 9,774,316
- Issue date Sep 26, 2017
- Altera Corporation
- Nelson Gaspard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register circuitry with asynchronous system reset
- Patent number 9,768,757
- Issue date Sep 19, 2017
- Altera Corporation
- Nelson Joseph Gaspard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory array with redundant bits and memory element voting circuits
- Patent number 9,582,374
- Issue date Feb 28, 2017
- Altera Corporation
- Yanzhong Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS global interconnect using multi-voltage(or current)-levels
- Patent number 9,559,699
- Issue date Jan 31, 2017
- Altera Corporation
- Weimin Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
FinFET with improved SEU performance
- Patent number 9,543,382
- Issue date Jan 10, 2017
- Altera Corporation
- Wen Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory elements with relay devices
- Patent number 9,520,182
- Issue date Dec 13, 2016
- Altera Corporation
- Lin-Shih Liu
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Optimal stacked transistor placement to increase single event trans...
- Patent number 9,519,743
- Issue date Dec 13, 2016
- Altera Corporation
- Nelson Joseph Gaspard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low leakage FinFET
- Patent number 9,508,720
- Issue date Nov 29, 2016
- Altera Corporation
- Weimin Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with asymmetric and stacked transistors
- Patent number 9,496,268
- Issue date Nov 15, 2016
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Transition accelerator circuitry
- Patent number 9,479,173
- Issue date Oct 25, 2016
- Altera Corporation
- Yanzhong Xu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods for fabricating PNP bipolar junction transistors
- Patent number 9,455,338
- Issue date Sep 27, 2016
- Altera Corporation
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bipolar junction transistor
- Patent number 9,419,076
- Issue date Aug 16, 2016
- Altera Corporation
- Weimin Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Input-output buffer circuit with a gate bias generator
- Patent number 9,385,718
- Issue date Jul 5, 2016
- Altera Corporation
- Jun Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual interlocked cell (DICE) storage element with reduced charge sh...
- Patent number 9,344,067
- Issue date May 17, 2016
- Altera Corporation
- Wen Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
ESD transistor and a method to design the ESD transistor
- Patent number 9,293,452
- Issue date Mar 22, 2016
- Altera Corporation
- Nor Razman Md Zin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory circuit with PMOS access transistors
- Patent number 8,995,175
- Issue date Mar 31, 2015
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Input-output buffer circuitry with increased drive strength
- Patent number 8,975,928
- Issue date Mar 10, 2015
- Altera Corporation
- Jun Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Volatile memory elements with soft error upset immunity
- Patent number 8,873,278
- Issue date Oct 28, 2014
- Altera Corporation
- Yanzhong Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with asymmetric and stacked transistors
- Patent number 8,750,026
- Issue date Jun 10, 2014
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with redundant bits and memory element voting circuits
- Patent number 8,739,010
- Issue date May 27, 2014
- Altera Corporation
- Yanzhong Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array circuitry with stability enhancement features
- Patent number 8,705,300
- Issue date Apr 22, 2014
- Altera Corporation
- Yanzhong Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffered finFET device
- Patent number 8,643,108
- Issue date Feb 4, 2014
- Altera Corporation
- Irfan Rahim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for memory with improved performance and associated methods
- Patent number 8,630,113
- Issue date Jan 14, 2014
- Altera Corporation
- Yanzhong Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory elements with relay devices
- Patent number 8,611,137
- Issue date Dec 17, 2013
- Altera Corporation
- Lin-Shih Liu
- B82 - NANO-TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
RESILIENT STORAGE CIRCUITS
- Publication number 20230231544
- Publication date Jul 20, 2023
- Microsoft Technology Licensing, LLC
- Yanzhong Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESILIENT STORAGE CIRCUITS
- Publication number 20220302907
- Publication date Sep 22, 2022
- Microsoft Technology Licensing, LLC
- Yanzhong Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESILIENT STORAGE CIRCUITS
- Publication number 20220182043
- Publication date Jun 9, 2022
- Microsoft Technology Licensing, LLC
- Yanzhong Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY WITH SINGLE-EVENT LATCHUP PREVENTION CIRCUITRY
- Publication number 20180175033
- Publication date Jun 21, 2018
- Intel Corporation
- Weimin Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ON-DIE CAPACITOR (ODC) STRUCTURE
- Publication number 20180083091
- Publication date Mar 22, 2018
- Altera Corporation
- Kyung Suk Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR DETECTING AND CORRECTING ERRORS ON A RING OSCILLATOR
- Publication number 20170366174
- Publication date Dec 21, 2017
- Altera Corporation
- Nelson Gaspard
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR DETECTING AND CORRECTING ERRORS ON A RING OSCILLATOR
- Publication number 20170250681
- Publication date Aug 31, 2017
- Altera Corporation
- Nelson Gaspard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR PARTICLE DETECTION AND ERROR CORRECTION IN...
- Publication number 20170082689
- Publication date Mar 23, 2017
- Altera Corporation
- Nelson Joseph Gaspard
- G01 - MEASURING TESTING
Information Patent Application
ON-DIE CAPACITOR (ODC) STRUCTURE
- Publication number 20160351654
- Publication date Dec 1, 2016
- Altera Corporation
- Kyung Suk Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuits with Asymmetric and Stacked Transistors
- Publication number 20160232952
- Publication date Aug 11, 2016
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuits with Asymmetric and Stacked Transistors
- Publication number 20150318029
- Publication date Nov 5, 2015
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Array with Redundant Bits and Memory Element Voting Circuits
- Publication number 20140245113
- Publication date Aug 28, 2014
- Altera Corporation
- Yanzhong Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ELEMENTS WITH RELAY DEVICES
- Publication number 20140085967
- Publication date Mar 27, 2014
- Altera Corporation
- Lin-Shih Liu
- B82 - NANO-TECHNOLOGY
Information Patent Application
MEMORY ELEMENTS WITH RELAY DEVICES
- Publication number 20130127494
- Publication date May 23, 2013
- Lin-Shih Liu
- B82 - NANO-TECHNOLOGY
Information Patent Application
BUFFERED FINFET DEVICE
- Publication number 20130043536
- Publication date Feb 21, 2013
- Irfan RAHIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY ARRAY WITH REDUNDANT BITS AND MEMORY ELEMENT VOTING CIRCUITS
- Publication number 20120131424
- Publication date May 24, 2012
- Yanzhong Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY
- Publication number 20100254203
- Publication date Oct 7, 2010
- Yanzhong Xu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY
- Publication number 20100080033
- Publication date Apr 1, 2010
- Yanzhong Xu
- H03 - BASIC ELECTRONIC CIRCUITRY

Yanzhong Xu

Person

Patents Grantslast 30 patents

Resilient storage circuits

Resilient storage circuits

Techniques for detecting and correcting errors on a ring oscillator

Memory elements with soft-error-upset (SEU) immunity using parasiti...

Memory with single-event latchup prevention circuitry

On-die capacitor (ODC) structure

Techniques for detecting and correcting errors on a ring oscillator

Register circuitry with asynchronous system reset

Memory array with redundant bits and memory element voting circuits

CMOS global interconnect using multi-voltage(or current)-levels

FinFET with improved SEU performance

Memory elements with relay devices

Optimal stacked transistor placement to increase single event trans...

Low leakage FinFET

Integrated circuits with asymmetric and stacked transistors

Transition accelerator circuitry

Methods for fabricating PNP bipolar junction transistors

Bipolar junction transistor

Input-output buffer circuit with a gate bias generator

Dual interlocked cell (DICE) storage element with reduced charge sh...

ESD transistor and a method to design the ESD transistor

Memory circuit with PMOS access transistors

Input-output buffer circuitry with increased drive strength

Volatile memory elements with soft error upset immunity

Integrated circuits with asymmetric and stacked transistors

Memory array with redundant bits and memory element voting circuits

Memory array circuitry with stability enhancement features

Buffered finFET device

Apparatus for memory with improved performance and associated methods

Memory elements with relay devices

Patents Applicationslast 30 patents

RESILIENT STORAGE CIRCUITS

RESILIENT STORAGE CIRCUITS

RESILIENT STORAGE CIRCUITS

MEMORY WITH SINGLE-EVENT LATCHUP PREVENTION CIRCUITRY

ON-DIE CAPACITOR (ODC) STRUCTURE

TECHNIQUES FOR DETECTING AND CORRECTING ERRORS ON A RING OSCILLATOR

TECHNIQUES FOR DETECTING AND CORRECTING ERRORS ON A RING OSCILLATOR

SYSTEMS AND METHODS FOR PARTICLE DETECTION AND ERROR CORRECTION IN...

ON-DIE CAPACITOR (ODC) STRUCTURE

Integrated Circuits with Asymmetric and Stacked Transistors

Integrated Circuits with Asymmetric and Stacked Transistors

Memory Array with Redundant Bits and Memory Element Voting Circuits

MEMORY ELEMENTS WITH RELAY DEVICES

MEMORY ELEMENTS WITH RELAY DEVICES

BUFFERED FINFET DEVICE

MEMORY ARRAY WITH REDUNDANT BITS AND MEMORY ELEMENT VOTING CIRCUITS

VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY

VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY