Yi-Hsin Nien

Person

Hsinchu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device including a word line with portions with different si...
- Patent number 12,230,318
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for memory operation using local word lines
- Patent number 12,159,688
- Issue date Dec 3, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Four CPP wide memory cell with buried power grid, and method of fab...
- Patent number 12,137,548
- Issue date Nov 5, 2024
- Taiwan Semiconductor Manufacturing Company
- Hidehiro Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and method of manufacturing the same
- Patent number 12,125,523
- Issue date Oct 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having a negative voltage circuit
- Patent number 11,929,116
- Issue date Mar 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit having SRAM memory cells and method for forming a SR...
- Patent number 11,910,587
- Issue date Feb 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
Information Patent Grant
Memory device
- Patent number 11,805,636
- Issue date Oct 31, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yi-Hsin Nien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for memory operation using local word lines
- Patent number 11,682,440
- Issue date Jun 20, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell supporting bit-write-mask function
- Patent number 11,631,456
- Issue date Apr 18, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Four CPP wide memory cell with buried power grid, and method of fab...
- Patent number 11,569,246
- Issue date Jan 31, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having a negative voltage circuit
- Patent number 11,562,786
- Issue date Jan 24, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including a word line with portions with different si...
- Patent number 11,404,113
- Issue date Aug 2, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for memory operation using local word lines
- Patent number 11,264,070
- Issue date Mar 1, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell supporting bit-write-mask function
- Patent number 11,183,234
- Issue date Nov 23, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Systems and Methods for Memory Operation Using Local Word Lines
- Publication number 20250078889
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL WITH BURIED POWER GRID, AND METHOD OF FABRICATING SAME
- Publication number 20250063709
- Publication date Feb 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro FUJIWARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES WITH FLYING BIT LINES AND METHODS OF M...
- Publication number 20250014614
- Publication date Jan 9, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
LATCH CIRCUITS AND METHODS FOR OPERATING THE SAME
- Publication number 20240429902
- Publication date Dec 26, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro Fujiwara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FLY SHARED BIT LINE ON 4-CPP STATIC RANDOM ACCESS MEMORY (SRAM) CEL...
- Publication number 20240404588
- Publication date Dec 5, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20240386945
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE HAVING A NEGATIVE VOLTAGE CIRCUIT
- Publication number 20240212749
- Publication date Jun 27, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A SRAM MEMORY CELL STRU...
- Publication number 20240179884
- Publication date May 30, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro FUJIWARA
Information Patent Application
MEMORY DEVICES WITH ROW-BASED CONFIGURED SUPPLY VOLTAGES
- Publication number 20240145385
- Publication date May 2, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE INCLUDING SEPARATE NEGATIVE BIT LINE
- Publication number 20240105241
- Publication date Mar 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Yu Lin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH IMPROVED BIT LINE LOADING
- Publication number 20240021240
- Publication date Jan 18, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20230371227
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Hsin NIEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Systems and Methods for Memory Operation Using Local Word Lines
- Publication number 20230307024
- Publication date Sep 28, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION
- Publication number 20230253035
- Publication date Aug 10, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20230238056
- Publication date Jul 27, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE HAVING A NEGATIVE VOLTAGE CIRCUIT
- Publication number 20230162786
- Publication date May 25, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
FOUR CPP WIDE MEMORY CELL WITH BURIED POWER GRID, AND METHOD OF FAB...
- Publication number 20230156995
- Publication date May 18, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro FUJIWARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INCLUDING A WORD LINE WITH PORTIONS WITH DIFFERENT SI...
- Publication number 20220359002
- Publication date Nov 10, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A SRAM MEMORY CELL STRU...
- Publication number 20220278111
- Publication date Sep 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro FUJIWARA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Systems and Methods for Memory Operation Using Local Word Lines
- Publication number 20220172758
- Publication date Jun 2, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION
- Publication number 20220084585
- Publication date Mar 17, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
FOUR CPP WIDE MEMORY CELL WITH BURIED POWER GRID, AND METHOD OF FAB...
- Publication number 20210408011
- Publication date Dec 30, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro FUJIWARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE
- Publication number 20210398589
- Publication date Dec 23, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20210398986
- Publication date Dec 23, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Hsin NIEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Systems and Methods for Memory Operation Using Local Word Lines
- Publication number 20210225420
- Publication date Jul 22, 2021
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device
- Publication number 20210201990
- Publication date Jul 1, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION
- Publication number 20210158864
- Publication date May 27, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro Fujiwara
- H01 - BASIC ELECTRIC ELEMENTS

Yi-Hsin Nien

Person

Patents Grantslast 30 patents

Memory device including a word line with portions with different si...

Systems and methods for memory operation using local word lines

Four CPP wide memory cell with buried power grid, and method of fab...

Memory device and method of manufacturing the same

Memory device having a negative voltage circuit

Memory circuit having SRAM memory cells and method for forming a SR...

Memory device

Systems and methods for memory operation using local word lines

Bitcell supporting bit-write-mask function

Four CPP wide memory cell with buried power grid, and method of fab...

Memory device having a negative voltage circuit

Memory device including a word line with portions with different si...

Systems and methods for memory operation using local word lines

Bitcell supporting bit-write-mask function

Patents Applicationslast 30 patents

Systems and Methods for Memory Operation Using Local Word Lines

MEMORY CELL WITH BURIED POWER GRID, AND METHOD OF FABRICATING SAME

SEMICONDUCTOR MEMORY DEVICES WITH FLYING BIT LINES AND METHODS OF M...

LATCH CIRCUITS AND METHODS FOR OPERATING THE SAME

FLY SHARED BIT LINE ON 4-CPP STATIC RANDOM ACCESS MEMORY (SRAM) CEL...

MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

MEMORY DEVICE HAVING A NEGATIVE VOLTAGE CIRCUIT

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A SRAM MEMORY CELL STRU...

MEMORY DEVICES WITH ROW-BASED CONFIGURED SUPPLY VOLTAGES

MEMORY DEVICE INCLUDING SEPARATE NEGATIVE BIT LINE

MEMORY DEVICES WITH IMPROVED BIT LINE LOADING

MEMORY DEVICE

Systems and Methods for Memory Operation Using Local Word Lines

BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION

MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

MEMORY DEVICE HAVING A NEGATIVE VOLTAGE CIRCUIT

FOUR CPP WIDE MEMORY CELL WITH BURIED POWER GRID, AND METHOD OF FAB...

MEMORY DEVICE INCLUDING A WORD LINE WITH PORTIONS WITH DIFFERENT SI...

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A SRAM MEMORY CELL STRU...

Systems and Methods for Memory Operation Using Local Word Lines

BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION

FOUR CPP WIDE MEMORY CELL WITH BURIED POWER GRID, AND METHOD OF FAB...

MEMORY DEVICE

MEMORY DEVICE

Systems and Methods for Memory Operation Using Local Word Lines

Memory Device

BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION