Yong Du

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical electrical interconnect formed on support prior to die mount
- Patent number 8,742,602
- Issue date Jun 3, 2014
- Invensas Corporation
- Terrence Caskey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level surface passivation of stackable integrated circuit chips
- Patent number 8,324,081
- Issue date Dec 4, 2012
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for multi-chip packaging
- Patent number 8,324,716
- Issue date Dec 4, 2012
- Spansion LLC
- Yong Du
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level surface passivation of stackable integrated circuit chips
- Patent number 7,923,349
- Issue date Apr 12, 2011
- Vertical Circuits, Inc.
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for multi-chip packaging
- Patent number 7,691,668
- Issue date Apr 6, 2010
- Spansion LLC
- Yong Du
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip module and method of manufacture
- Patent number 7,163,839
- Issue date Jan 16, 2007
- Spansion LLC
- John Yan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS
- Publication number 20110147943
- Publication date Jun 23, 2011
- Vertical Circuits, Inc.
- Simon J.S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING
- Publication number 20100164124
- Publication date Jul 1, 2010
- Yong Du
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR BALL GRID ARRAY (BGA) SOLDER ATTACH FOR SURFACE MOUNT
- Publication number 20090289101
- Publication date Nov 26, 2009
- Yong Du
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
CHIP SCALE STACKED DIE PACKAGE
- Publication number 20090102038
- Publication date Apr 23, 2009
- Vertical Circuits, Inc.
- SIMON J.S. MCELREA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL CIRCUITRY FORMED ON INTEGRATED CIRCUIT DEVICE USI...
- Publication number 20080315407
- Publication date Dec 25, 2008
- Vertical Circuits, Inc.
- Lawrence Douglas Andrews, JR.
- G01 - MEASURING TESTING
Information Patent Application
WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS
- Publication number 20080315434
- Publication date Dec 25, 2008
- Vertical Circuits, Inc.
- Simon J.S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL ELECTRICAL INTERCONNECT FORMED ON SUPPORT PRIOR TO DIE MOUNT
- Publication number 20080224279
- Publication date Sep 18, 2008
- Vertical Circuits, Inc.
- Terrence Caskey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING
- Publication number 20080142942
- Publication date Jun 19, 2008
- Yong Du
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-chip module and method of manufacture
- Publication number 20060246704
- Publication date Nov 2, 2006
- Spansion LLC
- John Yan
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Vertical electrical interconnect formed on support prior to die mount

Wafer level surface passivation of stackable integrated circuit chips

Method and apparatus for multi-chip packaging

Wafer level surface passivation of stackable integrated circuit chips

Method and apparatus for multi-chip packaging

Multi-chip module and method of manufacture

Patents Applicationslast 30 patents

WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS

METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING

METHOD FOR BALL GRID ARRAY (BGA) SOLDER ATTACH FOR SURFACE MOUNT

CHIP SCALE STACKED DIE PACKAGE

THREE-DIMENSIONAL CIRCUITRY FORMED ON INTEGRATED CIRCUIT DEVICE USI...

WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS

VERTICAL ELECTRICAL INTERCONNECT FORMED ON SUPPORT PRIOR TO DIE MOUNT

METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING

Multi-chip module and method of manufacture