Yoshio Takamine

Person

Kokubunji, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit
- Patent number 7,366,965
- Issue date Apr 29, 2008
- Renesas Technology, Corp.
- Kaname Yamasaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for generating behavior model description of circuit and app...
- Patent number 6,536,031
- Issue date Mar 18, 2003
- Hitachi, Ltd.
- Masaki Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic simulation method
- Patent number 5,592,655
- Issue date Jan 7, 1997
- Hitachi, Ltd.
- Yoshio Takamine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for logical simulation
- Patent number 5,051,941
- Issue date Sep 24, 1991
- Hitachi, Ltd.
- Yoshio Takamine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processor
- Patent number 4,933,839
- Issue date Jun 12, 1990
- Hitachi, Ltd.
- Yoshiaki Kinoshita
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit simulation method with clock event suppression for debuggin...
- Patent number 4,899,273
- Issue date Feb 6, 1990
- Hitachi, Ltd.
- Koichiro Omoda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic logic design system
- Patent number 4,833,619
- Issue date May 23, 1989
- Hitachi, Ltd.
- Tsuguo Shimizu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processor with vector registers
- Patent number 4,811,213
- Issue date Mar 7, 1989
- Hitachi, Ltd.
- Yoshio Takamine
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor integrated circuit
- Publication number 20090063913
- Publication date Mar 5, 2009
- RENESAS TECHNOLOGY CORP.
- Kaname Yamasaki
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20050047260
- Publication date Mar 3, 2005
- RENESAS TECHNOLOGY CORP.
- Kaname Yamasaki
- G11 - INFORMATION STORAGE
Information Patent Application
Method for generating behavior model description of circuit and app...
- Publication number 20020046391
- Publication date Apr 18, 2002
- Hitachi, Ltd.
- Masaki Ito
- G06 - COMPUTING CALCULATING COUNTING

Yoshio Takamine

Person

Patents Grantslast 30 patents

Semiconductor integrated circuit

Method for generating behavior model description of circuit and app...

Logic simulation method

Method and apparatus for logical simulation

Vector processor

Circuit simulation method with clock event suppression for debuggin...

Automatic logic design system

Vector processor with vector registers

Patents Applicationslast 30 patents

Semiconductor integrated circuit

Semiconductor integrated circuit

Method for generating behavior model description of circuit and app...