Younggyun Kim

Person

Irvine, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Digital phase locked loop
- Patent number 7,738,600
- Issue date Jun 15, 2010
- DSP Group Inc.
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for dynamic diversity based upon receiver-side...
- Patent number 7,610,019
- Issue date Oct 27, 2009
- DSP Group Inc.
- Jaekyun Moon
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
CCK demodulation via symbol decision feedback equalizer
- Patent number 7,526,050
- Issue date Apr 28, 2009
- DSP Group Inc.
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop
- Patent number 7,272,175
- Issue date Sep 18, 2007
- DSP Group Inc.
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital front-end for wireless communication system
- Patent number 7,190,748
- Issue date Mar 13, 2007
- DSP Group Inc.
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Joint equalization, soft-demapping and phase error correction in wi...
- Patent number 7,173,990
- Issue date Feb 6, 2007
- DSP Group Inc.
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for dynamic diversity based upon receiver-side...
- Patent number 7,146,134
- Issue date Dec 5, 2006
- DSP Group Inc.
- Jaekyun Moon
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Implementation method of digital phase-locked loop
- Patent number 6,813,111
- Issue date Nov 2, 2004
- Texas Instruments Incorporated
- Bhavesh G. Bhakta
- G11 - INFORMATION STORAGE
Information Patent Grant
Decision error compensation technique for decision-directed timing...
- Patent number 6,738,206
- Issue date May 18, 2004
- Texas Instruments Incorporated
- Younggyun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Modified viterbi detector for jitter noise dominant channels
- Patent number 6,728,928
- Issue date Apr 27, 2004
- Texas Instruments Incorporated
- Taehyun Jeon
- G11 - INFORMATION STORAGE
Information Patent Grant
Decimated digital phase-locked loop for high-speed implementation
- Patent number 6,636,120
- Issue date Oct 21, 2003
- Texas Instruments Incorporated
- Bhavesh G. Bhakta
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Digital phase locked loop
- Publication number 20070286268
- Publication date Dec 13, 2007
- DSP Group Inc.
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus and method for dynamic diversity based upon receiver-side...
- Publication number 20060258304
- Publication date Nov 16, 2006
- DSP Group Inc.
- Jaekyun Moon
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CCK demodulation via symbol decision feedback equalizer
- Publication number 20040057532
- Publication date Mar 25, 2004
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus and method for dynamic diversity based upon receiver-side...
- Publication number 20030153358
- Publication date Aug 14, 2003
- Jaekyun Moon
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Joint equalization, soft-demapping and phase error correction in wi...
- Publication number 20030123582
- Publication date Jul 3, 2003
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Digital front-end for wireless communication system
- Publication number 20030072397
- Publication date Apr 17, 2003
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Digital phase locked loop
- Publication number 20030053564
- Publication date Mar 20, 2003
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Modified viterbi detector for jitter noise dominant channels
- Publication number 20020184597
- Publication date Dec 5, 2002
- Taehyun Jeon
- G11 - INFORMATION STORAGE
Information Patent Application
Fixed decision delay detectors for timing recovery loop
- Publication number 20020172305
- Publication date Nov 21, 2002
- Younggyun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Timing recovery loop latency reduction via loop filter pre-calculation
- Publication number 20020141089
- Publication date Oct 3, 2002
- Younggyun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
Implementation method of digital phase-locked loop
- Publication number 20020080516
- Publication date Jun 27, 2002
- Bhavesh G. Bhakta
- G11 - INFORMATION STORAGE
Information Patent Application
Decimated digital phase-locked loop for high-speed implementation
- Publication number 20020075078
- Publication date Jun 20, 2002
- Bhavesh G. Bhakta
- G11 - INFORMATION STORAGE
Information Patent Application
Decision error compensation technique for decision-directed timing...
- Publication number 20020063982
- Publication date May 30, 2002
- Younggyun Kim
- G11 - INFORMATION STORAGE

Younggyun Kim

Person

Patents Grantslast 30 patents

Digital phase locked loop

Apparatus and method for dynamic diversity based upon receiver-side...

CCK demodulation via symbol decision feedback equalizer

Digital phase locked loop

Digital front-end for wireless communication system

Joint equalization, soft-demapping and phase error correction in wi...

Apparatus and method for dynamic diversity based upon receiver-side...

Implementation method of digital phase-locked loop

Decision error compensation technique for decision-directed timing...

Modified viterbi detector for jitter noise dominant channels

Decimated digital phase-locked loop for high-speed implementation

Patents Applicationslast 30 patents

Digital phase locked loop

Apparatus and method for dynamic diversity based upon receiver-side...

CCK demodulation via symbol decision feedback equalizer

Apparatus and method for dynamic diversity based upon receiver-side...

Joint equalization, soft-demapping and phase error correction in wi...

Digital front-end for wireless communication system

Digital phase locked loop

Modified viterbi detector for jitter noise dominant channels

Fixed decision delay detectors for timing recovery loop

Timing recovery loop latency reduction via loop filter pre-calculation

Implementation method of digital phase-locked loop

Decimated digital phase-locked loop for high-speed implementation

Decision error compensation technique for decision-directed timing...