Yuanlin Xie

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit packages with detachable interconnect structures
- Patent number 9,893,034
- Issue date Feb 13, 2018
- Altera Corporation
- Yuanlin Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tranmission line bridge interconnects
- Patent number 9,842,813
- Issue date Dec 12, 2017
- Altera Corporation
- Xiaohong Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for packaging integrated circuits
- Patent number 9,748,197
- Issue date Aug 29, 2017
- Altera Corporation
- Loon Kwang Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for stacked electronic circuitry and associated methods
- Patent number 9,698,123
- Issue date Jul 4, 2017
- Altera Corporation
- Arifur Rahman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with embedded passive structures
- Patent number 9,673,173
- Issue date Jun 6, 2017
- Altera Corporation
- Zhe Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structure and method for its fabrication
- Patent number 9,570,342
- Issue date Feb 14, 2017
- Altera Corporation
- Yuanlin Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with plated heat spreader
- Patent number 9,559,036
- Issue date Jan 31, 2017
- Altera Corporation
- Steven Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power distribution network
- Patent number 9,536,820
- Issue date Jan 3, 2017
- Altera Corporation
- Hui Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced ball grid array
- Patent number 9,462,691
- Issue date Oct 4, 2016
- Altera Corporation
- Yuanlin Xie
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Embedded interposer with through-hole vias
- Patent number 9,418,965
- Issue date Aug 16, 2016
- Altera Corporation
- Zhe Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for packaging integrated circuits
- Patent number 9,401,287
- Issue date Jul 26, 2016
- Altera Corporation
- Loon Kwang Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
IC package with non-uniform dielectric layer thickness
- Patent number 9,401,330
- Issue date Jul 26, 2016
- Altera Corporation
- Xiaohong Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with cavity in substrate
- Patent number 9,196,575
- Issue date Nov 24, 2015
- Altera Corporation
- Myung June Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package with fluid flow barriers
- Patent number 8,710,643
- Issue date Apr 29, 2014
- Altera Corporation
- Teck-Gyu Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power distribution network
- Patent number 8,498,129
- Issue date Jul 30, 2013
- Altera Corporation
- Hui Liu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Universal bump array structure
- Patent number 8,242,608
- Issue date Aug 14, 2012
- Altera Corporation
- Li-Tien Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with non-solder mask defined like pads
- Patent number 8,198,699
- Issue date Jun 12, 2012
- Altera Corporation
- Yuanlin Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lead frame packaging technique with reduced noise and cross-talk
- Patent number 7,936,059
- Issue date May 3, 2011
- Altera Corporation
- Yuanlin Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package and method of forming the same
- Patent number 7,883,937
- Issue date Feb 8, 2011
- Altera Corporation
- Teck-Gyu Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BGA package with wiring schemes having reduced current loop paths t...
- Patent number 7,501,709
- Issue date Mar 10, 2009
- Altera Corporation
- Vincent Hool
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of optimizing interconnect distribution to improve signal in...
- Patent number 7,472,367
- Issue date Dec 30, 2008
- Altera Corporation
- Yuanlin Xie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for optimizing electrical performance and layout efficie...
- Patent number 7,405,473
- Issue date Jul 29, 2008
- Altera Corporation
- Hong Shi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
On-package edge-mount power decoupling and implementation with nove...
- Patent number 7,309,912
- Issue date Dec 18, 2007
- Altera Corporation
- Hong Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Consolidated flip chip BGA assembly process and apparatus
- Patent number 7,262,079
- Issue date Aug 28, 2007
- Altera Corporation
- Yuanlin Xie
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT PACKAGES WITH DETACHABLE INTERCONNECT STRUCTURES
- Publication number 20170117250
- Publication date Apr 27, 2017
- Altera Corporation
- Yuanlin Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANMISSION LINE BRIDGE INTERCONNECTS
- Publication number 20170084553
- Publication date Mar 23, 2017
- Altera Corporation
- Xiaohong Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PACKAGING INTEGRATED CIRCUITS
- Publication number 20160307868
- Publication date Oct 20, 2016
- Altera Corporation
- Loon Kwang Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PACKAGING INTEGRATED CIRCUITS
- Publication number 20150228506
- Publication date Aug 13, 2015
- Altera Corporation
- Loon Kwang Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS FOR ELECTRONIC ASSEMBLY WITH IMPROVED INTERCONNECT AND AS...
- Publication number 20140264783
- Publication date Sep 18, 2014
- Altera Corporation
- Hui Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS FOR STACKED ELECTRONIC CIRCUITRY AND ASSOCIATED METHODS
- Publication number 20130069247
- Publication date Mar 21, 2013
- Arifur Rahman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic Package with Fluid Flow Barriers
- Publication number 20110204476
- Publication date Aug 25, 2011
- Altera Corporation
- Teck-Gyu Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIVERSAL BUMP ARRAY STRUCTURE
- Publication number 20100078207
- Publication date Apr 1, 2010
- Li-Tien Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Consolidated flip chip BGA assembly process and apparatus
- Publication number 20060175710
- Publication date Aug 10, 2006
- Yuanlin Xie
- H01 - BASIC ELECTRIC ELEMENTS

Yuanlin Xie

Person

Patents Grantslast 30 patents

Integrated circuit packages with detachable interconnect structures

Tranmission line bridge interconnects

Methods for packaging integrated circuits

Apparatus for stacked electronic circuitry and associated methods

Integrated circuit package with embedded passive structures

Via structure and method for its fabrication

Integrated circuit package with plated heat spreader

Power distribution network

Enhanced ball grid array

Embedded interposer with through-hole vias

Methods for packaging integrated circuits

IC package with non-uniform dielectric layer thickness

Integrated circuit package with cavity in substrate

Electronic package with fluid flow barriers

Power distribution network

Universal bump array structure

Integrated circuit package with non-solder mask defined like pads

Lead frame packaging technique with reduced noise and cross-talk

Electronic package and method of forming the same

BGA package with wiring schemes having reduced current loop paths t...

Method of optimizing interconnect distribution to improve signal in...

Techniques for optimizing electrical performance and layout efficie...

On-package edge-mount power decoupling and implementation with nove...

Consolidated flip chip BGA assembly process and apparatus

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT PACKAGES WITH DETACHABLE INTERCONNECT STRUCTURES

TRANMISSION LINE BRIDGE INTERCONNECTS

METHODS FOR PACKAGING INTEGRATED CIRCUITS

METHODS FOR PACKAGING INTEGRATED CIRCUITS

APPARATUS FOR ELECTRONIC ASSEMBLY WITH IMPROVED INTERCONNECT AND AS...

APPARATUS FOR STACKED ELECTRONIC CIRCUITRY AND ASSOCIATED METHODS

Electronic Package with Fluid Flow Barriers

UNIVERSAL BUMP ARRAY STRUCTURE

Consolidated flip chip BGA assembly process and apparatus