Yung Fu Chong

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Transistor with wrap-around extrinsic base
- Patent number 12,142,673
- Issue date Nov 12, 2024
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Xinshu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with wrap-around extrinsic base
- Patent number 11,855,195
- Issue date Dec 26, 2023
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Xinshu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with wrap-around extrinsic base
- Patent number 11,855,196
- Issue date Dec 26, 2023
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Xinshu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact via structures of semiconductor devices
- Patent number 11,776,844
- Issue date Oct 3, 2023
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming integrated circuits with solutions to interlayer...
- Patent number 10,566,441
- Issue date Feb 18, 2020
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hao Nong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with source-drain silicide pullback
- Patent number 10,395,987
- Issue date Aug 27, 2019
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Chia Ching Yeo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split gate embedded memory technology and method of manufacturing t...
- Patent number 10,079,316
- Issue date Sep 18, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Danny Shum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits with improved active re...
- Patent number 9,620,418
- Issue date Apr 11, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating device substrates and integrated circuits
- Patent number 9,390,962
- Issue date Jul 12, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Lian Hoon Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split gate embedded memory technology and method of manufacturing t...
- Patent number 9,257,554
- Issue date Feb 9, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Danny Shum
- G11 - INFORMATION STORAGE
Information Patent Grant
Strained channel transistor and method of fabrication thereof
- Patent number 8,912,567
- Issue date Dec 16, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substantially L-shaped silicide for contact
- Patent number 8,643,119
- Issue date Feb 4, 2014
- International Business Machines Corporation
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to control source/drain stressor profiles for stress enginee...
- Patent number 8,450,775
- Issue date May 28, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffusion barrier and method of formation thereof
- Patent number 8,324,031
- Issue date Dec 4, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Shyue Seng Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of raised source/drain structures in NFET with embedded S...
- Patent number 8,288,825
- Issue date Oct 16, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor system using germanium condensation
- Patent number 8,211,761
- Issue date Jul 3, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Shyue Seng Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having pFET with SiGe gate electrode and embe...
- Patent number 8,138,055
- Issue date Mar 20, 2012
- Infineon Technologies AG
- Jin-Ping Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to control source/drain stressor profiles for stress enginee...
- Patent number 8,017,487
- Issue date Sep 13, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit isolation system
- Patent number 7,972,921
- Issue date Jul 5, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded stressor structure and process
- Patent number 7,939,413
- Issue date May 10, 2011
- Samsung Electronics Co., Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of strained Si channel and Si1-xGex source/drain structur...
- Patent number 7,892,905
- Issue date Feb 22, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a shallow junction region using defect engineeri...
- Patent number 7,888,224
- Issue date Feb 15, 2011
- Nanyang Technological University
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having pFET with SiGe gate electrode and embe...
- Patent number 7,800,182
- Issue date Sep 21, 2010
- Infineon Technologies AG
- Jin-Ping Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained channel transistor and method of fabrication thereof
- Patent number 7,772,071
- Issue date Aug 10, 2010
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of raised source/drain structures in NFET with embedded S...
- Patent number 7,718,500
- Issue date May 18, 2010
- Chartered Semiconductor Manufacturing, Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system employing a condensation process
- Patent number 7,692,213
- Issue date Apr 6, 2010
- Chartered Semiconductor Manufacturing Ltd.
- Lee Wee Teo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to fabricate variable work function gates for FUSI devices
- Patent number 7,645,687
- Issue date Jan 12, 2010
- Chartered Semiconductor Manufacturing, Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate stress engineering for MOSFET
- Patent number 7,595,233
- Issue date Sep 29, 2009
- International Business Machines Corporation
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form selective strained Si using lateral epitaxy
- Patent number 7,572,712
- Issue date Aug 11, 2009
- Chartered Semiconductor Manufacturing, Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor structure
- Patent number 7,566,609
- Issue date Jul 28, 2009
- International Business Machines Corporation
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
EXTENDED-DRAIN METAL-OXIDE-SEMICONDUCTOR DEVICES WITH A DUAL-THICKN...
- Publication number 20250031432
- Publication date Jan 23, 2025
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Fangyue Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE
- Publication number 20250006824
- Publication date Jan 2, 2025
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Xinshu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE
- Publication number 20240006517
- Publication date Jan 4, 2024
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Xinshu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AIR GAP WITH INVERTED T-SHAPED LOWER PORTION EXTENDING THROUGH AT L...
- Publication number 20230411208
- Publication date Dec 21, 2023
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Wensheng Deng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT VIA STRUCTURES OF SEMICONDUCTOR DEVICES
- Publication number 20230395425
- Publication date Dec 7, 2023
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- YUNG FU CHONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE
- Publication number 20230129914
- Publication date Apr 27, 2023
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Xinshu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE
- Publication number 20230127768
- Publication date Apr 27, 2023
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Xinshu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT VIA STRUCTURES OF SEMICONDUCTOR DEVICES
- Publication number 20220310444
- Publication date Sep 29, 2022
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- YUNG FU CHONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING INTEGRATED CIRCUITS WITH SOLUTIONS TO INTERLAYER...
- Publication number 20190252515
- Publication date Aug 15, 2019
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hao Nong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH SOURCE-DRAIN SILICIDE PULLBACK
- Publication number 20170200649
- Publication date Jul 13, 2017
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Chia Ching YEO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE SUBSTRATES, INTEGRATED CIRCUITS AND METHODS FOR FABRICATING...
- Publication number 20160172236
- Publication date Jun 16, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Lian Hoon Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPLIT GATE EMBEDDED MEMORY TECHNOLOGY AND METHOD OF MANUFACTURING T...
- Publication number 20160155860
- Publication date Jun 2, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Danny SHUM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH IMPROVED ACTIVE RE...
- Publication number 20160133524
- Publication date May 12, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPLIT GATE EMBEDDED MEMORY TECHNOLOGY AND METHOD OF MANUFACTURING T...
- Publication number 20150048439
- Publication date Feb 19, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Danny SHUM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF
- Publication number 20150008528
- Publication date Jan 8, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Shyue Seng TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF
- Publication number 20130087889
- Publication date Apr 11, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Shyue Seng TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO CONTROL SOURCE/DRAIN STRESSOR PROFILES FOR STRESS ENGINEE...
- Publication number 20120001228
- Publication date Jan 5, 2012
- International Business Machines Corporation (IBM)
- Yung Fu CHONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED CHANNEL TRANSISTOR AND METHOD OF FABRICATION THEREOF
- Publication number 20100320503
- Publication date Dec 23, 2010
- Chartered Semiconductor Manufacturing LTD.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Devices Having pFET with SiGe Gate Electrode and Embe...
- Publication number 20100297818
- Publication date Nov 25, 2010
- Jin-Ping Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF RAISED SOURCE/DRAIN STUCTURES IN NFET WITH EMBEDDED SI...
- Publication number 20100219485
- Publication date Sep 2, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yung Fu CHONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A SHALLOW JUNCTION REGION USING DEFECT ENGINEERI...
- Publication number 20100124809
- Publication date May 20, 2010
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF
- Publication number 20090315152
- Publication date Dec 24, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Shyue Seng TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Elimination of STI recess and facet growth in embedded silicon-germ...
- Publication number 20090184341
- Publication date Jul 23, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING A CONDENSATION PROCESS
- Publication number 20090039388
- Publication date Feb 12, 2009
- Chartered Semiconductor Manufacturing LTD.
- Lee Wee Teo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTANTIALLY L-SHAPED SILICIDE FOR CONTACT AND RELATED METHOD
- Publication number 20080283934
- Publication date Nov 20, 2008
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF STRESSING TRANSISTOR CHANNEL WITH REPLACED GATE
- Publication number 20080286916
- Publication date Nov 20, 2008
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING DIFFERENTIAL SPACERS
- Publication number 20080142879
- Publication date Jun 19, 2008
- Chartered Semiconductor Manufacturing LTD.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor devices having pFET with SiGe gate electrode and embe...
- Publication number 20080119019
- Publication date May 22, 2008
- Jin-Ping Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO FORM SELECTIVE STRAINED SI USING LATERAL EPITAXY
- Publication number 20080116482
- Publication date May 22, 2008
- Chartered Semiconductor Manufacturing Ltd.
- Yung Fu Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH DOPED TRANSISTOR
- Publication number 20080087958
- Publication date Apr 17, 2008
- Chartered Semiconductor Manufacturing LTD.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS

Yung Fu Chong

Person

Patents Grantslast 30 patents

Transistor with wrap-around extrinsic base

Transistor with wrap-around extrinsic base

Transistor with wrap-around extrinsic base

Contact via structures of semiconductor devices

Methods of forming integrated circuits with solutions to interlayer...

Transistor with source-drain silicide pullback

Split gate embedded memory technology and method of manufacturing t...

Methods for fabricating integrated circuits with improved active re...

Methods for fabricating device substrates and integrated circuits

Split gate embedded memory technology and method of manufacturing t...

Strained channel transistor and method of fabrication thereof

Substantially L-shaped silicide for contact

Method to control source/drain stressor profiles for stress enginee...

Diffusion barrier and method of formation thereof

Formation of raised source/drain structures in NFET with embedded S...

Semiconductor system using germanium condensation

Semiconductor devices having pFET with SiGe gate electrode and embe...

Method to control source/drain stressor profiles for stress enginee...

Integrated circuit isolation system

Embedded stressor structure and process

Formation of strained Si channel and Si1-xGex source/drain structur...

Method for forming a shallow junction region using defect engineeri...

Semiconductor devices having pFET with SiGe gate electrode and embe...

Strained channel transistor and method of fabrication thereof

Formation of raised source/drain structures in NFET with embedded S...

Integrated circuit system employing a condensation process

Method to fabricate variable work function gates for FUSI devices

Gate stress engineering for MOSFET

Method to form selective strained Si using lateral epitaxy

Method of manufacturing a semiconductor structure

Patents Applicationslast 30 patents

EXTENDED-DRAIN METAL-OXIDE-SEMICONDUCTOR DEVICES WITH A DUAL-THICKN...

TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE

TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE

AIR GAP WITH INVERTED T-SHAPED LOWER PORTION EXTENDING THROUGH AT L...

CONTACT VIA STRUCTURES OF SEMICONDUCTOR DEVICES

TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE

TRANSISTOR WITH WRAP-AROUND EXTRINSIC BASE

CONTACT VIA STRUCTURES OF SEMICONDUCTOR DEVICES

METHODS OF FORMING INTEGRATED CIRCUITS WITH SOLUTIONS TO INTERLAYER...

TRANSISTOR WITH SOURCE-DRAIN SILICIDE PULLBACK

DEVICE SUBSTRATES, INTEGRATED CIRCUITS AND METHODS FOR FABRICATING...

SPLIT GATE EMBEDDED MEMORY TECHNOLOGY AND METHOD OF MANUFACTURING T...

METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH IMPROVED ACTIVE RE...

SPLIT GATE EMBEDDED MEMORY TECHNOLOGY AND METHOD OF MANUFACTURING T...

DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF

DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF

METHOD TO CONTROL SOURCE/DRAIN STRESSOR PROFILES FOR STRESS ENGINEE...

STRAINED CHANNEL TRANSISTOR AND METHOD OF FABRICATION THEREOF

Semiconductor Devices Having pFET with SiGe Gate Electrode and Embe...

FORMATION OF RAISED SOURCE/DRAIN STUCTURES IN NFET WITH EMBEDDED SI...

METHOD FOR FORMING A SHALLOW JUNCTION REGION USING DEFECT ENGINEERI...

DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF

Elimination of STI recess and facet growth in embedded silicon-germ...

INTEGRATED CIRCUIT SYSTEM EMPLOYING A CONDENSATION PROCESS

SUBSTANTIALLY L-SHAPED SILICIDE FOR CONTACT AND RELATED METHOD

METHODS OF STRESSING TRANSISTOR CHANNEL WITH REPLACED GATE

INTEGRATED CIRCUIT SYSTEM EMPLOYING DIFFERENTIAL SPACERS

Semiconductor devices having pFET with SiGe gate electrode and embe...

METHOD TO FORM SELECTIVE STRAINED SI USING LATERAL EPITAXY

SEMICONDUCTOR DEVICE WITH DOPED TRANSISTOR