Zhixing ZHAO

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device having a gate contact over an active region
- Patent number 12,046,670
- Issue date Jul 23, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Zhixing Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bipolar transistor structures with base having varying horizontal w...
- Patent number 11,916,109
- Issue date Feb 27, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Peter Baars
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure including transistor using buried insulator layer as gate...
- Patent number 11,837,605
- Issue date Dec 5, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Tom Herrmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress layout optimization for device performance
- Patent number 11,664,432
- Issue date May 30, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Dirk Utess
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
FERROELECTRIC MEMORY DEVICE WITH MULTI-LEVEL BIT CELL
- Publication number 20240284680
- Publication date Aug 22, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Zhixing Zhao
- G11 - INFORMATION STORAGE
Information Patent Application
LATERAL CAPACITORS OF SEMICONDUCTOR DEVICES
- Publication number 20240234448
- Publication date Jul 11, 2024
- GLOBALFOUNDRIES U.S. Inc.
- DAVID PRITCHARD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE WITH BACK-GATE HAVING OPPOSITELY DOPED SEMICONDUCTOR REGIONS
- Publication number 20240170576
- Publication date May 23, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Zhixing Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FERROELECTRIC FIELD-EFFECT TRANSISTORS WITH A HYBRID WELL
- Publication number 20240120420
- Publication date Apr 11, 2024
- GLOBALFOUNDRIES Dresden Module One Limited Liability Company & Co. KG
- Stefan Dünkel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BUILT-IN TEMPERATURE SENSORS
- Publication number 20240068879
- Publication date Feb 29, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Zhixing ZHAO
- G01 - MEASURING TESTING
Information Patent Application
STRUCTURE INCLUDING TRANSISTOR USING BURIED INSULATOR LAYER AS GATE...
- Publication number 20240055434
- Publication date Feb 15, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Tom Herrmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BUILT-IN TEMPERATURE SENSORS
- Publication number 20240035898
- Publication date Feb 1, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Zhixing ZHAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BIPOLAR TRANSISTOR STRUCTURES WITH BASE HAVING VARYING HORIZONTAL W...
- Publication number 20230290829
- Publication date Sep 14, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Peter Baars
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS LAYOUT OPTIMIZATION FOR DEVICE PERFORMANCE
- Publication number 20230238439
- Publication date Jul 27, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Dirk UTESS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK-GATE CONTROLLED POWER AMPLIFIER
- Publication number 20230198474
- Publication date Jun 22, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Yiching CHEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH SPACER SIZED FOR GATE CONTACT AND...
- Publication number 20230131403
- Publication date Apr 27, 2023
- GLOBALFOUNDRIES U.S. Inc.
- David C. Pritchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING A GATE CONTACT OVER AN ACTIVE REGION
- Publication number 20230102787
- Publication date Mar 30, 2023
- GLOBALFOUNDRIES U.S. Inc.
- ZHIXING ZHAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS LAYOUT OPTIMIZATION FOR DEVICE PERFORMANCE
- Publication number 20210066463
- Publication date Mar 4, 2021
- GLOBALFOUNDRIES INC.
- Dirk UTESS
- H01 - BASIC ELECTRIC ELEMENTS

Zhixing ZHAO

Person

Patents Grantslast 30 patents

Semiconductor device having a gate contact over an active region

Bipolar transistor structures with base having varying horizontal w...

Structure including transistor using buried insulator layer as gate...

Stress layout optimization for device performance

Patents Applicationslast 30 patents

FERROELECTRIC MEMORY DEVICE WITH MULTI-LEVEL BIT CELL

LATERAL CAPACITORS OF SEMICONDUCTOR DEVICES

STRUCTURE WITH BACK-GATE HAVING OPPOSITELY DOPED SEMICONDUCTOR REGIONS

FERROELECTRIC FIELD-EFFECT TRANSISTORS WITH A HYBRID WELL

BUILT-IN TEMPERATURE SENSORS

STRUCTURE INCLUDING TRANSISTOR USING BURIED INSULATOR LAYER AS GATE...

BUILT-IN TEMPERATURE SENSORS

BIPOLAR TRANSISTOR STRUCTURES WITH BASE HAVING VARYING HORIZONTAL W...

STRESS LAYOUT OPTIMIZATION FOR DEVICE PERFORMANCE

BACK-GATE CONTROLLED POWER AMPLIFIER

INTEGRATED CIRCUIT STRUCTURE WITH SPACER SIZED FOR GATE CONTACT AND...

SEMICONDUCTOR DEVICE HAVING A GATE CONTACT OVER AN ACTIVE REGION

STRESS LAYOUT OPTIMIZATION FOR DEVICE PERFORMANCE