AC testing

Industry

CPC
G01R31/318577

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Parent Industries

GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/318577AC testing

Industries

Patents Grantslast 30 patents

Information Patent Grant
Scan testing using scan frames with embedded commands
- Patent number 11,879,941
- Issue date Jan 23, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Wafer scale testing using a 2 signal JTAG interface
- Patent number 11,782,091
- Issue date Oct 10, 2023
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan testing using scan frames with embedded commands
- Patent number 11,740,286
- Issue date Aug 29, 2023
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
TSV testing using test circuits and grounding means
- Patent number 11,644,503
- Issue date May 9, 2023
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Controller structural testing with automated test vectors
- Patent number 11,598,808
- Issue date Mar 7, 2023
- Micron Technology, Inc.
- Michael Richard Spica
- G11 - INFORMATION STORAGE
Information Patent Grant
Wafer scale testing using a 2 signal JTAG interface
- Patent number 11,561,258
- Issue date Jan 24, 2023
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
TSV testing using test circuits and grounding means
- Patent number 11,467,210
- Issue date Oct 11, 2022
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Wafer scale testing using a 2 signal JTAG interface
- Patent number 11,243,253
- Issue date Feb 8, 2022
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC test architecture having differential data input and output buffers
- Patent number 11,137,447
- Issue date Oct 5, 2021
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Controller structural testing with automated test vectors
- Patent number 10,976,367
- Issue date Apr 13, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G11 - INFORMATION STORAGE
Information Patent Grant
Channel circuitry, tap linking module, scan tap, debug tap domains
- Patent number 10,901,033
- Issue date Jan 26, 2021
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
TSVS, test circuits, scan cells, comparators, electrical source, an...
- Patent number 10,901,034
- Issue date Jan 26, 2021
- Texas Instruments Incorporated
- Lee D. Whetsei
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 10,855,413
- Issue date Dec 1, 2020
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for at-speed scan shift frequency test optimiz...
- Patent number 10,746,795
- Issue date Aug 18, 2020
- NXP USA, INC.
- Sergey Sofer
- G01 - MEASURING TESTING
Information Patent Grant
IC TSV scan cells with sensed and reference voltage inputs
- Patent number 10,605,866
- Issue date Mar 31, 2020
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Input shift register having parallel serial scan outputs, command o...
- Patent number 10,591,542
- Issue date Mar 17, 2020
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Wafer with dio bidirectional lead, n dies, domains, clock leads
- Patent number 10,551,438
- Issue date Feb 4, 2020
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for monitoring quality and controlling an alterna...
- Patent number 10,288,680
- Issue date May 14, 2019
- General Electric Company
- Hyun Chul Kim
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
TSV first ends connected to test stimulus and response signals
- Patent number 10,267,856
- Issue date Apr 23, 2019
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Wafer tap domain die channel circuitry with separate die clocks
- Patent number 10,209,305
- Issue date Feb 19, 2019
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boundary scan testing a storage device via system management bus in...
- Patent number 10,162,006
- Issue date Dec 25, 2018
- Western Digital Technologies, Inc.
- Gobinathan Athimolom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan circuitry with IDDQ verification
- Patent number 10,139,448
- Issue date Nov 27, 2018
- NXP USA, INC.
- John M. Pigott
- G01 - MEASURING TESTING
Information Patent Grant
Cores with separate serial scan paths and scan path parts
- Patent number 10,120,027
- Issue date Nov 6, 2018
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Differential I/O for parallel scan paths, scan frames, embedded com...
- Patent number 10,088,527
- Issue date Oct 2, 2018
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Two signal JTAG with TLM, scan domain and diagnostics domain
- Patent number 10,060,980
- Issue date Aug 28, 2018
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip performance monitoring system and method
- Patent number 10,006,964
- Issue date Jun 26, 2018
- International Business Machines Corporation
- Margaret R. Charlebois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two signal JTAG wafter testing bist and scan tap domains
- Patent number 9,897,654
- Issue date Feb 20, 2018
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing TSV with current/voltage source, resistor, comparator, and...
- Patent number 9,880,222
- Issue date Jan 30, 2018
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Scan testing scan frames with embedded commands and differential si...
- Patent number 9,714,980
- Issue date Jul 25, 2017
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Low power scan path cells with hold state multiplexer circuitry
- Patent number 9,684,033
- Issue date Jun 20, 2017
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS
- Publication number 20240012050
- Publication date Jan 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS
- Publication number 20230384376
- Publication date Nov 30, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
Array of Through-Silicon Via Contact Points on a Semiconductor Die
- Publication number 20230273258
- Publication date Aug 31, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20230160959
- Publication date May 25, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS
- Publication number 20220317182
- Publication date Oct 6, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20220113351
- Publication date Apr 14, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS
- Publication number 20210405113
- Publication date Dec 30, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS
- Publication number 20210102996
- Publication date Apr 8, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20210088584
- Publication date Mar 25, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS
- Publication number 20200191867
- Publication date Jun 18, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS
- Publication number 20200174068
- Publication date Jun 4, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20200124667
- Publication date Apr 23, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS
- Publication number 20190195945
- Publication date Jun 27, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20190120899
- Publication date Apr 25, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR MONITORING QUALITY AND CONTROLLING AN ALTERNA...
- Publication number 20190113567
- Publication date Apr 18, 2019
- GENERAL ELECTRIC COMPANY
- Hyun Chul Kim
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Application
SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS
- Publication number 20180364305
- Publication date Dec 20, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20180321307
- Publication date Nov 8, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20180128875
- Publication date May 10, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS
- Publication number 20180106863
- Publication date Apr 19, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS
- Publication number 20170285103
- Publication date Oct 5, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR AT-SPEED SCAN SHIFT FREQUENCY TEST OPTIMIZ...
- Publication number 20150276869
- Publication date Oct 1, 2015
- Sergey Sofer
- G01 - MEASURING TESTING
Information Patent Application
AUTOMATABLE SCAN PARTITIONING FOR LOW POWER USING EXTERNAL CONTROL
- Publication number 20140250342
- Publication date Sep 4, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Jayashree Saxena
- G01 - MEASURING TESTING
Information Patent Application
Circuit and Method for Measuring Delays between Edges of Signals of...
- Publication number 20140208178
- Publication date Jul 24, 2014
- Mentor Graphics Corporation
- Stephen Kenneth Sunter
- G01 - MEASURING TESTING
Information Patent Application
CHIP PERFORMANCE MONITORING SYSTEM AND METHOD
- Publication number 20140195196
- Publication date Jul 10, 2014
- International Business Machines Corporation
- Margaret R. Charlebois
- G01 - MEASURING TESTING
Information Patent Application
ADAPTING SCAN ARCHITECTURES FOR LOW POWER OPERATION
- Publication number 20140095952
- Publication date Apr 3, 2014
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS
- Publication number 20140075254
- Publication date Mar 13, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
AUTOMATABLE SCAN PARTITIONING FOR LOW POWER USING EXTERNAL CONTROL
- Publication number 20130339773
- Publication date Dec 19, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Jayashree Saxena
- G01 - MEASURING TESTING
Information Patent Application
Circuit And Method For Simultaneously Measuring Multiple Changes In...
- Publication number 20130305111
- Publication date Nov 14, 2013
- Mentor Graphics Corporation
- Stephen Kenneth Sunter
- G01 - MEASURING TESTING
Information Patent Application
ADAPTING SCAN-BIST ARCHITECTURES FOR LOW POWER OPERATION
- Publication number 20130290800
- Publication date Oct 31, 2013
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20130272360
- Publication date Oct 17, 2013
- Jared Zerbe
- G01 - MEASURING TESTING

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Scan testing using scan frames with embedded commands

Wafer scale testing using a 2 signal JTAG interface

Scan testing using scan frames with embedded commands

TSV testing using test circuits and grounding means

Controller structural testing with automated test vectors

Wafer scale testing using a 2 signal JTAG interface

TSV testing using test circuits and grounding means

Wafer scale testing using a 2 signal JTAG interface

IC test architecture having differential data input and output buffers

Controller structural testing with automated test vectors

Channel circuitry, tap linking module, scan tap, debug tap domains

TSVS, test circuits, scan cells, comparators, electrical source, an...

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for at-speed scan shift frequency test optimiz...

IC TSV scan cells with sensed and reference voltage inputs

Input shift register having parallel serial scan outputs, command o...

Wafer with dio bidirectional lead, n dies, domains, clock leads

Method and system for monitoring quality and controlling an alterna...

TSV first ends connected to test stimulus and response signals

Wafer tap domain die channel circuitry with separate die clocks

Boundary scan testing a storage device via system management bus in...

Scan circuitry with IDDQ verification

Cores with separate serial scan paths and scan path parts

Differential I/O for parallel scan paths, scan frames, embedded com...

Two signal JTAG with TLM, scan domain and diagnostics domain

Chip performance monitoring system and method

Two signal JTAG wafter testing bist and scan tap domains

Testing TSV with current/voltage source, resistor, comparator, and...

Scan testing scan frames with embedded commands and differential si...

Low power scan path cells with hold state multiplexer circuitry

Patents Applicationslast 30 patents

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

Array of Through-Silicon Via Contact Points on a Semiconductor Die

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

METHOD AND SYSTEM FOR MONITORING QUALITY AND CONTROLLING AN ALTERNA...

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

TSV TESTING USING TEST CIRCUITS AND GROUNDING MEANS

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

METHOD AND APPARATUS FOR AT-SPEED SCAN SHIFT FREQUENCY TEST OPTIMIZ...

AUTOMATABLE SCAN PARTITIONING FOR LOW POWER USING EXTERNAL CONTROL

Circuit and Method for Measuring Delays between Edges of Signals of...

CHIP PERFORMANCE MONITORING SYSTEM AND METHOD

ADAPTING SCAN ARCHITECTURES FOR LOW POWER OPERATION

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

AUTOMATABLE SCAN PARTITIONING FOR LOW POWER USING EXTERNAL CONTROL

Circuit And Method For Simultaneously Measuring Multiple Changes In...

ADAPTING SCAN-BIST ARCHITECTURES FOR LOW POWER OPERATION

Method And Apparatus For Evaluating And Optimizing A Signaling System