BER [Bit Error Rate] test

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CPC
G01R31/3171

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

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G01R31/3171BER [Bit Error Rate] test

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Automatic test system and automatic test method for integrated-circ...
- Patent number 12,158,494
- Issue date Dec 3, 2024
- Kingston Digital, Inc.
- Chao-Kun Lee
- B65 - CONVEYING PACKING STORING HANDLING THIN OR FILAMENTARY MATERIAL
Information Patent Grant
Systems, methods, and storage media for detecting a security intrus...
- Patent number 12,160,320
- Issue date Dec 3, 2024
- Level 3 Communications, LLC
- Steven E. Drake
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method, a device and a computer program for operating a modular tes...
- Patent number 12,153,091
- Issue date Nov 26, 2024
- Volkswagen Aktiengesellschaft
- Andreas Aal
- G01 - MEASURING TESTING
Information Patent Grant
Test system, test method, and non-transitory computer readable medium
- Patent number 12,146,910
- Issue date Nov 19, 2024
- Kioxia Corporation
- Kazuhiko Nakahara
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for avoiding collision between data
- Patent number 12,140,627
- Issue date Nov 12, 2024
- Hyundai Mobis Co., Ltd.
- Sung Hoon Bang
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Telephone connector to audio connector mapping and leveling device
- Patent number 12,140,633
- Issue date Nov 12, 2024
- Tony Dux
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Classifying comparators based on comparator offsets
- Patent number 12,134,713
- Issue date Nov 5, 2024
- Microchip Technology Incorporated
- Zhi-Yuan Zou
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Grant
Electronic component testing system and time certification method
- Patent number 12,135,350
- Issue date Nov 5, 2024
- CHROMA ATE INC.
- Tzu-Ching Yang
- G01 - MEASURING TESTING
Information Patent Grant
Interface to full and reduced pin JTAG devices
- Patent number 12,130,328
- Issue date Oct 29, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Reconfigurable JTAG architecture for implementation of programmable...
- Patent number 12,123,912
- Issue date Oct 22, 2024
- University of Florida Research Foundation, Incorporated
- Swarup Bhunia
- G01 - MEASURING TESTING
Information Patent Grant
Array of unit cells having pad structures
- Patent number 12,123,909
- Issue date Oct 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Ching Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan frame based test access mechanisms
- Patent number 12,117,490
- Issue date Oct 15, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Protection of the content of a fuse memory
- Patent number 12,117,487
- Issue date Oct 15, 2024
- STMicroelectronics (Grenoble 2) SAS
- Mark Trimmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods and devices for high-speed input/output margin tes...
- Patent number 12,117,486
- Issue date Oct 15, 2024
- Daniel S. Froelich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine learning for syncing multiple FPGA ports in a quantum system
- Patent number 12,111,352
- Issue date Oct 8, 2024
- Quantum Machines
- Avishai Ziv
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure testing mode
- Patent number 12,105,139
- Issue date Oct 1, 2024
- Advanced Micro Devices, Inc.
- Vidyashankar Viswanathan
- G01 - MEASURING TESTING
Information Patent Grant
Scan test in a single-wire bus circuit
- Patent number 12,092,689
- Issue date Sep 17, 2024
- Qorvo US, Inc.
- Alexander Wayne Hietala
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for electrically coupling a unit under test wi...
- Patent number 12,092,686
- Issue date Sep 17, 2024
- Western Digital Technologies, Inc.
- Aleksandr Dean Schwerdt
- G01 - MEASURING TESTING
Information Patent Grant
Applications of adaptive microelectronic circuits that are designed...
- Patent number 12,085,611
- Issue date Sep 10, 2024
- Minima Processor Oy
- Lauri Koskinen
- G01 - MEASURING TESTING
Information Patent Grant
Flip flop standard cell
- Patent number 12,063,041
- Issue date Aug 13, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Nick Samra
- G11 - INFORMATION STORAGE
Information Patent Grant
Margin test data tagging and predictive expected margins
- Patent number 12,061,232
- Issue date Aug 13, 2024
- Tektronix, Inc.
- Sam J. Strickling
- G01 - MEASURING TESTING
Information Patent Grant
Decompression circuit, circuit generation method, and IC chip
- Patent number 12,050,248
- Issue date Jul 30, 2024
- Huawei Technologies Co., Ltd.
- Yu Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method, product, and system for protocol state graph neural network...
- Patent number 12,038,477
- Issue date Jul 16, 2024
- Cadence Design Systems, Inc.
- Shadi Saba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit-corrector circuits for photonic circuits with cascaded photonic...
- Patent number 12,032,023
- Issue date Jul 9, 2024
- Milkshake Technology Inc.
- Bicky A. Marquez
- G01 - MEASURING TESTING
Information Patent Grant
System and method for receiver equalization and stressed eye testin...
- Patent number 12,032,018
- Issue date Jul 9, 2024
- Huawei Technologies Co., Ltd.
- Gang Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit, chip and semiconductor device
- Patent number 12,021,537
- Issue date Jun 25, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chao Chieh Li
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus having on-chip fail safe logic for I/O signal in high int...
- Patent number 12,020,978
- Issue date Jun 25, 2024
- Texas Instruments Incorporated
- Sam Gnana Sabapathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die-to-die and chip-to-chip connectivity monitoring
- Patent number 12,013,800
- Issue date Jun 18, 2024
- PROTEANTECS LTD.
- Eyal Fayneh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wireless electronic-control system
- Patent number 12,000,887
- Issue date Jun 4, 2024
- Lam Research Corporation
- Christopher-James Parker
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit including test circuit and method of manufacturi...
- Patent number 12,000,888
- Issue date Jun 4, 2024
- Samsung Electronics Co., Ltd.
- Changho Han
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...
- Publication number 20240418774
- Publication date Dec 19, 2024
- HCL America Inc.
- MANICKAM MUTHIAH
- G01 - MEASURING TESTING
Information Patent Application
VERIFICATION METHOD AND VERIFICATION DEVICE
- Publication number 20240385240
- Publication date Nov 21, 2024
- REALTEK SEMICONDUCTOR CORPORATION
- Xianghua SHEN
- G01 - MEASURING TESTING
Information Patent Application
ARRAY OF UNIT CELLS HAVING PAD STRUCTURES
- Publication number 20240369626
- Publication date Nov 7, 2024
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Yu-Ching CHIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCAN TEST IN A SINGLE-WIRE BUS CIRCUIT
- Publication number 20240345162
- Publication date Oct 17, 2024
- Qorvo US, Inc.
- Alexander Wayne Hietala
- G11 - INFORMATION STORAGE
Information Patent Application
System and Method for Utilizing Idle Computing Capacity
- Publication number 20240329133
- Publication date Oct 3, 2024
- Tapster Robotics, Inc.
- Jason Randolph Huggins
- G01 - MEASURING TESTING
Information Patent Application
MEMORY TIMING CHARACTERIZATION CIRCUITRY
- Publication number 20240319269
- Publication date Sep 26, 2024
- Intel Corporation
- Amit Agarwal
- G01 - MEASURING TESTING
Information Patent Application
BIT-CORRECTOR CIRCUITS FOR PHOTONIC CIRCUITS WITH CASCADED PHOTONIC...
- Publication number 20240310438
- Publication date Sep 19, 2024
- Milkshake Technology Inc.
- Bicky A. Marquez
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT, CHIP AND SEMICONDUCTOR DEVICE
- Publication number 20240305301
- Publication date Sep 12, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- CHAO CHIEH LI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH THROUGHPUT SORT
- Publication number 20240302431
- Publication date Sep 12, 2024
- INFINEON TECHNOLOGIES AG
- David Addison
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM ACCESS BOUNDARY SCAN VIA SYSTEM SIDEBAND SIGNAL CONNECTIONS
- Publication number 20240288497
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Application
SCAN CHAIN SECURITY CIRCUIT AND DRIVING METHOD THEREOF
- Publication number 20240280633
- Publication date Aug 22, 2024
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- Sungho KANG
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS AND METHOD FOR AVOIDING COLLISION BETWEEN DATA
- Publication number 20240264228
- Publication date Aug 8, 2024
- HYUNDAI MOBIS CO., LTD.
- Sung Hoon BANG
- B60 - VEHICLES IN GENERAL
Information Patent Application
BACKGROUND READS FOR SOLID STATE STORAGE
- Publication number 20240265982
- Publication date Aug 8, 2024
- PURE STORAGE, INC.
- Hari Kannan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT
- Publication number 20240264230
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
NPU CAPABLE OF BEING TESTED DURING RUNTIME
- Publication number 20240264226
- Publication date Aug 8, 2024
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUNDANT ANALOG BUILT-IN SELF TEST
- Publication number 20240259023
- Publication date Aug 1, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy Paul Duryea
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TEST SYSTEM THAT CONVERTS COMMAND SYNTAXES
- Publication number 20240241173
- Publication date Jul 18, 2024
- Teradyne, Inc.
- Richard W. FANNING
- G01 - MEASURING TESTING
Information Patent Application
SECURED SCAN ACCESS FOR A DEVICE INCLUDING A SCAN CHAIN
- Publication number 20240241174
- Publication date Jul 18, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir KAWOOSA
- G01 - MEASURING TESTING
Information Patent Application
PATTERN GENERATION SYSTEM WITH PIN FUNCTION MAPPING
- Publication number 20240230756
- Publication date Jul 11, 2024
- Yangtze Memory Technologies Co., Ltd.
- Feng Ru
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT TESTING
- Publication number 20240175919
- Publication date May 30, 2024
- TouchNetix AS
- Steinar MYREN
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE, DEBUG SYSTEM, AND DEBUG METHOD
- Publication number 20240168089
- Publication date May 23, 2024
- RENESAS ELECTRONICS CORPORATION
- Masahide MATSUMOTO
- G01 - MEASURING TESTING
Information Patent Application
CAN TRANSCEIVER AND METHOD FOR THE CAN TRANSCEIVER
- Publication number 20240168090
- Publication date May 23, 2024
- NXP B.V.
- Lucas Pieter Lodewijk van Dijk
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR REAL TIME OUTLIER DETECTION AND PRODUCT RE-BI...
- Publication number 20240159813
- Publication date May 16, 2024
- Optimal Plus
- Shaul Teplinsky
- B07 - SEPARATING SOLIDS FROM SOLIDS SORTING
Information Patent Application
METHOD, DEVICE, AND SYSTEM FOR DETECTING FUSE CONFIGURATION FOR TRI...
- Publication number 20240159827
- Publication date May 16, 2024
- Samsung Electronics Co., Ltd.
- Jaecheol Lee
- G01 - MEASURING TESTING
Information Patent Application
Method for performing multiple circuit tests with multiple instrume...
- Publication number 20240159826
- Publication date May 16, 2024
- REALTEK SEMICONDUCTOR CORPORATION
- CHUNG-YI WANG
- G01 - MEASURING TESTING
Information Patent Application
TEST MODE CONTROL CIRCUIT, SEMICONDUCTOR APPARATUS AND SYSTEM, AND...
- Publication number 20240159828
- Publication date May 16, 2024
- SK HYNIX INC.
- Jin Suk OH
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED TEST CELL USING ACTIVE THERMAL INTERPOSER (ATI) WITH PAR...
- Publication number 20240133943
- Publication date Apr 25, 2024
- ADVANTEST TEST SOLUTIONS, INC.
- Karthik RANGANATHAN
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS, METHODS, AND STORAGE MEDIA FOR DETECTING A SECURITY INTRUS...
- Publication number 20240129074
- Publication date Apr 18, 2024
- LEVEL 3 COMMUNICATIONS, LLC
- Steven E. Drake
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM, METHOD FOR CIRCUIT VALIDATION, AND SYSTEM AND METHOD FOR FA...
- Publication number 20240118339
- Publication date Apr 11, 2024
- SK HYNIX INC.
- YU-AN CHEN
- G01 - MEASURING TESTING
Information Patent Application
Secure Remote Debugging
- Publication number 20240110975
- Publication date Apr 4, 2024
- Intel Corporation
- Tsvika Kurts
- G01 - MEASURING TESTING

BER [Bit Error Rate] test

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Automatic test system and automatic test method for integrated-circ...

Systems, methods, and storage media for detecting a security intrus...

Method, a device and a computer program for operating a modular tes...

Test system, test method, and non-transitory computer readable medium

Apparatus and method for avoiding collision between data

Telephone connector to audio connector mapping and leveling device

Classifying comparators based on comparator offsets

Electronic component testing system and time certification method

Interface to full and reduced pin JTAG devices

Reconfigurable JTAG architecture for implementation of programmable...

Array of unit cells having pad structures

Scan frame based test access mechanisms

Protection of the content of a fuse memory

Systems, methods and devices for high-speed input/output margin tes...

Machine learning for syncing multiple FPGA ports in a quantum system

Secure testing mode

Scan test in a single-wire bus circuit

Apparatus and method for electrically coupling a unit under test wi...

Applications of adaptive microelectronic circuits that are designed...

Flip flop standard cell

Margin test data tagging and predictive expected margins

Decompression circuit, circuit generation method, and IC chip

Method, product, and system for protocol state graph neural network...

Bit-corrector circuits for photonic circuits with cascaded photonic...

System and method for receiver equalization and stressed eye testin...

Circuit, chip and semiconductor device

Apparatus having on-chip fail safe logic for I/O signal in high int...

Die-to-die and chip-to-chip connectivity monitoring

Wireless electronic-control system

Integrated circuit including test circuit and method of manufacturi...

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...

VERIFICATION METHOD AND VERIFICATION DEVICE

ARRAY OF UNIT CELLS HAVING PAD STRUCTURES

SCAN TEST IN A SINGLE-WIRE BUS CIRCUIT

System and Method for Utilizing Idle Computing Capacity

MEMORY TIMING CHARACTERIZATION CIRCUITRY

BIT-CORRECTOR CIRCUITS FOR PHOTONIC CIRCUITS WITH CASCADED PHOTONIC...

CIRCUIT, CHIP AND SEMICONDUCTOR DEVICE

HIGH THROUGHPUT SORT

SYSTEM ACCESS BOUNDARY SCAN VIA SYSTEM SIDEBAND SIGNAL CONNECTIONS

SCAN CHAIN SECURITY CIRCUIT AND DRIVING METHOD THEREOF

APPARATUS AND METHOD FOR AVOIDING COLLISION BETWEEN DATA

BACKGROUND READS FOR SOLID STATE STORAGE

TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT

NPU CAPABLE OF BEING TESTED DURING RUNTIME

REDUNDANT ANALOG BUILT-IN SELF TEST

TEST SYSTEM THAT CONVERTS COMMAND SYNTAXES

SECURED SCAN ACCESS FOR A DEVICE INCLUDING A SCAN CHAIN

PATTERN GENERATION SYSTEM WITH PIN FUNCTION MAPPING

INTEGRATED CIRCUIT TESTING

SEMICONDUCTOR DEVICE, DEBUG SYSTEM, AND DEBUG METHOD

CAN TRANSCEIVER AND METHOD FOR THE CAN TRANSCEIVER

METHOD AND SYSTEM FOR REAL TIME OUTLIER DETECTION AND PRODUCT RE-BI...

METHOD, DEVICE, AND SYSTEM FOR DETECTING FUSE CONFIGURATION FOR TRI...

Method for performing multiple circuit tests with multiple instrume...

TEST MODE CONTROL CIRCUIT, SEMICONDUCTOR APPARATUS AND SYSTEM, AND...

INTEGRATED TEST CELL USING ACTIVE THERMAL INTERPOSER (ATI) WITH PAR...

SYSTEMS, METHODS, AND STORAGE MEDIA FOR DETECTING A SECURITY INTRUS...

SYSTEM, METHOD FOR CIRCUIT VALIDATION, AND SYSTEM AND METHOD FOR FA...

Secure Remote Debugging