Built-in arrangements for testing

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G11C29/12

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/12Built-in arrangements for testing

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Memory interface circuitry and built-in self-testing method
- Patent number 12,183,411
- Issue date Dec 31, 2024
- Integrated Silicon Solution Inc.
- G11 - INFORMATION STORAGE
Information Patent Grant
Test method for testing decision feedback equalization of memory de...
- Patent number 12,176,051
- Issue date Dec 24, 2024
- NANYA TECHNOLOGY CORPORATION
- Yi-Hsuan Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for on demand access and cache encoding of repair data
- Patent number 12,174,698
- Issue date Dec 24, 2024
- Cypress Semiconductor Corporation
- Senwen Kan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Word line dependent pass voltage ramp rate to improve performance o...
- Patent number 12,176,032
- Issue date Dec 24, 2024
- SANDISK TECHNOLOGIES LLC
- Abu Naser Zainuddin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for initializing memory error correction
- Patent number 12,170,122
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self test circuit for segmented static random access memor...
- Patent number 12,170,120
- Issue date Dec 17, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Hitesh Chawla
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device including command log register and comm...
- Patent number 12,170,121
- Issue date Dec 17, 2024
- Samsung Electronics Co., Ltd.
- Youngsan Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory test circuit, memory array, and testing method of memory array
- Patent number 12,170,123
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method
- Patent number 12,165,725
- Issue date Dec 10, 2024
- Kioxia Corporation
- Ryo Yamaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Test systems configured to perform test mode operations for multipl...
- Patent number 12,159,681
- Issue date Dec 3, 2024
- SK hynix Inc.
- Sang Ah Hyun
- G11 - INFORMATION STORAGE
Information Patent Grant
Storing memory array operational information in non-volatile subarrays
- Patent number 12,158,826
- Issue date Dec 3, 2024
- Micron Technology, Inc.
- Christopher John Kawamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing method and testing system
- Patent number 12,154,641
- Issue date Nov 26, 2024
- NANYA TECHNOLOGY CORPORATION
- Wei-Chun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
At-speed synchronous write-through operation for testing two-port m...
- Patent number 12,148,490
- Issue date Nov 19, 2024
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory control method, memory storage device and memory control cir...
- Patent number 12,147,674
- Issue date Nov 19, 2024
- Hefei Core Storage Electronic Limited
- Chih-Ling Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early detection of programming failure for non-volatile memory
- Patent number 12,148,489
- Issue date Nov 19, 2024
- SANDISK TECHNOLOGIES LLC
- Yi Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller and operating method thereof
- Patent number 12,142,331
- Issue date Nov 12, 2024
- SK hynix Inc.
- Seung Yeol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing circuit for a memory device
- Patent number 12,142,332
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Chunqiang Weng
- G11 - INFORMATION STORAGE
Information Patent Grant
Health scan for content addressable memory
- Patent number 12,142,334
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Tomoko Ogura Iwasaki
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for parallel memory test
- Patent number 12,142,337
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Nitesh Mishra
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device with embedded programmable logic
- Patent number 12,135,660
- Issue date Nov 5, 2024
- Altera Corporation
- Arifur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor storage device and control method of semiconductor st...
- Patent number 12,119,081
- Issue date Oct 15, 2024
- Fujitsu Limited
- Hiroshi Nakadai
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for determining memory cell data states
- Patent number 12,112,819
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Sheyang Ning
- G11 - INFORMATION STORAGE
Information Patent Grant
Test method, computer apparatus, and computer-readable storage medium
- Patent number 12,112,817
- Issue date Oct 8, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Biao Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Read destructive memory wear leveling system
- Patent number 12,112,821
- Issue date Oct 8, 2024
- Seagate Technology LLC
- Jon D. Trantham
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory scheme capable of controlling flash memory device auto...
- Patent number 12,112,816
- Issue date Oct 8, 2024
- Silicon Motion, Inc.
- Tsu-Han Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Repairable latch array
- Patent number 12,100,464
- Issue date Sep 24, 2024
- Advanced Micro Devices, Inc.
- Joel Thornton Irby
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device detecting defect, and operating method...
- Patent number 12,100,463
- Issue date Sep 24, 2024
- Samsung Electronics Co., Ltd.
- Bongkil Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Modular error correction code circuitry
- Patent number 12,094,551
- Issue date Sep 17, 2024
- Intel Corporation
- Hwa Chaw Law
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast search for leaky word line
- Patent number 12,094,550
- Issue date Sep 17, 2024
- SanDisk Technologies, Inc.
- Xingyan Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Defect detection during erase operations
- Patent number 12,094,549
- Issue date Sep 17, 2024
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ABORTED OPERATION DETECTION FOR NONVOLATILE MEMORY WITH NON-UNIFORM...
- Publication number 20240428874
- Publication date Dec 26, 2024
- Western Digital Technologies, Inc.
- Huiwen Xu
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR TESTING MEMORY DEVICE
- Publication number 20240420788
- Publication date Dec 19, 2024
- NANYA TECHNOLOGY CORPORATION
- Yaochang CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-CALIBRATION IN A MEMORY DEVICE
- Publication number 20240420789
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Jennifer E. Taylor
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION
- Publication number 20240420752
- Publication date Dec 19, 2024
- SK HYNIX INC.
- Woongrae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-CALIBRATION IN A MEMORY DEVICE
- Publication number 20240420790
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Jennifer E. Taylor
- G11 - INFORMATION STORAGE
Information Patent Application
TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMO...
- Publication number 20240412795
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR TESTING MEMORY DEVICE
- Publication number 20240412800
- Publication date Dec 12, 2024
- NANYA TECHNOLOGY CORPORATION
- Jui-Chung HSU
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION
- Publication number 20240412794
- Publication date Dec 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yoshisato Yokoyama
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR WRITE DATA PRECONDITIONING USING A NEUR...
- Publication number 20240412796
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Fa-Long Luo
- G11 - INFORMATION STORAGE
Information Patent Application
Fully Scannable Memory Arrays
- Publication number 20240412797
- Publication date Dec 12, 2024
- SambaNova Systems, Inc.
- Thomas A. ZIAJA
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20240412801
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Scanning a Memory Array
- Publication number 20240412798
- Publication date Dec 12, 2024
- SambaNova Systems, Inc.
- Thomas ZIAJA
- G11 - INFORMATION STORAGE
Information Patent Application
Circuits And Methods For Memory Built-In-Self-Tests
- Publication number 20240412799
- Publication date Dec 12, 2024
- Altera Corporation
- Kok Wah Khor
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS
- Publication number 20240412803
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Qun Su
- G11 - INFORMATION STORAGE
Information Patent Application
DEFECT DETECTION DURING ERASE OPERATIONS
- Publication number 20240404615
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Application
RUNTIME ALERT SIGNAL ACTIVATION TEST MODE
- Publication number 20240404617
- Publication date Dec 5, 2024
- Intel Corporation
- Kuljit S. Bains
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...
- Publication number 20240404616
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
DATA CLUSTERING SYSTEM AND READ VOLTAGE DETERMINATION APPARATUS FOR...
- Publication number 20240404618
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Jae Yong SON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY FAILURE ANALYSIS BASED ON BITLINE THRESHOLD VOLTAGE DISTRIBU...
- Publication number 20240395348
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Kyle B. Brock-Petersen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER, STORAGE DEVICE, AND OPERATING METHOD OF STORAGE...
- Publication number 20240395347
- Publication date Nov 28, 2024
- SK HYNIX INC.
- Taek Gyu LEE
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR DETECTING AN ERROR IN AN ELECTRONIC MEMORY
- Publication number 20240386967
- Publication date Nov 21, 2024
- INSTITUT MINES TELECOM
- Jean-Max DUTERTRE
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR HANDLING FOR REPROJECTION TIMELINE
- Publication number 20240386980
- Publication date Nov 21, 2024
- QUALCOMM Incorporated
- Simon Peter William BOOTH
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR READ DATA PRECONDITIONING USING A NEURA...
- Publication number 20240379181
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Fa-Long Luo
- G11 - INFORMATION STORAGE
Information Patent Application
Interface circuit, memory controller and method for calibrating sig...
- Publication number 20240363183
- Publication date Oct 31, 2024
- SILICON MOTION, INC.
- Fu-Jen Shih
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-LEVEL CELL DATA ENCODING
- Publication number 20240363184
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM
- Publication number 20240363185
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Deping He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RADIATION INDUCED ERROR DETECTION IN SOLID-STATE DEVICES
- Publication number 20240362112
- Publication date Oct 31, 2024
- The Boeing Company
- Mark Joseph Clemen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...
- Publication number 20240355405
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Jae Yong SON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT
- Publication number 20240355406
- Publication date Oct 24, 2024
- SOCIONEXT INC.
- Tatsushi OTSUKA
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Comprising an Electrically Floating Body Transistor a...
- Publication number 20240347634
- Publication date Oct 17, 2024
- Zeno Semiconductor, Inc.
- Jin-Woo Han
- G06 - COMPUTING CALCULATING COUNTING

Built-in arrangements for testing

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory interface circuitry and built-in self-testing method

Test method for testing decision feedback equalization of memory de...

Apparatus for on demand access and cache encoding of repair data

Word line dependent pass voltage ramp rate to improve performance o...

Techniques for initializing memory error correction

Built-in self test circuit for segmented static random access memor...

Semiconductor memory device including command log register and comm...

Memory test circuit, memory array, and testing method of memory array

Memory system and method

Test systems configured to perform test mode operations for multipl...

Storing memory array operational information in non-volatile subarrays

Testing method and testing system

At-speed synchronous write-through operation for testing two-port m...

Memory control method, memory storage device and memory control cir...

Early detection of programming failure for non-volatile memory

Memory controller and operating method thereof

Testing circuit for a memory device

Health scan for content addressable memory

System and method for parallel memory test

Integrated circuit device with embedded programmable logic

Semiconductor storage device and control method of semiconductor st...

Apparatus for determining memory cell data states

Test method, computer apparatus, and computer-readable storage medium

Read destructive memory wear leveling system

Flash memory scheme capable of controlling flash memory device auto...

Repairable latch array

Semiconductor memory device detecting defect, and operating method...

Modular error correction code circuitry

Fast search for leaky word line

Defect detection during erase operations

Patents Applicationslast 30 patents

ABORTED OPERATION DETECTION FOR NONVOLATILE MEMORY WITH NON-UNIFORM...

SYSTEM AND METHOD FOR TESTING MEMORY DEVICE

SELF-CALIBRATION IN A MEMORY DEVICE

SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION

SELF-CALIBRATION IN A MEMORY DEVICE

TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMO...

SYSTEM AND METHOD FOR TESTING MEMORY DEVICE

SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION

APPARATUSES AND METHODS FOR WRITE DATA PRECONDITIONING USING A NEUR...

Fully Scannable Memory Arrays

TECHNIQUES FOR DETECTING A STATE OF A BUS

Method for Scanning a Memory Array

Circuits And Methods For Memory Built-In-Self-Tests

REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS

DEFECT DETECTION DURING ERASE OPERATIONS

RUNTIME ALERT SIGNAL ACTIVATION TEST MODE

SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...

DATA CLUSTERING SYSTEM AND READ VOLTAGE DETERMINATION APPARATUS FOR...

MEMORY FAILURE ANALYSIS BASED ON BITLINE THRESHOLD VOLTAGE DISTRIBU...

MEMORY CONTROLLER, STORAGE DEVICE, AND OPERATING METHOD OF STORAGE...

METHOD FOR DETECTING AN ERROR IN AN ELECTRONIC MEMORY

ERROR HANDLING FOR REPROJECTION TIMELINE

APPARATUSES AND METHODS FOR READ DATA PRECONDITIONING USING A NEURA...

Interface circuit, memory controller and method for calibrating sig...

MULTI-LEVEL CELL DATA ENCODING

TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM

RADIATION INDUCED ERROR DETECTION IN SOLID-STATE DEVICES

APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...

MEMORY CIRCUIT

Memory Device Comprising an Electrically Floating Body Transistor a...