Built-in arrangements for testing

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G11C29/12

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

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G11C29/12Built-in arrangements for testing

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Built-in self-test circuits for memory systems having multiple chan...
- Patent number 12,230,345
- Issue date Feb 18, 2025
- Samsung Electronics Co., Ltd.
- Jaewon Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Word line layer dependent stress and screen voltage
- Patent number 12,230,344
- Issue date Feb 18, 2025
- SanDisk Technologies, Inc.
- Yidan Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point memory read technique to mitigate drift errors
- Patent number 12,230,346
- Issue date Feb 18, 2025
- Intel Corporation
- Hemant P. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Laser detecting circuit and semiconductor apparatus including the same
- Patent number 12,230,588
- Issue date Feb 18, 2025
- Samsung Electronics Co., Ltd.
- Cheolhwan Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Controller to detect malfunctioning address of memory device
- Patent number 12,230,350
- Issue date Feb 18, 2025
- RAMBUS INC.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and information processing system for testing storage...
- Patent number 12,224,027
- Issue date Feb 11, 2025
- Kioxia Corporation
- Masayoshi Sato
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array test structure and method of forming the same
- Patent number 12,217,826
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Meng-Han Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable logic device with design for test functionality
- Patent number 12,217,811
- Issue date Feb 4, 2025
- QuickLogic Corporation
- Ket Chong Yap
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory testing system and memory testing method
- Patent number 12,217,815
- Issue date Feb 4, 2025
- NANYA TECHNOLOGY CORPORATION
- Chien Yu Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Test mode state machine for a memory device
- Patent number 12,210,766
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Rucha Deepak Geedh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test circuit and method for reading data from a memory device durin...
- Patent number 12,211,570
- Issue date Jan 28, 2025
- Realtek Semiconductor Corp.
- Li-Wei Deng
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst indicator systems and methods
- Patent number 12,211,573
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and memory system
- Patent number 12,211,572
- Issue date Jan 28, 2025
- Samsung Electronics Co., Ltd.
- Kyoungho Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
On-die testing for a memory device
- Patent number 12,211,571
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- David W. Overgaard
- G11 - INFORMATION STORAGE
Information Patent Grant
Test controller enabling a snapshot restore and resume operation wi...
- Patent number 12,205,660
- Issue date Jan 21, 2025
- SanDisk Technologies, Inc.
- Eran Moshe
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for testing inaccessible interface circuits i...
- Patent number 12,196,805
- Issue date Jan 14, 2025
- RAMBUS INC.
- Frederick A. Ware
- G01 - MEASURING TESTING
Information Patent Grant
Memory chip test method and apparatus, medium, and device
- Patent number 12,198,773
- Issue date Jan 14, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Beiyou Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device sideband systems and methods
- Patent number 12,198,774
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Joshua E. Alzheimer
- G11 - INFORMATION STORAGE
Information Patent Grant
Metadata storage at a memory device
- Patent number 12,198,776
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory and operation method thereof
- Patent number 12,190,935
- Issue date Jan 7, 2025
- SK Hynix Inc.
- Sang Woo Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device performing sensing operation and method of operating...
- Patent number 12,190,973
- Issue date Jan 7, 2025
- SK Hynix Inc.
- Se Chun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive DSP generation of read thresholds for gaussian and non-gau...
- Patent number 12,190,975
- Issue date Jan 7, 2025
- Beijing Tenafe Electronic Technology Co., Ltd.
- Yingquan Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Data coding device, memory controller, and storage device
- Patent number 12,190,988
- Issue date Jan 7, 2025
- SK Hynix Inc.
- Ie Ryung Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for checking data, electronic device, and storage...
- Patent number 12,190,976
- Issue date Jan 7, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jia Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory interface circuitry and built-in self-testing method
- Patent number 12,183,411
- Issue date Dec 31, 2024
- Integrated Silicon Solution Inc.
- Hyeon Jae Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Test method for testing decision feedback equalization of memory de...
- Patent number 12,176,051
- Issue date Dec 24, 2024
- NANYA TECHNOLOGY CORPORATION
- Yi-Hsuan Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for on demand access and cache encoding of repair data
- Patent number 12,174,698
- Issue date Dec 24, 2024
- Cypress Semiconductor Corporation
- Senwen Kan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Word line dependent pass voltage ramp rate to improve performance o...
- Patent number 12,176,032
- Issue date Dec 24, 2024
- SANDISK TECHNOLOGIES LLC
- Abu Naser Zainuddin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for initializing memory error correction
- Patent number 12,170,122
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self test circuit for segmented static random access memor...
- Patent number 12,170,120
- Issue date Dec 17, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Hitesh Chawla
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LOGIC DEVICE AND SYSTEM AND METHODS FOR DEFINITION AND CONFIGURATIO...
- Publication number 20250061958
- Publication date Feb 20, 2025
- MENTA
- Clément AYME
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND MEMORY TEST SYSTEM THEREOF
- Publication number 20250061957
- Publication date Feb 20, 2025
- Samsung Electronics Co., Ltd.
- Seokwoo Lee
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING METHOD AND MEMORY MODULE UNDER TEST
- Publication number 20250046391
- Publication date Feb 6, 2025
- NANYA TECHNOLOGY CORPORATION
- Wei-Chun CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
WORDLINE RAMP RATE MONITOR FOR EARLY DETECTION OF DEFECT ACTIVATION
- Publication number 20250046390
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Fulvio Rori
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER FOR CONTROLLING BACKGROUND OPERATION AND OPERATIO...
- Publication number 20250037779
- Publication date Jan 30, 2025
- Samsung Electronics Co., Ltd.
- Sangsoo Cha
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC FUSE DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250037780
- Publication date Jan 30, 2025
- Faraday Technology Corp.
- Chi-Chou Huang
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20250031455
- Publication date Jan 23, 2025
- Advantest Corporation
- Shinji SUGATANI
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK GENERATION CIRCUITS FOR MEMORY DEVICES WITH BUILT-IN SELF TEST
- Publication number 20250022526
- Publication date Jan 16, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Che Tsai
- G11 - INFORMATION STORAGE
Information Patent Application
HEAT GENERATION CONTROL FOR MEMORY SYSTEM EVALUATION
- Publication number 20250022528
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Natalia Tarazona Cordoba
- G01 - MEASURING TESTING
Information Patent Application
MEMORY DEVICE AND METHOD FOR CALIBRATING IMPEDANCE THEREOF
- Publication number 20250022524
- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- YOUNGSAN KANG
- G11 - INFORMATION STORAGE
Information Patent Application
DATA TRANSFER OVER AN INTERCONNECT BETWEEN DIES OF A THREE-DIMENSIO...
- Publication number 20250022527
- Publication date Jan 16, 2025
- Intel Corporation
- Santhosh Kumar Chandrakanthan
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE AND OPERATING METHOD OF CONTROLLER OF STORAGE DEVICE
- Publication number 20250022525
- Publication date Jan 16, 2025
- SK HYNIX INC.
- Young Gyun KIM
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE DETERMINING DETERIORATION WORDLINE, AND METHOD OF OP...
- Publication number 20250014664
- Publication date Jan 9, 2025
- Samsung Electronics Co., Ltd.
- Minji Cho
- G11 - INFORMATION STORAGE
Information Patent Application
TRIPLE VIA CHAIN FOR ADVANCED INTERCONNECT IN A MEMORY DEVICE
- Publication number 20250014665
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Ivo Thomas Wambeke
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT
- Publication number 20250014667
- Publication date Jan 9, 2025
- ROHM CO., LTD.
- Daigo FUJIMURA
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCE
- Publication number 20250006288
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Jiahui Yuan
- G11 - INFORMATION STORAGE
Information Patent Application
EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORY
- Publication number 20250006285
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH LAYOUT ADAPTIVE PROBLEMATIC WORD LINE DETE...
- Publication number 20250006287
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Xuan Tian
- G11 - INFORMATION STORAGE
Information Patent Application
RECONFIGURABLE MBIST METHOD BASED ON ADAPTIVE MARCH ALGORITHM
- Publication number 20250006289
- Publication date Jan 2, 2025
- Nanjing University Of Posts And Telecommunications
- Zhikuang CAI
- G11 - INFORMATION STORAGE
Information Patent Application
TEST CIRCUIT AND SEMICONDUCTOR MEMORY SYSTEM INCLUDING THE TEST CIR...
- Publication number 20250006291
- Publication date Jan 2, 2025
- SK HYNIX INC.
- Jong Seok JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
HOST-TO-DEVICE INTERFACE CIRCUITRY TESTING
- Publication number 20250006290
- Publication date Jan 2, 2025
- ADVANCED MICRO DEVICES, INC.
- Nehal Patel
- G11 - INFORMATION STORAGE
Information Patent Application
ABORTED OPERATION DETECTION FOR NONVOLATILE MEMORY WITH NON-UNIFORM...
- Publication number 20240428874
- Publication date Dec 26, 2024
- Western Digital Technologies, Inc.
- Huiwen Xu
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR TESTING MEMORY DEVICE
- Publication number 20240420788
- Publication date Dec 19, 2024
- NANYA TECHNOLOGY CORPORATION
- Yaochang CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION
- Publication number 20240420752
- Publication date Dec 19, 2024
- SK HYNIX INC.
- Woongrae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-CALIBRATION IN A MEMORY DEVICE
- Publication number 20240420789
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Jennifer E. Taylor
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-CALIBRATION IN A MEMORY DEVICE
- Publication number 20240420790
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Jennifer E. Taylor
- G11 - INFORMATION STORAGE
Information Patent Application
TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMO...
- Publication number 20240412795
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR TESTING MEMORY DEVICE
- Publication number 20240412800
- Publication date Dec 12, 2024
- NANYA TECHNOLOGY CORPORATION
- Jui-Chung HSU
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION
- Publication number 20240412794
- Publication date Dec 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yoshisato Yokoyama
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR WRITE DATA PRECONDITIONING USING A NEUR...
- Publication number 20240412796
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Fa-Long Luo
- G11 - INFORMATION STORAGE

Built-in arrangements for testing

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Built-in self-test circuits for memory systems having multiple chan...

Word line layer dependent stress and screen voltage

Cross-point memory read technique to mitigate drift errors

Laser detecting circuit and semiconductor apparatus including the same

Controller to detect malfunctioning address of memory device

Memory system and information processing system for testing storage...

Memory array test structure and method of forming the same

Programmable logic device with design for test functionality

Memory testing system and memory testing method

Test mode state machine for a memory device

Test circuit and method for reading data from a memory device durin...

Burst indicator systems and methods

Semiconductor device and memory system

On-die testing for a memory device

Test controller enabling a snapshot restore and resume operation wi...

Methods and apparatus for testing inaccessible interface circuits i...

Memory chip test method and apparatus, medium, and device

Memory device sideband systems and methods

Metadata storage at a memory device

Memory and operation method thereof

Memory device performing sensing operation and method of operating...

Adaptive DSP generation of read thresholds for gaussian and non-gau...

Data coding device, memory controller, and storage device

Method and device for checking data, electronic device, and storage...

Memory interface circuitry and built-in self-testing method

Test method for testing decision feedback equalization of memory de...

Apparatus for on demand access and cache encoding of repair data

Word line dependent pass voltage ramp rate to improve performance o...

Techniques for initializing memory error correction

Built-in self test circuit for segmented static random access memor...

Patents Applicationslast 30 patents

LOGIC DEVICE AND SYSTEM AND METHODS FOR DEFINITION AND CONFIGURATIO...

MEMORY DEVICE AND MEMORY TEST SYSTEM THEREOF

TESTING METHOD AND MEMORY MODULE UNDER TEST

WORDLINE RAMP RATE MONITOR FOR EARLY DETECTION OF DEFECT ACTIVATION

MEMORY CONTROLLER FOR CONTROLLING BACKGROUND OPERATION AND OPERATIO...

ELECTRONIC FUSE DEVICE AND OPERATION METHOD THEREOF

THREE-DIMENSIONAL DEVICE AND MANUFACTURING METHOD THEREOF

CLOCK GENERATION CIRCUITS FOR MEMORY DEVICES WITH BUILT-IN SELF TEST

HEAT GENERATION CONTROL FOR MEMORY SYSTEM EVALUATION

MEMORY DEVICE AND METHOD FOR CALIBRATING IMPEDANCE THEREOF

DATA TRANSFER OVER AN INTERCONNECT BETWEEN DIES OF A THREE-DIMENSIO...

STORAGE DEVICE AND OPERATING METHOD OF CONTROLLER OF STORAGE DEVICE

STORAGE DEVICE DETERMINING DETERIORATION WORDLINE, AND METHOD OF OP...

TRIPLE VIA CHAIN FOR ADVANCED INTERCONNECT IN A MEMORY DEVICE

MEMORY CIRCUIT

NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCE

EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORY

NON-VOLATILE MEMORY WITH LAYOUT ADAPTIVE PROBLEMATIC WORD LINE DETE...

RECONFIGURABLE MBIST METHOD BASED ON ADAPTIVE MARCH ALGORITHM

TEST CIRCUIT AND SEMICONDUCTOR MEMORY SYSTEM INCLUDING THE TEST CIR...

HOST-TO-DEVICE INTERFACE CIRCUITRY TESTING

ABORTED OPERATION DETECTION FOR NONVOLATILE MEMORY WITH NON-UNIFORM...

SYSTEM AND METHOD FOR TESTING MEMORY DEVICE

SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION

SELF-CALIBRATION IN A MEMORY DEVICE

SELF-CALIBRATION IN A MEMORY DEVICE

TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMO...

SYSTEM AND METHOD FOR TESTING MEMORY DEVICE

SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION

APPARATUSES AND METHODS FOR WRITE DATA PRECONDITIONING USING A NEUR...