Built-in tests

Industry

CPC
G01R31/3187

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Parent Industries

GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/3187Built-in tests

Industries

Patents Grantslast 30 patents

Information Patent Grant
Multiple clock and clock cycle selection for x-tolerant logic built...
- Patent number 12,117,488
- Issue date Oct 15, 2024
- Synopsys, Inc.
- Peter Wohl
- G01 - MEASURING TESTING
Information Patent Grant
Built in self-test of heterogeneous integrated radio frequency chip...
- Patent number 12,099,092
- Issue date Sep 24, 2024
- PseudolithIC, Inc.
- James Buckwalter
- G01 - MEASURING TESTING
Information Patent Grant
Scan test in a single-wire bus circuit
- Patent number 12,092,689
- Issue date Sep 17, 2024
- Qorvo US, Inc.
- Alexander Wayne Hietala
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip debugging device and method
- Patent number 12,085,612
- Issue date Sep 10, 2024
- Suzhou Centec Communications Co., Ltd.
- Fushan Jia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In system test of chips in functional systems
- Patent number 12,078,678
- Issue date Sep 3, 2024
- NVIDIA Corporation
- Shantanu Sarangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wrapper cell design and built-in self-test architecture for 3DIC te...
- Patent number 12,066,490
- Issue date Aug 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Anshuman Chandra
- G01 - MEASURING TESTING
Information Patent Grant
Bit-corrector circuits for photonic circuits with cascaded photonic...
- Patent number 12,032,023
- Issue date Jul 9, 2024
- Milkshake Technology Inc.
- Bicky A. Marquez
- G01 - MEASURING TESTING
Information Patent Grant
Lockstep comparators and related methods
- Patent number 12,025,659
- Issue date Jul 2, 2024
- Texas Instruments Incorporated
- Prasanth Viswanathan Pillai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Analog built-in self-test scheme for high volume power management i...
- Patent number 12,025,662
- Issue date Jul 2, 2024
- Avago Technologies International Sales Pte. Limited
- Shengyuan Li
- G01 - MEASURING TESTING
Information Patent Grant
Chip and chip test method
- Patent number 12,019,117
- Issue date Jun 25, 2024
- Shanghai Biren Technology Co., Ltd
- Kai Lei
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus having on-chip fail safe logic for I/O signal in high int...
- Patent number 12,020,978
- Issue date Jun 25, 2024
- Texas Instruments Incorporated
- Sam Gnana Sabapathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single “A” latch with an array of “B” latches
- Patent number 11,961,575
- Issue date Apr 16, 2024
- SambaNova Systems, Inc.
- Thomas A. Ziaja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip providing on-chip self-testing of an ana-log-to-...
- Patent number 11,962,320
- Issue date Apr 16, 2024
- Intel Corporation
- Kameran Azadet
- G01 - MEASURING TESTING
Information Patent Grant
Test architecture for electronic circuits, corresponding device and...
- Patent number 11,940,492
- Issue date Mar 26, 2024
- STMicroelectronics S.r.l.
- Lorenzo Re Fiorentin
- G01 - MEASURING TESTING
Information Patent Grant
Built in self-test of heterogeneous integrated radio frequency chip...
- Patent number 11,940,495
- Issue date Mar 26, 2024
- PseudolithIC, Inc.
- James Buckwalter
- G01 - MEASURING TESTING
Information Patent Grant
Gyroscope with self-test
- Patent number 11,920,931
- Issue date Mar 5, 2024
- Murata Manufacturing Co., Ltd.
- Heikki Kuisma
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for performing built-in-self-test operations wi...
- Patent number 11,906,585
- Issue date Feb 20, 2024
- Samsung Electronics Co., Ltd.
- A Santosh Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Grant
Basic logic element, semiconductor device including the same, outpu...
- Patent number 11,899,062
- Issue date Feb 13, 2024
- NEC Space Technologies, Ltd.
- Hiroki Hihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test method for control chip and related device
- Patent number 11,867,758
- Issue date Jan 9, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Chuanqi Shi
- G11 - INFORMATION STORAGE
Information Patent Grant
Device for transmitting commands with circuit of circuit board to t...
- Patent number 11,853,183
- Issue date Dec 26, 2023
- INVENTEC (PUDONG) TECHNOLOGY CORPORATION
- Tian-Chao Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with reference sub-system for testing and replac...
- Patent number 11,852,676
- Issue date Dec 26, 2023
- STMicroelectronics S.r.l.
- Carlo Caimi
- G01 - MEASURING TESTING
Information Patent Grant
Built in self test (BIST) for clock generation circuitry
- Patent number 11,821,946
- Issue date Nov 21, 2023
- NXP USA, INC.
- Jorge Arturo Corso Sarmiento
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated communication link testing
- Patent number 11,789,070
- Issue date Oct 17, 2023
- Tektronix, Inc.
- Pirooz Hojabri
- G01 - MEASURING TESTING
Information Patent Grant
Wafer scale testing using a 2 signal JTAG interface
- Patent number 11,782,091
- Issue date Oct 10, 2023
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Re-programmable self-test
- Patent number 11,768,240
- Issue date Sep 26, 2023
- Texas Instruments Incorporated
- Neil John Simpson
- G11 - INFORMATION STORAGE
Information Patent Grant
Test systems for executing self-testing in deployed automotive plat...
- Patent number 11,768,241
- Issue date Sep 26, 2023
- NVIDIA Corporation
- Anitha Kalva
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for protecting a reconfigurable digital integrated circuit a...
- Patent number 11,762,722
- Issue date Sep 19, 2023
- Thales
- Yann Oster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit device and operating method thereof
- Patent number 11,740,285
- Issue date Aug 29, 2023
- Kioxia Corporation
- Yuusuke Takahashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Built in self-test of heterogeneous integrated radio frequency chip...
- Patent number 11,733,297
- Issue date Aug 22, 2023
- PseudolithIC, Inc.
- James Buckwaiter
- G01 - MEASURING TESTING
Information Patent Grant
In-system test of chips in functional systems
- Patent number 11,726,139
- Issue date Aug 15, 2023
- NVIDIA Corporation
- Shantanu Sarangi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Te...
- Publication number 20240361385
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Anshuman Chandra
- G01 - MEASURING TESTING
Information Patent Application
SCAN TEST IN A SINGLE-WIRE BUS CIRCUIT
- Publication number 20240345162
- Publication date Oct 17, 2024
- Qorvo US, Inc.
- Alexander Wayne Hietala
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT IN SELF-TEST OF HETEROGENEOUS INTEGRATED RADIO FREQUENCY CHIP...
- Publication number 20240329136
- Publication date Oct 3, 2024
- PseudolithIC, Inc.
- James Buckwalter
- G01 - MEASURING TESTING
Information Patent Application
INFIELD TEST AND DEBUG
- Publication number 20240329130
- Publication date Oct 3, 2024
- Rakesh KANDULA
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF-TEST ENHANCEMENTS
- Publication number 20240319268
- Publication date Sep 26, 2024
- QUALCOMM Incorporated
- Gaurav VERMA
- B60 - VEHICLES IN GENERAL
Information Patent Application
BIT-CORRECTOR CIRCUITS FOR PHOTONIC CIRCUITS WITH CASCADED PHOTONIC...
- Publication number 20240310438
- Publication date Sep 19, 2024
- Milkshake Technology Inc.
- Bicky A. Marquez
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS AND TEST ELEMENT GROUP
- Publication number 20240302433
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- FUMIE UCHIDA
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF TEST CIRCUIT FOR MEASURING PERFORMANCE OF CLOCK DATA...
- Publication number 20240302432
- Publication date Sep 12, 2024
- Samsung Electronics Co., Ltd.
- Hobin SONG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DISTRIBUTED BUILT-IN SELF-TEST AND MONITORING
- Publication number 20240295601
- Publication date Sep 5, 2024
- QUALCOMM Incorporated
- Zdravko LUKIC
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
AREA, COST, AND TIME-EFFECTIVE SCAN COVERAGE IMPROVEMENT
- Publication number 20240250668
- Publication date Jul 25, 2024
- STMicroelectronics International N.V.
- Venkata Narayanan Srinivasan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SINGLE "A" LATCH WITH AN ARRAY OF "B" LATCHES
- Publication number 20240249791
- Publication date Jul 25, 2024
- SambaNova Systems, Inc.
- Thomas ZIAJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
- Publication number 20240210473
- Publication date Jun 27, 2024
- Samsung Electronics Co., Ltd.
- Jangmok Yoo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-DIAGNOSIS CIRCUIT AND SEMICONDUCTOR DEVICE
- Publication number 20240175922
- Publication date May 30, 2024
- Rohm Co., Ltd.
- Ryosuke SUMII
- G01 - MEASURING TESTING
Information Patent Application
ACTIVE BRIDGE FOR CHIPLET AND MODULE INTER-COMMUNICATION
- Publication number 20240103065
- Publication date Mar 28, 2024
- International Business Machines Corporation
- Arvind Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT DIAGNOSIS CIRCUIT, METHOD, AND APPARATUS, AND COMPUTER READAB...
- Publication number 20240069098
- Publication date Feb 29, 2024
- HORIZON (SHANGHAI) ARTIFICIAL INTELLIGENCE TECHNOLOGY CO., LTD.
- Zheng WU
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED COMMUNICATION LINK TESTING
- Publication number 20240044975
- Publication date Feb 8, 2024
- Tektronix, Inc.
- Pirooz Hojabri
- G01 - MEASURING TESTING
Information Patent Application
METHOD, SYSTEM AND DEVICE OF SERIALIZING AND DE-SERIALIZING THE DEL...
- Publication number 20240027526
- Publication date Jan 25, 2024
- Sounil Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE
- Publication number 20240003974
- Publication date Jan 4, 2024
- Ampere Computing LLC
- Sandeep BRAHMADATHAN
- G01 - MEASURING TESTING
Information Patent Application
Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Te...
- Publication number 20230366930
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Anshuman Chandra
- G01 - MEASURING TESTING
Information Patent Application
IN SYSTEM TEST OF CHIPS IN FUNCTIONAL SYSTEMS
- Publication number 20230349970
- Publication date Nov 2, 2023
- NVIDIA Corporation
- Shantanu Sarangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-FIELD LATENT FAULT MEMORY AND LOGIC TESTING USING STRUCTURAL TEC...
- Publication number 20230314508
- Publication date Oct 5, 2023
- Intel Corporation
- Elik Haran
- G01 - MEASURING TESTING
Information Patent Application
DEVICE FOR TRANSMITTING COMMANDS WITH CIRCUIT OF CIRCUIT BOARD TO T...
- Publication number 20230297481
- Publication date Sep 21, 2023
- INVENTEC (PUDONG) TECHNOLOGY CORPORATION
- Tian-Chao ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT WITH RESILIENT SYSTEM
- Publication number 20230258709
- Publication date Aug 17, 2023
- STMicroelectronics S.r.l.
- Carlo CAIMI
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN TESTING IN MODULAR SYSTEM-ON-CHIP DEVICE
- Publication number 20230258720
- Publication date Aug 17, 2023
- Marvell Asia Pte Ltd.
- Xiongzhi Ning
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND SYSTEMS FOR PERFORMING BUILT-IN-SELF-TEST OPERATIONS WI...
- Publication number 20230194608
- Publication date Jun 22, 2023
- Samsung Electronics Co., Ltd.
- A Santosh Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Application
CHIP AND CHIP TEST METHOD
- Publication number 20230176118
- Publication date Jun 8, 2023
- Shanghai Biren Technology Co.,Ltd
- Kai LEI
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20230160959
- Publication date May 25, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FOOTPRINT FOR MULTI-BIT FLIP FLOP
- Publication number 20230090614
- Publication date Mar 23, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Chun WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BUILT IN SELF TEST (BIST) FOR CLOCK GENERATION CIRCUITRY
- Publication number 20230079000
- Publication date Mar 16, 2023
- NXP USA, Inc.
- Jorge Arturo Corso Sarmiento
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR PROTECTING A RECONFIGURABLE DIGITAL INTEGRATED CIRCUIT A...
- Publication number 20230051943
- Publication date Feb 16, 2023
- THALES
- Yann OSTER
- H03 - BASIC ELECTRONIC CIRCUITRY

Built-in tests

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Multiple clock and clock cycle selection for x-tolerant logic built...

Built in self-test of heterogeneous integrated radio frequency chip...

Scan test in a single-wire bus circuit

On-chip debugging device and method

In system test of chips in functional systems

Wrapper cell design and built-in self-test architecture for 3DIC te...

Bit-corrector circuits for photonic circuits with cascaded photonic...

Lockstep comparators and related methods

Analog built-in self-test scheme for high volume power management i...

Chip and chip test method

Apparatus having on-chip fail safe logic for I/O signal in high int...

Single “A” latch with an array of “B” latches

Semiconductor chip providing on-chip self-testing of an ana-log-to-...

Test architecture for electronic circuits, corresponding device and...

Built in self-test of heterogeneous integrated radio frequency chip...

Gyroscope with self-test

Methods and systems for performing built-in-self-test operations wi...

Basic logic element, semiconductor device including the same, outpu...

Test method for control chip and related device

Device for transmitting commands with circuit of circuit board to t...

Integrated circuit with reference sub-system for testing and replac...

Built in self test (BIST) for clock generation circuitry

Integrated communication link testing

Wafer scale testing using a 2 signal JTAG interface

Re-programmable self-test

Test systems for executing self-testing in deployed automotive plat...

Method for protecting a reconfigurable digital integrated circuit a...

Semiconductor integrated circuit device and operating method thereof

Built in self-test of heterogeneous integrated radio frequency chip...

In-system test of chips in functional systems

Patents Applicationslast 30 patents

Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Te...

SCAN TEST IN A SINGLE-WIRE BUS CIRCUIT

BUILT IN SELF-TEST OF HETEROGENEOUS INTEGRATED RADIO FREQUENCY CHIP...

INFIELD TEST AND DEBUG

BUILT-IN SELF-TEST ENHANCEMENTS

BIT-CORRECTOR CIRCUITS FOR PHOTONIC CIRCUITS WITH CASCADED PHOTONIC...

APPARATUS AND TEST ELEMENT GROUP

BUILT-IN SELF TEST CIRCUIT FOR MEASURING PERFORMANCE OF CLOCK DATA...

DISTRIBUTED BUILT-IN SELF-TEST AND MONITORING

AREA, COST, AND TIME-EFFECTIVE SCAN COVERAGE IMPROVEMENT

SINGLE "A" LATCH WITH AN ARRAY OF "B" LATCHES

SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

SELF-DIAGNOSIS CIRCUIT AND SEMICONDUCTOR DEVICE

ACTIVE BRIDGE FOR CHIPLET AND MODULE INTER-COMMUNICATION

FAULT DIAGNOSIS CIRCUIT, METHOD, AND APPARATUS, AND COMPUTER READAB...

INTEGRATED COMMUNICATION LINK TESTING

METHOD, SYSTEM AND DEVICE OF SERIALIZING AND DE-SERIALIZING THE DEL...

COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE

Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Te...

IN SYSTEM TEST OF CHIPS IN FUNCTIONAL SYSTEMS

IN-FIELD LATENT FAULT MEMORY AND LOGIC TESTING USING STRUCTURAL TEC...

DEVICE FOR TRANSMITTING COMMANDS WITH CIRCUIT OF CIRCUIT BOARD TO T...

INTEGRATED CIRCUIT WITH RESILIENT SYSTEM

BUILT-IN TESTING IN MODULAR SYSTEM-ON-CHIP DEVICE

METHODS AND SYSTEMS FOR PERFORMING BUILT-IN-SELF-TEST OPERATIONS WI...

CHIP AND CHIP TEST METHOD

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

FOOTPRINT FOR MULTI-BIT FLIP FLOP

BUILT IN SELF TEST (BIST) FOR CLOCK GENERATION CIRCUITRY

METHOD FOR PROTECTING A RECONFIGURABLE DIGITAL INTEGRATED CIRCUIT A...