by chemical means

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H01L2224/82031

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/82031by chemical means

Industries

Patents Grantslast 30 patents

Information Patent Grant
Stacked integrated circuits with redistribution lines
- Patent number 11,923,338
- Issue date Mar 5, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Ying Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wiring substrate, semiconductor package having the wiring substrate...
- Patent number 11,908,783
- Issue date Feb 20, 2024
- Amkor Technology Singapore Holding Pte Ltd.
- Naoki Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing method of semiconductor structure
- Patent number 11,735,555
- Issue date Aug 22, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked chip package and methods of manufacture thereof
- Patent number 11,664,349
- Issue date May 30, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wiring substrate, semiconductor package having the wiring substrate...
- Patent number 11,189,553
- Issue date Nov 30, 2021
- Amkor Technology Singapore Holding Pte Ltd.
- Naoki Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure
- Patent number 11,183,475
- Issue date Nov 23, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with through silicon via structure
- Patent number 11,081,427
- Issue date Aug 3, 2021
- United Microelectronics Corp.
- Zhao-Bing Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D stacked-chip package
- Patent number 10,971,417
- Issue date Apr 6, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and method of forming
- Patent number 10,861,809
- Issue date Dec 8, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked chip package and methods of manufacture thereof
- Patent number 10,840,217
- Issue date Nov 17, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing semiconductor device with through silicon...
- Patent number 10,784,185
- Issue date Sep 22, 2020
- United Microelectronics Corp.
- Zhao-Bing Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronics package having a multi-thickness conductor layer and me...
- Patent number 10,770,444
- Issue date Sep 8, 2020
- General Electric Company
- Risto Ilkka Tuominen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor device and semiconductor device
- Patent number 10,741,505
- Issue date Aug 11, 2020
- TOSHIBA MEMORY CORPORATION
- Masaya Shima
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure and method thereof
- Patent number 10,734,249
- Issue date Aug 4, 2020
- Silergy Semiconductor Technology (Hangzhou) Ltd.
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming substrate including embe...
- Patent number 10,665,662
- Issue date May 26, 2020
- STATS ChipPAC Pte. Ltd.
- JinHee Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked integrated circuits with redistribution lines
- Patent number 10,629,568
- Issue date Apr 21, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Ying Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure
- Patent number 10,629,560
- Issue date Apr 21, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded silicon substrate fan-out type 3D packaging structure
- Patent number 10,559,525
- Issue date Feb 11, 2020
- HUATIAN TECHNOLOGY (KUNSHAN) ELECTRONICS CO., LTD.
- Daquan Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with through silicon via structure and method...
- Patent number 10,546,801
- Issue date Jan 28, 2020
- United Microelectronics Corp.
- Zhao-Bing Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D Chip-on-wager-on-substrate structure with via last process
- Patent number 10,535,631
- Issue date Jan 14, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and method of forming
- Patent number 10,510,698
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3DIC interconnect apparatus and method
- Patent number 10,510,729
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D stacked-chip package
- Patent number 10,373,885
- Issue date Aug 6, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through-substrate-vias with self-aligned solder bumps
- Patent number 10,347,600
- Issue date Jul 9, 2019
- International Business Machines Corporation
- David W. Abraham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing an interposer-chip-arrangement for dense packag...
- Patent number 10,340,254
- Issue date Jul 2, 2019
- AMS AG
- Jochen Kraft
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through-substrate-vias with self-aligned solder bumps
- Patent number 10,325,870
- Issue date Jun 18, 2019
- International Business Machines Corporation
- David W. Abraham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure and method therof
- Patent number 10,319,608
- Issue date Jun 11, 2019
- Silergy Semiconductor Technology (Hangzhou) Ltd.
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked integrated circuits with redistribution lines
- Patent number 10,269,768
- Issue date Apr 23, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Ying Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package structure and method for forming the same
- Patent number 10,256,210
- Issue date Apr 9, 2019
- Mediatek Inc.
- Tzu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming substrate including embe...
- Patent number 10,236,337
- Issue date Mar 19, 2019
- STATS ChipPAC Pte. Ltd.
- JinHee Jung
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
STACKED INTEGRATED CIRCUITS WITH REDISTRIBUTION LINES
- Publication number 20240170457
- Publication date May 23, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Cheng-Ying Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
- Publication number 20220077097
- Publication date Mar 10, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...
- Publication number 20220044991
- Publication date Feb 10, 2022
- Amkor Technology Singapore Holding Pte. Ltd
- Naoki HAYASHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH THROUGH SILICON VIA STRUCTURE
- Publication number 20200381340
- Publication date Dec 3, 2020
- United Microelectronics Corp.
- Zhao-Bing LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Integrated Circuits with Redistribution Lines
- Publication number 20200258865
- Publication date Aug 13, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Ying Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE
- Publication number 20200251439
- Publication date Aug 6, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jie CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure and Method of Forming
- Publication number 20200118956
- Publication date Apr 16, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH THROUGH SILICON...
- Publication number 20200105647
- Publication date Apr 2, 2020
- United Microelectronics Corp.
- Zhao-Bing LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...
- Publication number 20200066623
- Publication date Feb 27, 2020
- J-DEVICES CORPORATION
- Naoki HAYASHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D STACKED-CHIP PACKAGE
- Publication number 20190355640
- Publication date Nov 21, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Integrated Circuits with Redistribution Lines
- Publication number 20190252354
- Publication date Aug 15, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Ying Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE STRUCTURE AND METHOD THEREOF
- Publication number 20190198351
- Publication date Jun 27, 2019
- SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
- Publication number 20190139908
- Publication date May 9, 2019
- Toshiba Memory Corporation
- Masaya SHIMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3DIC Interconnect Apparatus and Method
- Publication number 20190115322
- Publication date Apr 18, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PRODUCING AN INTERPOSER-CHIP-ARRANGEMENT FOR DENSE PACKAG...
- Publication number 20180096969
- Publication date Apr 5, 2018
- ams AG
- Jochen KRAFT
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Substrate Including Embe...
- Publication number 20180053819
- Publication date Feb 22, 2018
- STATS ChipPAC Pte Ltd.
- JinHee Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3DIC Interconnect Apparatus and Method
- Publication number 20180012870
- Publication date Jan 11, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20170373038
- Publication date Dec 28, 2017
- MEDIATEK INC.
- Tzu-Hung LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3DIC Interconnect Apparatus and Method
- Publication number 20160351546
- Publication date Dec 1, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BUMPLESS BUILD-UP LAYER PACKAGE INCLUDING A RELEASE LAYER
- Publication number 20160141265
- Publication date May 19, 2016
- Intel Corporation
- Liwen Jin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3DIC Interconnect Apparatus and Method
- Publication number 20150179612
- Publication date Jun 25, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Making an Embedded Wafer Level B...
- Publication number 20140367848
- Publication date Dec 18, 2014
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CREATING A 3D STACKED MULTICHIP MODULE
- Publication number 20140363922
- Publication date Dec 11, 2014
- Macronix International Co., Ltd.
- Shih-Hung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BUMPLESS BUILD-UP LAYER PACKAGE INCLUDING A RELEASE LAYER
- Publication number 20140177193
- Publication date Jun 26, 2014
- Liwen Jin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE FOR SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE USING TH...
- Publication number 20140167276
- Publication date Jun 19, 2014
- SK HYNIX INC.
- Seung Jee KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ELECTRICALLY CONNECTING WAFERS USING BUTTING CONTACT STR...
- Publication number 20140138847
- Publication date May 22, 2014
- SILICONFILE TECHNOLOGIES INC.
- In Gyun Jeon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW PROFILE SURFACE MOUNT PACKAGE WITH ISOLATED TAB
- Publication number 20140133104
- Publication date May 15, 2014
- GENERAL ELECTRIC COMPANY
- Eladio Clemente Delgado
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGE HAVING NON-COPLANAR, ENCAPSULATED MICROELEC...
- Publication number 20140048959
- Publication date Feb 20, 2014
- Chuan Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED FAN-OUT SEMICONDUCTOR CHIP
- Publication number 20140015131
- Publication date Jan 16, 2014
- Intel Mobile Communications GmbH
- Thorsten Meyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Via Structure For Three-Dimensional Circuit Integration
- Publication number 20130307160
- Publication date Nov 21, 2013
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS

by chemical means

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Stacked integrated circuits with redistribution lines

Wiring substrate, semiconductor package having the wiring substrate...

Manufacturing method of semiconductor structure

Stacked chip package and methods of manufacture thereof

Wiring substrate, semiconductor package having the wiring substrate...

Semiconductor structure

Semiconductor device with through silicon via structure

3D stacked-chip package

Semiconductor structure and method of forming

Stacked chip package and methods of manufacture thereof

Method for manufacturing semiconductor device with through silicon...

Electronics package having a multi-thickness conductor layer and me...

Method of manufacturing semiconductor device and semiconductor device

Package structure and method thereof

Semiconductor device and method of forming substrate including embe...

Stacked integrated circuits with redistribution lines

Semiconductor structure

Embedded silicon substrate fan-out type 3D packaging structure

Semiconductor device with through silicon via structure and method...

3D Chip-on-wager-on-substrate structure with via last process

Semiconductor structure and method of forming

3DIC interconnect apparatus and method

3D stacked-chip package

Through-substrate-vias with self-aligned solder bumps

Method of producing an interposer-chip-arrangement for dense packag...

Through-substrate-vias with self-aligned solder bumps

Package structure and method therof

Stacked integrated circuits with redistribution lines

Semiconductor package structure and method for forming the same

Semiconductor device and method of forming substrate including embe...

Patents Applicationslast 30 patents

STACKED INTEGRATED CIRCUITS WITH REDISTRIBUTION LINES

MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE

WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...

SEMICONDUCTOR DEVICE WITH THROUGH SILICON VIA STRUCTURE

Stacked Integrated Circuits with Redistribution Lines

SEMICONDUCTOR STRUCTURE

Semiconductor Structure and Method of Forming

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH THROUGH SILICON...

WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...

3D STACKED-CHIP PACKAGE

Stacked Integrated Circuits with Redistribution Lines

PACKAGE STRUCTURE AND METHOD THEREOF

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

3DIC Interconnect Apparatus and Method

METHOD OF PRODUCING AN INTERPOSER-CHIP-ARRANGEMENT FOR DENSE PACKAG...

Semiconductor Device and Method of Forming Substrate Including Embe...

3DIC Interconnect Apparatus and Method

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

3DIC Interconnect Apparatus and Method

BUMPLESS BUILD-UP LAYER PACKAGE INCLUDING A RELEASE LAYER

3DIC Interconnect Apparatus and Method

Semiconductor Device and Method of Making an Embedded Wafer Level B...

METHOD FOR CREATING A 3D STACKED MULTICHIP MODULE

BUMPLESS BUILD-UP LAYER PACKAGE INCLUDING A RELEASE LAYER

SUBSTRATE FOR SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE USING TH...

METHOD FOR ELECTRICALLY CONNECTING WAFERS USING BUTTING CONTACT STR...

LOW PROFILE SURFACE MOUNT PACKAGE WITH ISOLATED TAB

MICROELECTRONIC PACKAGE HAVING NON-COPLANAR, ENCAPSULATED MICROELEC...

STACKED FAN-OUT SEMICONDUCTOR CHIP

Via Structure For Three-Dimensional Circuit Integration