by skipping over strings of zeroes or ones

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F7/5332by skipping over strings of zeroes or ones

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Patents Grantslast 30 patents

Information Patent Grant
Neural processing accelerator
- Patent number 11,995,027
- Issue date May 28, 2024
- Samsung Electronics Co., Ltd.
- Ilia Ovsiannikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressing like-magnitude partial products in multiply accumulation
- Patent number 11,816,448
- Issue date Nov 14, 2023
- Marvell Asia Pte, Ltd.
- David Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-accumulate “0” data gating
- Patent number 11,656,846
- Issue date May 23, 2023
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural processing accelerator
- Patent number 11,645,224
- Issue date May 9, 2023
- Samsung Electronics Co., Ltd.
- Ilia Ovsiannikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural processing accelerator
- Patent number 11,360,930
- Issue date Jun 14, 2022
- Samsung Electronics Co., Ltd.
- Ilia Ovsiannikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor for neural network computing and processing method o...
- Patent number 11,003,445
- Issue date May 11, 2021
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Jing Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressing like-magnitude partial products in multiply accumulation
- Patent number 10,949,168
- Issue date Mar 16, 2021
- Marvell Asia Pte, Ltd.
- David Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-accumulate “0” data gating
- Patent number 10,853,035
- Issue date Dec 1, 2020
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with booth multiplication
- Patent number 10,776,108
- Issue date Sep 15, 2020
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Jing Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with dynamically adjustable bit width for processing...
- Patent number 10,776,109
- Issue date Sep 15, 2020
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Jing Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with booth multiplication
- Patent number 10,754,646
- Issue date Aug 25, 2020
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Jing Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressing like magnitude partial products in multiply accumulation
- Patent number 10,684,825
- Issue date Jun 16, 2020
- Cavium, LLC
- David Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-accumulate “0” data gating
- Patent number 10,606,559
- Issue date Mar 31, 2020
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-accumulate “0” data gating
- Patent number 10,372,416
- Issue date Aug 6, 2019
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for implementing a multiplication
- Patent number 9,632,752
- Issue date Apr 25, 2017
- IMEC
- Robert Fasthuber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused multiply-adder with booth-encoding
- Patent number 9,256,397
- Issue date Feb 9, 2016
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused multiply-adder with booth-encoding
- Patent number 9,122,517
- Issue date Sep 1, 2015
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NAF conversion apparatus
- Patent number 8,918,441
- Issue date Dec 23, 2014
- Kabushiki Kaisha Toshiba
- Hideo Shimizu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Binary number multiplying method and circuit
- Patent number 8,468,193
- Issue date Jun 18, 2013
- S.A.R.L. Daniel Torno
- Daniel Torno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal processing apparatus and method for performing modular multi...
- Patent number 8,209,369
- Issue date Jun 26, 2012
- Samsung Electronics Co., Ltd.
- Kyung-Hee Lee
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method for finding minimal signed digit with variable multi-bit cod...
- Patent number 8,150,899
- Issue date Apr 3, 2012
- Electronics and Telecommunications Research Institute
- Dae-Won Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier product generation based on encoded data from addressabl...
- Patent number 8,078,662
- Issue date Dec 13, 2011
- Intel Corporation
- Sanu Mathew
- G11 - INFORMATION STORAGE
Information Patent Grant
Canonical signed digit multiplier
- Patent number 8,046,401
- Issue date Oct 25, 2011
- NXP B.V.
- Tianyan Pu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular binary multiplier for signed and unsigned operands of varia...
- Patent number 7,853,635
- Issue date Dec 14, 2010
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transformation method and data transformation circuit capable...
- Patent number 7,849,118
- Issue date Dec 7, 2010
- Princeton Technology Corporation
- Hung-Lun Chien
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for providing a booth multiplier
- Patent number 7,840,629
- Issue date Nov 23, 2010
- Sony Computer Entertainment Inc.
- Koji Hirairi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for digital signal processing, program product th...
- Patent number 7,711,761
- Issue date May 4, 2010
- STMicroelectronics S.r.l.
- Daniele Lo Iacono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Canonical signed digit (CSD) coefficient multiplier with optimization
- Patent number 7,680,872
- Issue date Mar 16, 2010
- VIA Telecom Co., Ltd.
- Alon Saado
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for calculating a multiplication
- Patent number 7,647,367
- Issue date Jan 12, 2010
- Infineon Technologies AG
- Wieland Fischer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary digit multiplications and applications
- Patent number 7,565,391
- Issue date Jul 21, 2009
- The Regents of the University of California
- Te Chiang Hu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLICATION METHOD AND ELECTRONIC CIRCUIT
- Publication number 20250110696
- Publication date Apr 3, 2025
- STMicroelectronics International N.V.
- Fabrice ROMAIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL PROCESSING ACCELERATOR
- Publication number 20230244632
- Publication date Aug 3, 2023
- Samsung Electronics Co., Ltd.
- Ilia Ovsiannikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL PROCESSING ACCELERATOR
- Publication number 20220292049
- Publication date Sep 15, 2022
- Samsung Electronics Co., Ltd.
- Ilia Ovsiannikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSING LIKE-MAGNITUDE PARTIAL PRODUCTS IN MULTIPLY ACCUMULATION
- Publication number 20210182026
- Publication date Jun 17, 2021
- Marvell Asia Pte, Ltd.
- David CARLSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ACCUMULATE "0" DATA GATING
- Publication number 20210141604
- Publication date May 13, 2021
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ACCUMULATE "0" DATA GATING
- Publication number 20200293282
- Publication date Sep 17, 2020
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSING LIKE-MAGNITUDE PARTIAL PRODUCTS IN MULTIPLY ACCUMULATION
- Publication number 20200272419
- Publication date Aug 27, 2020
- Marvell International Ltd.
- David CARLSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSING LIKE MAGNITUDE PARTIAL PRODUCTS IN MULTIPLY ACCUMULATION
- Publication number 20200073637
- Publication date Mar 5, 2020
- CAVIUM, LLC
- David CARLSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ACCUMULATE "0" DATA GATING
- Publication number 20190361674
- Publication date Nov 28, 2019
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR WITH BOOTH MULTIPLICATION
- Publication number 20190227769
- Publication date Jul 25, 2019
- Shanghai Zhaoxin Semiconductor Co., Ltd.
- Jing CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ACCUMULATE "0" DATA GATING
- Publication number 20180314492
- Publication date Nov 1, 2018
- Intel Corporation
- Yaniv Fais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fused Multiply-Adder with Booth-Encoding
- Publication number 20140095568
- Publication date Apr 3, 2014
- MAARTEN J. BOERSMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fused Multiply-Adder with Booth-Encoding
- Publication number 20130332501
- Publication date Dec 12, 2013
- IBM Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Implementing a Multiplication
- Publication number 20130166616
- Publication date Jun 27, 2013
- IMEC
- Robert Fasthuber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAF CONVERSION APPARATUS
- Publication number 20110320511
- Publication date Dec 29, 2011
- Kabushiki Kaisha Toshiba
- Hideo SHIMUZU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Binary Number Multiplying Method and Circuit
- Publication number 20100017451
- Publication date Jan 21, 2010
- Daniel Torno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SIGN-EXTENSION IN A MULTI-PRECISION MULTIPLIER
- Publication number 20090198758
- Publication date Aug 6, 2009
- International Business Machines Corporation
- Harry S. Barowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CANONICAL SIGNED DIGIT MULTIPLIER
- Publication number 20090070394
- Publication date Mar 12, 2009
- NXP B.V.
- Tianyan Pu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR FINDING MINIMAL SIGNED DIGIT WITH VARIABLE MULTI-BIT COD...
- Publication number 20080140742
- Publication date Jun 12, 2008
- Dae-Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Transformation Method and Data Transformation Circuit Capable...
- Publication number 20080109506
- Publication date May 8, 2008
- Hung-Lun Chien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplier product generation based on encoded data from addressabl...
- Publication number 20080098278
- Publication date Apr 24, 2008
- Intel Corporation
- Sanu Mathew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMAL SIGNED-DIGIT RECODING FOR ELLIPTIC CURVE CRYPTOGRAPHY
- Publication number 20080063189
- Publication date Mar 13, 2008
- North Dakota State University
- RAJENDRA KATTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL PROCESSING APPARATUS AND METHOD FOR PERFORMING MODULAR MULTI...
- Publication number 20080065713
- Publication date Mar 13, 2008
- Samsung Electronics Co., Ltd.
- Kyung-Hee Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...
- Publication number 20070233773
- Publication date Oct 4, 2007
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...
- Publication number 20070214205
- Publication date Sep 13, 2007
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatus for providing a booth multiplier
- Publication number 20070203962
- Publication date Aug 30, 2007
- Sony Computer Entertainment Inc.
- Koji Hirairi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic unit
- Publication number 20060184604
- Publication date Aug 17, 2006
- MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- Daisuke Takeuchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Canonical signed digit (CSD) coefficient multiplier with optimization
- Publication number 20060155793
- Publication date Jul 13, 2006
- VIA TELECOM CO., LTD.
- Alon Saado
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logical calculation circuit, logical calculation device, and logica...
- Publication number 20060139844
- Publication date Jun 29, 2006
- Michitaka Kameyama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Binary digit multiplications and applications
- Publication number 20060136541
- Publication date Jun 22, 2006
- Te Chiang Hu
- G06 - COMPUTING CALCULATING COUNTING

by skipping over strings of zeroes or ones

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Neural processing accelerator

Compressing like-magnitude partial products in multiply accumulation

Multiply-accumulate “0” data gating

Neural processing accelerator

Neural processing accelerator

Microprocessor for neural network computing and processing method o...

Compressing like-magnitude partial products in multiply accumulation

Multiply-accumulate “0” data gating

Microprocessor with booth multiplication

Microprocessor with dynamically adjustable bit width for processing...

Microprocessor with booth multiplication

Compressing like magnitude partial products in multiply accumulation

Multiply-accumulate “0” data gating

Multiply-accumulate “0” data gating

System and method for implementing a multiplication

Fused multiply-adder with booth-encoding

Fused multiply-adder with booth-encoding

NAF conversion apparatus

Binary number multiplying method and circuit

Signal processing apparatus and method for performing modular multi...

Method for finding minimal signed digit with variable multi-bit cod...

Multiplier product generation based on encoded data from addressabl...

Canonical signed digit multiplier

Modular binary multiplier for signed and unsigned operands of varia...

Data transformation method and data transformation circuit capable...

Methods and apparatus for providing a booth multiplier

Method and system for digital signal processing, program product th...

Canonical signed digit (CSD) coefficient multiplier with optimization

Apparatus and method for calculating a multiplication

Binary digit multiplications and applications

Patents Applicationslast 30 patents

MULTIPLICATION METHOD AND ELECTRONIC CIRCUIT

NEURAL PROCESSING ACCELERATOR

NEURAL PROCESSING ACCELERATOR

COMPRESSING LIKE-MAGNITUDE PARTIAL PRODUCTS IN MULTIPLY ACCUMULATION

MULTIPLY-ACCUMULATE "0" DATA GATING

MULTIPLY-ACCUMULATE "0" DATA GATING

COMPRESSING LIKE-MAGNITUDE PARTIAL PRODUCTS IN MULTIPLY ACCUMULATION

COMPRESSING LIKE MAGNITUDE PARTIAL PRODUCTS IN MULTIPLY ACCUMULATION

MULTIPLY-ACCUMULATE "0" DATA GATING

MICROPROCESSOR WITH BOOTH MULTIPLICATION

MULTIPLY-ACCUMULATE "0" DATA GATING

Fused Multiply-Adder with Booth-Encoding

Fused Multiply-Adder with Booth-Encoding

System and Method for Implementing a Multiplication

NAF CONVERSION APPARATUS

Binary Number Multiplying Method and Circuit

METHOD FOR SIGN-EXTENSION IN A MULTI-PRECISION MULTIPLIER

CANONICAL SIGNED DIGIT MULTIPLIER

METHOD FOR FINDING MINIMAL SIGNED DIGIT WITH VARIABLE MULTI-BIT COD...

Data Transformation Method and Data Transformation Circuit Capable...

Multiplier product generation based on encoded data from addressabl...

OPTIMAL SIGNED-DIGIT RECODING FOR ELLIPTIC CURVE CRYPTOGRAPHY

SIGNAL PROCESSING APPARATUS AND METHOD FOR PERFORMING MODULAR MULTI...

MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...

MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...

Methods and apparatus for providing a booth multiplier

Arithmetic unit

Canonical signed digit (CSD) coefficient multiplier with optimization

Logical calculation circuit, logical calculation device, and logica...

Binary digit multiplications and applications