Clock generating, synchronizing or distributing circuits within memory device

Industry

CPC
G11C7/222

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/222Clock generating, synchronizing or distributing circuits within memory device

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Memory module multiple port buffer techniques
- Patent number 12,300,349
- Issue date May 13, 2025
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device, controller and memory system
- Patent number 12,300,355
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Kuiyon Mun
- G11 - INFORMATION STORAGE
Information Patent Grant
Equalizer for removing inter symbol interference of data signal by...
- Patent number 12,301,236
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Daehoon Na
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal skew in source-synchronous system
- Patent number 12,300,303
- Issue date May 13, 2025
- RAMBUS INC.
- Shahram Nikoukary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 12,300,352
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Jaewoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
High-bandwidth memory module architecture
- Patent number 12,300,346
- Issue date May 13, 2025
- Advanced Micro Devices, Inc.
- Aaron John Nygren
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory interface and semiconductor memory device and semiconductor...
- Patent number 12,293,801
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Hojun Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Write merging on stores with different privilege levels
- Patent number 12,292,839
- Issue date May 6, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Offset calibration training method for adjusting data receiver offs...
- Patent number 12,293,807
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Younggil Go
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit and receiving circuit having test function
- Patent number 12,288,589
- Issue date Apr 29, 2025
- SK hynix Inc.
- Gi Moon Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient and low power reference voltage mixing
- Patent number 12,288,581
- Issue date Apr 29, 2025
- Advanced Micro Devices, Inc.
- Aaron D Willey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase correction circuit, and clock buffer and semiconductor appara...
- Patent number 12,289,110
- Issue date Apr 29, 2025
- SK hynix Inc.
- Ji Hyo Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic clock mask based on read data for power saving
- Patent number 12,283,341
- Issue date Apr 22, 2025
- SanDisk Technologies LLC
- Tianyu Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay circuit and memory
- Patent number 12,278,629
- Issue date Apr 15, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Tianchen Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Duty cycle adjuster optimization training algorithm to minimize the...
- Patent number 12,272,426
- Issue date Apr 8, 2025
- Intel Corporation
- Arvind Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including first and second clock generators
- Patent number 12,272,427
- Issue date Apr 8, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device and memory system
- Patent number 12,266,423
- Issue date Apr 1, 2025
- Kioxia Corporation
- Akio Sugahara
- G11 - INFORMATION STORAGE
Information Patent Grant
Communication system with mixed threshold voltage transistors
- Patent number 12,266,422
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Veeramanikandan Raju
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data receiving circuit, data receiving system, and memory device
- Patent number 12,260,933
- Issue date Mar 25, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed multiplexer for reducing glitch power
- Patent number 12,254,955
- Issue date Mar 18, 2025
- Meta Platforms Technologies, LLC
- Sri Harsha Manjunath
- G11 - INFORMATION STORAGE
Information Patent Grant
Smart prologue for nonvolatile memory program operation
- Patent number 12,254,933
- Issue date Mar 18, 2025
- INTEL NDTM US LLC
- Pranav Chava
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal detection system for duty cycle testing and memory detection...
- Patent number 12,254,943
- Issue date Mar 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jianyong Qin
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock control circuit, memory storage device and clock control method
- Patent number 12,248,699
- Issue date Mar 11, 2025
- Phison Electronics Corp.
- Cheng-Jui Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer control of multiple memory banks
- Patent number 12,243,621
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shih-Lien Linus Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory system having the same, and method of operati...
- Patent number 12,237,048
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Hijung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device, memory system, and method
- Patent number 12,237,041
- Issue date Feb 25, 2025
- Kioxia Corporation
- Tomoaki Suzuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Data receiving circuit, data receiving system and memory device
- Patent number 12,237,042
- Issue date Feb 25, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system including an interface circuit connecting a controlle...
- Patent number 12,237,046
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Youngmin Jo
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DATA STROBE TOGGLING BY A CONTROLLER
- Publication number 20250166676
- Publication date May 22, 2025
- Micron Technology, Inc.
- Leonid Minz
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250166679
- Publication date May 22, 2025
- SK HYNIX INC.
- Jae Hyeong HONG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM FOR MONITORING RESULTS OF DETERMINATION OF DUT...
- Publication number 20250167778
- Publication date May 22, 2025
- SK HYNIX INC.
- Jung Taek YOU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250166678
- Publication date May 22, 2025
- NANYA TECHNOLOGY CORPORATION
- Chien Yu Chen
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...
- Publication number 20250157513
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- Sanguk Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY PHYSICAL LAYER INTERFACE, MEMORY APPARATUS AND METHOD THEREOF
- Publication number 20250157515
- Publication date May 15, 2025
- Faraday Technology Corp.
- Sivaramakrishnan Subramanian
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION
- Publication number 20250157503
- Publication date May 15, 2025
- Rambus Inc.
- James E. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND STACK MEMORY DEVICES GENERATING DATA STROBING SI...
- Publication number 20250157511
- Publication date May 15, 2025
- SK HYNIX INC.
- Chang Kwon LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD OF OPERATING THE SAME
- Publication number 20250157512
- Publication date May 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Tzu CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY, STORAGE SYSTEMS, AND OPERATION METHODS OF MEMORY
- Publication number 20250157497
- Publication date May 15, 2025
- Yangtze Memory Technologies Co., Ltd.
- Zhuangzhuang Wu
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERA...
- Publication number 20250157507
- Publication date May 15, 2025
- SK HYNIX INC.
- Soo Yeol CHAI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MEMORY MODULE
- Publication number 20250149075
- Publication date May 8, 2025
- RENESAS ELECTRONICS CORPORATION
- Kazunori YAMANE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250149076
- Publication date May 8, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, CONTROL LOGIC CIRCUIT, AND METHOD OF OPERATING THEREOF
- Publication number 20250149074
- Publication date May 8, 2025
- Yue SHENG
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER CIRCUIT AND METHOD
- Publication number 20250140294
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- XiuLi YANG
- G11 - INFORMATION STORAGE
Information Patent Application
AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE
- Publication number 20250139019
- Publication date May 1, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL SYNCHRONIZATION FOR A DISPLAY
- Publication number 20250131951
- Publication date Apr 24, 2025
- Google LLC
- Edwin Lyle Hudson
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT FOR DUAL IN-LINE MEMORY TO SUPPORT 128-BYTE CACHE LINE PROCE...
- Publication number 20250131947
- Publication date Apr 24, 2025
- TACHYUM LTD.
- Radoslav DANILAK
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250124959
- Publication date Apr 17, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
SPREAD SPECTRUM CLOCK GENERATOR, MEMORY STORAGE DEVICE, AND SPREAD...
- Publication number 20250125808
- Publication date Apr 17, 2025
- PHISON ELECTRONICS CORP.
- Kun-Ruei Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRITICAL TIMING DRIVEN DYNAMIC VOLTAGE FREQUENCY SCALING BASED ON A...
- Publication number 20250118348
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Leon Zlotnik
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE
- Publication number 20250118346
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20250117340
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20250117341
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE HAVING TIMING CONTROL CIRCUIT
- Publication number 20250118347
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Hideo Shimizu
- G11 - INFORMATION STORAGE
Information Patent Application
CALIBRATION APPARATUS OF MEMORY DEVICE AND CALIBRATION METHOD THEREOF
- Publication number 20250104750
- Publication date Mar 27, 2025
- Macronix International Co., Ltd.
- Wei-Yi Cheng
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...
- Publication number 20250103523
- Publication date Mar 27, 2025
- Lodestar Licensing Group LLP
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MODULE
- Publication number 20250104744
- Publication date Mar 27, 2025
- Mitsubishi Electric Corporation
- Nobuo HASHIMOTO
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING...
- Publication number 20250104751
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- Byongmo MOON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND OPERATING METHOD THEREOF
- Publication number 20250104746
- Publication date Mar 27, 2025
- GigaDevice Semiconductor Inc.
- Sibo MA
- G11 - INFORMATION STORAGE

Clock generating, synchronizing or distributing circuits within memory device

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory module multiple port buffer techniques

Non-volatile memory device, controller and memory system

Equalizer for removing inter symbol interference of data signal by...

Signal skew in source-synchronous system

Semiconductor device

High-bandwidth memory module architecture

Memory interface and semiconductor memory device and semiconductor...

Write merging on stores with different privilege levels

Offset calibration training method for adjusting data receiver offs...

Test circuit and receiving circuit having test function

Efficient and low power reference voltage mixing

Phase correction circuit, and clock buffer and semiconductor appara...

Dynamic clock mask based on read data for power saving

Delay circuit and memory

Duty cycle adjuster optimization training algorithm to minimize the...

Semiconductor device including first and second clock generators

Hybrid victim cache and write miss buffer with fence operation

Semiconductor memory device and memory system

Communication system with mixed threshold voltage transistors

Methods and apparatus for multi-banked victim cache with dual datapath

Data receiving circuit, data receiving system, and memory device

High-speed multiplexer for reducing glitch power

Smart prologue for nonvolatile memory program operation

Signal detection system for duty cycle testing and memory detection...

Clock control circuit, memory storage device and clock control method

Buffer control of multiple memory banks

Memory device, memory system having the same, and method of operati...

Semiconductor memory device, memory system, and method

Data receiving circuit, data receiving system and memory device

Memory system including an interface circuit connecting a controlle...

Patents Applicationslast 30 patents

DATA STROBE TOGGLING BY A CONTROLLER

SEMICONDUCTOR DEVICE

SEMICONDUCTOR SYSTEM FOR MONITORING RESULTS OF DETERMINATION OF DUT...

MEMORY DEVICE

SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...

MEMORY PHYSICAL LAYER INTERFACE, MEMORY APPARATUS AND METHOD THEREOF

MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION

MEMORY DEVICES AND STACK MEMORY DEVICES GENERATING DATA STROBING SI...

MEMORY CIRCUIT AND METHOD OF OPERATING THE SAME

MEMORY, STORAGE SYSTEMS, AND OPERATION METHODS OF MEMORY

NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERA...

SEMICONDUCTOR DEVICE AND MEMORY MODULE

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

MEMORY DEVICE, CONTROL LOGIC CIRCUIT, AND METHOD OF OPERATING THEREOF

SHARED DECODER CIRCUIT AND METHOD

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

SIGNAL SYNCHRONIZATION FOR A DISPLAY

LAYOUT FOR DUAL IN-LINE MEMORY TO SUPPORT 128-BYTE CACHE LINE PROCE...

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

SPREAD SPECTRUM CLOCK GENERATOR, MEMORY STORAGE DEVICE, AND SPREAD...

CRITICAL TIMING DRIVEN DYNAMIC VOLTAGE FREQUENCY SCALING BASED ON A...

SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

SEMICONDUCTOR DEVICE HAVING TIMING CONTROL CIRCUIT

CALIBRATION APPARATUS OF MEMORY DEVICE AND CALIBRATION METHOD THEREOF

APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...

SEMICONDUCTOR MODULE

MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING...

MEMORY AND OPERATING METHOD THEREOF