Clock generating, synchronizing or distributing circuits within memory device

Industry

CPC
G11C7/222

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/222Clock generating, synchronizing or distributing circuits within memory device

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Buffer configurations for communications between memory dies and a...
- Patent number 12,170,127
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Data receiving circuit, data receiving system and storage device
- Patent number 12,170,129
- Issue date Dec 17, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM non-clamping write driver with write assist
- Patent number 12,165,738
- Issue date Dec 10, 2024
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for detecting margins of data signal and stora...
- Patent number 12,159,034
- Issue date Dec 3, 2024
- Huawei Technologies Co., Ltd.
- Yongyao Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock circuit, memory and method for manufacturing semiconductor st...
- Patent number 12,159,687
- Issue date Dec 3, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Meixiang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Channel and sub-channel throttling for memory controllers
- Patent number 12,154,657
- Issue date Nov 26, 2024
- Advanced Micro Devices, Inc.
- Kedarnath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Grant
Data output control circuit and semiconductor device including the...
- Patent number 12,154,658
- Issue date Nov 26, 2024
- SK Hynix Inc.
- Kwang Soon Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method of controlling a memory chip
- Patent number 12,154,659
- Issue date Nov 26, 2024
- Kioxia Corporation
- Shinya Koizumi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distribution circuit and semiconductor apparatus including th...
- Patent number 12,147,264
- Issue date Nov 19, 2024
- SK hynix Inc.
- Ji Hyo Kang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency divider and memory device including the same
- Patent number 12,149,247
- Issue date Nov 19, 2024
- Samsung Electronics Co., Ltd.
- Jaewoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Random data generation circuit and read/write training circuit
- Patent number 12,148,504
- Issue date Nov 19, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Biao Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices for multiple read operations
- Patent number 12,142,343
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for reducing DRAM power usage in performing read and wri...
- Patent number 12,142,344
- Issue date Nov 12, 2024
- NVIDIA Corporation
- Gautam Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 12,136,469
- Issue date Nov 5, 2024
- Kioxia Corporation
- Shintaro Hayashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and operating method thereof
- Patent number 12,132,491
- Issue date Oct 29, 2024
- Samsung Electronics Co., Ltd.
- Kyungho Ryu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for setting a duty cycle adjuster for impro...
- Patent number 12,125,558
- Issue date Oct 22, 2024
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic device, memory device, and write leveling method thereof
- Patent number 12,125,557
- Issue date Oct 22, 2024
- NANYA TECHNOLOGY CORPORATION
- Shun-Ke Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for receiving data, system for receiving data, and memory d...
- Patent number 12,119,077
- Issue date Oct 15, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits and methods of mitigating hold time failure of pipeline fo...
- Patent number 12,119,079
- Issue date Oct 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system for performing a duty ratio adjustment operation
- Patent number 12,119,082
- Issue date Oct 15, 2024
- SK hynix Inc.
- Sang Geun Bae
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power source-synchronous signaling
- Patent number 12,119,042
- Issue date Oct 15, 2024
- RAMBUS INC.
- Jared L. Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for memory power management and memory devices and systems...
- Patent number 12,112,830
- Issue date Oct 8, 2024
- Eric J. Stave
- G11 - INFORMATION STORAGE
Information Patent Grant
Host apparatus and extension device
- Patent number 12,112,788
- Issue date Oct 8, 2024
- Kioxia Corporation
- Akihisa Fujimoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Data transmission circuit, method of making it, and storage device
- Patent number 12,106,821
- Issue date Oct 1, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Enpeng Gao
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device adjusting duty cycle and memory system having the same
- Patent number 12,106,794
- Issue date Oct 1, 2024
- Samsung Electronics Co., Ltd.
- Dae-Sik Moon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock qualifier enhancement for external double data rate memory in...
- Patent number 12,100,474
- Issue date Sep 24, 2024
- QUALCOMM Incorporated
- Yong Xu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CLOCK CONTROL CIRCUIT AND METHOD FOR CONTROLLING MEMORY CLOCK
- Publication number 20240420749
- Publication date Dec 19, 2024
- Realtek Semiconductor Corp.
- WEI-CHEN LIU
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE ADJUSTING DUTY CYCLE AND MEMORY SYSTEM HAVING THE SAME
- Publication number 20240420754
- Publication date Dec 19, 2024
- Samsung Electronics Co., Ltd.
- DAE-SIK MOON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECEIVER, OPERATION METHOD THEREOF, AND MEMORY DEVICE
- Publication number 20240412764
- Publication date Dec 12, 2024
- Samsung Electronics Co., Ltd.
- Jueon Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-BIT CELL AND MULTI-BIT CELL ARRAY INCLUDING THE SAME
- Publication number 20240412767
- Publication date Dec 12, 2024
- Samsung Electronics Co., LTD
- CHANHEE PARK
- G11 - INFORMATION STORAGE
Information Patent Application
Pre-Charger Circuit of Memory Device and Methods For Operating The...
- Publication number 20240412766
- Publication date Dec 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Masaya Hamada
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES
- Publication number 20240402788
- Publication date Dec 5, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM PERFORMING HIERARCHICAL DUTY CYCLE ADJUSTER TRAINING...
- Publication number 20240404570
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- Ki-Seok PARK
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK CONTROL CIRCUIT, MEMORY STORAGE DEVICE AND CLOCK CONTROL METHOD
- Publication number 20240402936
- Publication date Dec 5, 2024
- PHISON ELECTRONICS CORP.
- Cheng-Jui Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION
- Publication number 20240404568
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Riccardo ZURLA
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER MEMORY WITH ON-DEMAND BANDWIDTH BOOST
- Publication number 20240404571
- Publication date Dec 5, 2024
- Rambus Inc.
- Torsten Partsch
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND MET...
- Publication number 20240404572
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- HYUNGJIN KIM
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS
- Publication number 20240395297
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
JITTER REDUCTION IN MIXED-SIGNAL PROCESSING CIRCUITS
- Publication number 20240395295
- Publication date Nov 28, 2024
- ADVANCED MICRO DEVICES, INC.
- Srikanth Reddy Gruddanti
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS
- Publication number 20240395296
- Publication date Nov 28, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240395298
- Publication date Nov 28, 2024
- Samsung Electronics Co., Ltd.
- BAEK JIN LIM
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL SKEW IN SOURCE-SYNCHRONOUS SYSTEM
- Publication number 20240395310
- Publication date Nov 28, 2024
- Rambus Inc.
- Shahram NIKOUKARY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...
- Publication number 20240386928
- Publication date Nov 21, 2024
- Lodestar Licensing Group LLC
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE THAT INCLUDES A DUTY CORRECTION CIRCUIT, MEMORY CONTR...
- Publication number 20240379141
- Publication date Nov 14, 2024
- Samsung Electronics Co., Ltd.
- TONGSUNG KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF VOLTAGE CALIBRATION AND APPARATUS THEREOF, MEMORY AND MEM...
- Publication number 20240379135
- Publication date Nov 14, 2024
- Yangtze Memory Technologies Co., Ltd.
- Tianyi YE
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for an Internal Clock Tree Structure in a Memor...
- Publication number 20240371421
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR COMMAND BUS TRAINING TO A MEMORY DEVICE
- Publication number 20240370390
- Publication date Nov 7, 2024
- Intel Corporation
- Christopher P. MOZAK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITS AND METHODS OF MITIGATING HOLD TIME FAILURE OF PIPELINE FO...
- Publication number 20240371418
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA RECEIVING CIRCUIT FOR CHIPLET BASED STORAGE ARCHITECTURES
- Publication number 20240371422
- Publication date Nov 7, 2024
- SK HYNIX INC.
- Tae Ho LIM
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLER, MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM
- Publication number 20240363189
- Publication date Oct 31, 2024
- SK HYNIX INC.
- Young Ook SONG
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE CIRCUIT, INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE
- Publication number 20240364350
- Publication date Oct 31, 2024
- SHENZHEN PANGO MICROSYSTEMS CO.,LTD
- KEYONG LIU
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR INPUT BUFFER POWER SAVINGS
- Publication number 20240355378
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Akira Yamashita
- G11 - INFORMATION STORAGE
Information Patent Application
DATA PATH SIGNAL AMPLIFICATION IN COUPLED SEMICONDUCTOR SYSTEMS
- Publication number 20240355371
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- James Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR ADJUSTING SENSE AMPLIFIER VOLTAGE THRES...
- Publication number 20240355366
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Kishan Reddy Gonapati
- G11 - INFORMATION STORAGE

Clock generating, synchronizing or distributing circuits within memory device

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Buffer configurations for communications between memory dies and a...

Data receiving circuit, data receiving system and storage device

SRAM non-clamping write driver with write assist

Method and apparatus for detecting margins of data signal and stora...

Clock circuit, memory and method for manufacturing semiconductor st...

Channel and sub-channel throttling for memory controllers

Data output control circuit and semiconductor device including the...

Memory system and method of controlling a memory chip

Clock distribution circuit and semiconductor apparatus including th...

Methods and apparatus for read-modify-write support in multi-banked...

Frequency divider and memory device including the same

Random data generation circuit and read/write training circuit

Memory devices for multiple read operations

Victim cache with dynamic allocation of entries

Atomic operations and histogram operations in a cache pipeline

Techniques for reducing DRAM power usage in performing read and wri...

Semiconductor memory device

Semiconductor device and operating method thereof

Apparatuses and methods for setting a duty cycle adjuster for impro...

Electronic device, memory device, and write leveling method thereof

Circuit for receiving data, system for receiving data, and memory d...

Circuits and methods of mitigating hold time failure of pipeline fo...

Semiconductor system for performing a duty ratio adjustment operation

Low-power source-synchronous signaling

Methods for memory power management and memory devices and systems...

Host apparatus and extension device

Data transmission circuit, method of making it, and storage device

Methods and apparatus for eviction in dual datapath victim cache sy...

Memory device adjusting duty cycle and memory system having the same

Clock qualifier enhancement for external double data rate memory in...

Patents Applicationslast 30 patents

MEMORY CLOCK CONTROL CIRCUIT AND METHOD FOR CONTROLLING MEMORY CLOCK

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

MEMORY DEVICE ADJUSTING DUTY CYCLE AND MEMORY SYSTEM HAVING THE SAME

RECEIVER, OPERATION METHOD THEREOF, AND MEMORY DEVICE

MULTI-BIT CELL AND MULTI-BIT CELL ARRAY INCLUDING THE SAME

Pre-Charger Circuit of Memory Device and Methods For Operating The...

MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES

MEMORY SYSTEM PERFORMING HIERARCHICAL DUTY CYCLE ADJUSTER TRAINING...

CLOCK CONTROL CIRCUIT, MEMORY STORAGE DEVICE AND CLOCK CONTROL METHOD

IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION

LOW POWER MEMORY WITH ON-DEMAND BANDWIDTH BOOST

APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND MET...

METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS

JITTER REDUCTION IN MIXED-SIGNAL PROCESSING CIRCUITS

SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS

SEMICONDUCTOR DEVICE

SIGNAL SKEW IN SOURCE-SYNCHRONOUS SYSTEM

APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...

MEMORY DEVICE THAT INCLUDES A DUTY CORRECTION CIRCUIT, MEMORY CONTR...

METHOD OF VOLTAGE CALIBRATION AND APPARATUS THEREOF, MEMORY AND MEM...

Systems and Methods for an Internal Clock Tree Structure in a Memor...

TECHNIQUES FOR COMMAND BUS TRAINING TO A MEMORY DEVICE

CIRCUITS AND METHODS OF MITIGATING HOLD TIME FAILURE OF PIPELINE FO...

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

DATA RECEIVING CIRCUIT FOR CHIPLET BASED STORAGE ARCHITECTURES

CONTROLLER, MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM

PROGRAMMABLE CIRCUIT, INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE

APPARATUSES AND METHODS FOR INPUT BUFFER POWER SAVINGS

DATA PATH SIGNAL AMPLIFICATION IN COUPLED SEMICONDUCTOR SYSTEMS

APPARATUSES AND METHODS FOR ADJUSTING SENSE AMPLIFIER VOLTAGE THRES...