Clock generating, synchronizing or distributing circuits within memory device

Industry

CPC
G11C7/222

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/222Clock generating, synchronizing or distributing circuits within memory device

Industries

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device
- Patent number 12,368,443
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Jinwook Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast reference voltage training for I/O interface
- Patent number 12,367,915
- Issue date Jul 22, 2025
- SanDisk Technologies, Inc.
- Tianyu Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Encoders, decoders, and semiconductor memory devices including the...
- Patent number 12,367,916
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Byongmo Moon
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device, read method for nonvolatile memory devic...
- Patent number RE50501
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Chul Bum Kim
Information Patent Grant
Systems and methods for controlling power assertion in a memory device
- Patent number 12,367,917
- Issue date Jul 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system
- Patent number 12,361,989
- Issue date Jul 15, 2025
- SK hynix Inc.
- Kang Sub Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with external clock synchronized operation
- Patent number 12,361,990
- Issue date Jul 15, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Far end driver for memory clock
- Patent number 12,361,991
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Grant
Control apparatus, memory, signal processing method, and electronic...
- Patent number 12,354,706
- Issue date Jul 8, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jingwei Cheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Command address control circuit, and semiconductor apparatus and se...
- Patent number 12,354,687
- Issue date Jul 8, 2025
- SK hynix Inc.
- Ji Hwan Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor system
- Patent number 12,354,705
- Issue date Jul 8, 2025
- SK hynix Inc.
- Joon Hong Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipe register and semiconductor apparatus including the pipe register
- Patent number 12,347,517
- Issue date Jul 1, 2025
- SK hynix Inc.
- Heon Ki Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip automation of clock-to-Q access time measurement of a memor...
- Patent number 12,347,522
- Issue date Jul 1, 2025
- Synopsys, Inc.
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing power in a memory device
- Patent number 12,346,188
- Issue date Jul 1, 2025
- RAMBUS INC.
- Dinesh Patil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shift register unit, driving method thereof, and device
- Patent number 12,340,866
- Issue date Jun 24, 2025
- BOE Technology Group Co., Ltd.
- Guangliang Shang
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface level-shifter dual-rail memory architecture
- Patent number 12,340,864
- Issue date Jun 24, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuits with dynamically adjustable pulse widths and method...
- Patent number 12,340,871
- Issue date Jun 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ming-Hung Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory, control apparatus, clock processing method, and electronic...
- Patent number 12,339,699
- Issue date Jun 24, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jingwei Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, memory system and method for operating memory system...
- Patent number 12,334,186
- Issue date Jun 17, 2025
- Samsung Electronics Co., Ltd.
- Jaehyeok Baek
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system related to clock synchronization
- Patent number 12,332,680
- Issue date Jun 17, 2025
- SK Hynix Inc.
- Kyu Dong Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Maximum memory clock estimation procedures
- Patent number 12,334,137
- Issue date Jun 17, 2025
- Micron Technology, Inc.
- Erik V. Pohlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data receiving circuit, data receiving system and memory device
- Patent number 12,327,610
- Issue date Jun 10, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system for performing a data alignment operation
- Patent number 12,327,612
- Issue date Jun 10, 2025
- SK hynix Inc.
- Hyun Seung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Data strobe latching circuit and adjusting method for adjusting int...
- Patent number 12,327,611
- Issue date Jun 10, 2025
- NANYA TECHNOLOGY CORPORATION
- Shu-Wei Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,327,606
- Issue date Jun 10, 2025
- Renesas Electronics Corporation
- Motoshige Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 12,321,284
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor devices and semiconductor systems calibrating termina...
- Patent number 12,322,470
- Issue date Jun 3, 2025
- SK hynix Inc.
- Sang Sic Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, read clock generation circuit, and method for contro...
- Patent number 12,322,474
- Issue date Jun 3, 2025
- Taiwan Semiconductor Manufacturing Company Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock signal generation circuit
- Patent number 12,323,156
- Issue date Jun 3, 2025
- Realtek Semiconductor Corp.
- LiJun Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining read voltage offset in memory devices
- Patent number 12,322,473
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Robert W. Mason
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE MEMORY DEVICE, CONTROLLER AND MEMORY SYSTEM
- Publication number 20250239284
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Kuiyon Mun
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLER CONFIGURED TO CONTROL MEMORY DEVICE, OPERATION METHOD OF...
- Publication number 20250239282
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Hojun Yoon
- G11 - INFORMATION STORAGE
Information Patent Application
TEMPERATURE-BASED CHARGE PUMP CONTROL
- Publication number 20250226011
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20250225083
- Publication date Jul 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER MEMORY WITH ON-DEMAND BANDWIDTH BOOST
- Publication number 20250226016
- Publication date Jul 10, 2025
- Rambus Inc.
- Torsten Partsch
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR ADAPTIVE NOISE SUPPRESSION ON DATA STROBE SIGNALS AND ME...
- Publication number 20250218482
- Publication date Jul 3, 2025
- NANYA TECHNOLOGY CORPORATION
- Wu-Der Yang
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK GENERATION CIRCUIT AND MEMORY
- Publication number 20250218480
- Publication date Jul 3, 2025
- CXMT Corporation
- Jun Yang
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR ADAPTIVE NOISE SUPPRESSION ON DATA STROBE SIGNALS AND ME...
- Publication number 20250218472
- Publication date Jul 3, 2025
- NANYA TECHNOLOGY CORPORATION
- Wu-Der Yang
- G11 - INFORMATION STORAGE
Information Patent Application
RTT TRIM METHOD
- Publication number 20250218483
- Publication date Jul 3, 2025
- Micron Technology, Inc.
- Ryo Fujimaki
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR ADAPTIVE NOISE SUPPRESSION ON DATA STROBE SIGNALS AND ME...
- Publication number 20250218471
- Publication date Jul 3, 2025
- NANYA TECHNOLOGY CORPORATION
- Wu-Der Yang
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device Including First and Second Clock Generators
- Publication number 20250210081
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Application
MAGNONIC COMBINATORIAL MEMORY
- Publication number 20250210080
- Publication date Jun 26, 2025
- The Regents of the University of California
- Aleksandr Khitun
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM USING ASYMMETRIC SOURCE-SYNCHRONOUS CLOCKING
- Publication number 20250208645
- Publication date Jun 26, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY INTERFACE CIRCUIT, STORAGE DEVICE HAVING THE SAM...
- Publication number 20250201287
- Publication date Jun 19, 2025
- Samsung Electronics Co., Ltd.
- Choongeui Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM
- Publication number 20250201288
- Publication date Jun 19, 2025
- KIOXIA Corporation
- Akio SUGAHARA
- G11 - INFORMATION STORAGE
Information Patent Application
DATA-BUFFER CONTROLLER/CONTROL-SIGNAL REDRIVER
- Publication number 20250191626
- Publication date Jun 12, 2025
- Rambus Inc.
- Torsten Partsch
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CONTROL OF MULTIPLE MEMORY BANKS
- Publication number 20250191629
- Publication date Jun 12, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR MULTI-BANKED VICTIM CACHE WITH DUAL DATAPATH
- Publication number 20250190368
- Publication date Jun 12, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE WITH IMPROVED DATA RECEIVING LOGIC USING MULTIPLE LATCHING A...
- Publication number 20250191627
- Publication date Jun 12, 2025
- SK HYNIX INC.
- Ju Hyeon HAN
- G11 - INFORMATION STORAGE
Information Patent Application
IMPEDANCE CALIBRATION CIRCUIT, SEMICONDUCTOR MEMORY APPARATUS AND M...
- Publication number 20250191623
- Publication date Jun 12, 2025
- SK HYNIX INC.
- Jae Hyeong HONG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20250182802
- Publication date Jun 5, 2025
- Samsung Electronics Co., Ltd.
- Youngmin Jo
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLICATION AND ACCUMULATION (MAC) OPERATOR AND PROCESSING-IN-ME...
- Publication number 20250173122
- Publication date May 29, 2025
- SK HYNIX INC.
- Choung Ki SONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STROBE TOGGLING BY A CONTROLLER
- Publication number 20250166676
- Publication date May 22, 2025
- Micron Technology, Inc.
- Leonid Minz
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250166679
- Publication date May 22, 2025
- SK HYNIX INC.
- Jae Hyeong HONG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM FOR MONITORING RESULTS OF DETERMINATION OF DUT...
- Publication number 20250167778
- Publication date May 22, 2025
- SK HYNIX INC.
- Jung Taek YOU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250166678
- Publication date May 22, 2025
- NANYA TECHNOLOGY CORPORATION
- Chien Yu Chen
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...
- Publication number 20250157513
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- Sanguk Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY PHYSICAL LAYER INTERFACE, MEMORY APPARATUS AND METHOD THEREOF
- Publication number 20250157515
- Publication date May 15, 2025
- Faraday Technology Corp.
- Sivaramakrishnan Subramanian
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION
- Publication number 20250157503
- Publication date May 15, 2025
- Rambus Inc.
- James E. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND STACK MEMORY DEVICES GENERATING DATA STROBING SI...
- Publication number 20250157511
- Publication date May 15, 2025
- SK HYNIX INC.
- Chang Kwon LEE
- G11 - INFORMATION STORAGE

Clock generating, synchronizing or distributing circuits within memory device

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device

Fast reference voltage training for I/O interface

Encoders, decoders, and semiconductor memory devices including the...

Nonvolatile memory device, read method for nonvolatile memory devic...

Systems and methods for controlling power assertion in a memory device

Semiconductor system

Memory with external clock synchronized operation

Far end driver for memory clock

Control apparatus, memory, signal processing method, and electronic...

Command address control circuit, and semiconductor apparatus and se...

Semiconductor device and semiconductor system

Pipe register and semiconductor apparatus including the pipe register

On-chip automation of clock-to-Q access time measurement of a memor...

Optimizing power in a memory device

Shift register unit, driving method thereof, and device

Interface level-shifter dual-rail memory architecture

Memory circuits with dynamically adjustable pulse widths and method...

Memory, control apparatus, clock processing method, and electronic...

Memory device, memory system and method for operating memory system...

Memory system related to clock synchronization

Maximum memory clock estimation procedures

Data receiving circuit, data receiving system and memory device

Semiconductor system for performing a data alignment operation

Data strobe latching circuit and adjusting method for adjusting int...

Semiconductor device

Methods and apparatus to facilitate atomic operations in victim cache

Semiconductor devices and semiconductor systems calibrating termina...

Memory device, read clock generation circuit, and method for contro...

Clock signal generation circuit

Determining read voltage offset in memory devices

Patents Applicationslast 30 patents

NON-VOLATILE MEMORY DEVICE, CONTROLLER AND MEMORY SYSTEM

CONTROLLER CONFIGURED TO CONTROL MEMORY DEVICE, OPERATION METHOD OF...

TEMPERATURE-BASED CHARGE PUMP CONTROL

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION

LOW POWER MEMORY WITH ON-DEMAND BANDWIDTH BOOST

METHOD FOR ADAPTIVE NOISE SUPPRESSION ON DATA STROBE SIGNALS AND ME...

CLOCK GENERATION CIRCUIT AND MEMORY

METHOD FOR ADAPTIVE NOISE SUPPRESSION ON DATA STROBE SIGNALS AND ME...

RTT TRIM METHOD

METHOD FOR ADAPTIVE NOISE SUPPRESSION ON DATA STROBE SIGNALS AND ME...

Semiconductor Device Including First and Second Clock Generators

MAGNONIC COMBINATORIAL MEMORY

MEMORY SYSTEM USING ASYMMETRIC SOURCE-SYNCHRONOUS CLOCKING

NONVOLATILE MEMORY INTERFACE CIRCUIT, STORAGE DEVICE HAVING THE SAM...

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM

DATA-BUFFER CONTROLLER/CONTROL-SIGNAL REDRIVER

BUFFER CONTROL OF MULTIPLE MEMORY BANKS

METHODS AND APPARATUS FOR MULTI-BANKED VICTIM CACHE WITH DUAL DATAPATH

DEVICE WITH IMPROVED DATA RECEIVING LOGIC USING MULTIPLE LATCHING A...

IMPEDANCE CALIBRATION CIRCUIT, SEMICONDUCTOR MEMORY APPARATUS AND M...

SEMICONDUCTOR DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

MULTIPLICATION AND ACCUMULATION (MAC) OPERATOR AND PROCESSING-IN-ME...

DATA STROBE TOGGLING BY A CONTROLLER

SEMICONDUCTOR DEVICE

SEMICONDUCTOR SYSTEM FOR MONITORING RESULTS OF DETERMINATION OF DUT...

MEMORY DEVICE

SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...

MEMORY PHYSICAL LAYER INTERFACE, MEMORY APPARATUS AND METHOD THEREOF

MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION

MEMORY DEVICES AND STACK MEMORY DEVICES GENERATING DATA STROBING SI...