Combinations of bonding methods provided for in at least two different groups from H01L2224/808 - H01L2224/80904

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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H01L2224/80905Combinations of bonding methods provided for in at least two different groups from H01L2224/808 - H01L2224/80904

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of manufacturing
- Patent number 11,916,031
- Issue date Feb 27, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Chia Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having adjoined via structures formed by bond...
- Patent number 11,887,954
- Issue date Jan 30, 2024
- Yangtze Memory Technologies Co., Ltd.
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding alignment marks at bonding interface
- Patent number 11,876,049
- Issue date Jan 16, 2024
- Yangtze Memory Technologies Co., Ltd.
- Meng Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D trench capacitor for integrated passive devices
- Patent number 11,862,612
- Issue date Jan 2, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xin-Hua Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Serializer-deserializer die for high speed signal interconnect
- Patent number 11,581,282
- Issue date Feb 14, 2023
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of manufacture
- Patent number 11,456,240
- Issue date Sep 27, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having adjoined via structures formed by bond...
- Patent number 11,424,208
- Issue date Aug 23, 2022
- Yangtze Memory Technologies Co., Ltd.
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of manufacturing
- Patent number 11,335,656
- Issue date May 17, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Chia Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding alignment marks at bonding in interface
- Patent number 11,289,422
- Issue date Mar 29, 2022
- Yangtze Memory Technologies Co., Ltd.
- Meng Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D trench capacitor for integrated passive devices
- Patent number 11,211,362
- Issue date Dec 28, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xin-Hua Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded assembly containing a dielectric bonding pattern definition...
- Patent number 11,094,653
- Issue date Aug 17, 2021
- SanDisk Technologies LLC
- Chen Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package with offset 3D structure
- Patent number 11,018,125
- Issue date May 25, 2021
- Advanced Micro Devices, Inc.
- Milind S. Bhagavat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Treatment, before the bonding of a mixed Cu-oxide surface, by a pla...
- Patent number 10,910,782
- Issue date Feb 2, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Laurent Vandroux
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Grant
Hybrid wafer-to-wafer bonding and methods of surface preparation fo...
- Patent number 10,886,249
- Issue date Jan 5, 2021
- ams International AG
- Jens Hofrichter
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor device and method of manufacturing
- Patent number 10,784,219
- Issue date Sep 22, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Chia Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device packaging structure having through interposer...
- Patent number 10,756,010
- Issue date Aug 25, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package with offset 3D structure
- Patent number 10,714,462
- Issue date Jul 14, 2020
- Advanced Micro Devices, Inc.
- Milind S. Bhagavat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D chip sharing clock interconnect layer
- Patent number 10,586,786
- Issue date Mar 10, 2020
- Xcelsis Corporation
- Javier DeLaCruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Seal ring for bonded dies
- Patent number 10,515,908
- Issue date Dec 24, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Ya-Chun Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor device packaging structure ha...
- Patent number 10,510,650
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming hybrid bonding with through substrate via (TSV)
- Patent number 10,340,247
- Issue date Jul 2, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jing-Cheng Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid bonding with through substrate via (TSV)
- Patent number 9,768,143
- Issue date Sep 19, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jing-Cheng Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded processed semiconductor structures and carriers
- Patent number 9,553,014
- Issue date Jan 24, 2017
- Soitec
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded processed semiconductor structures and carriers
- Patent number 9,041,214
- Issue date May 26, 2015
- Soitec
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming bonded semiconductor structures using a temporar...
- Patent number 8,461,017
- Issue date Jun 11, 2013
- Soitec
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DIRECT HYBRID BOND PAD HAVING TAPERED SIDEWALL
- Publication number 20240387419
- Publication date Nov 21, 2024
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Pawel Mrozek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
- Publication number 20240363566
- Publication date Oct 31, 2024
- Amkor Technology Singapore Holding Pte. Ltd.
- Wang Gu Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES
- Publication number 20240088103
- Publication date Mar 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xin-Hua Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE DIMENSIONAL (3D) CHIPLET AND METHODS FOR FORMING THE SAME
- Publication number 20230420437
- Publication date Dec 28, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Chieh-Yen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
- Publication number 20230411344
- Publication date Dec 21, 2023
- KIOXIA Corporation
- Hiroaki ASHIDATE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GANG-FLIPPING OF DIES PRIOR TO BONDING
- Publication number 20230360950
- Publication date Nov 9, 2023
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Guilian Gao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Package and Method of Forming Same
- Publication number 20230040030
- Publication date Feb 9, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Shien Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Manufacture
- Publication number 20220384327
- Publication date Dec 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECT BONDING METHODS AND STRUCTURES
- Publication number 20220320035
- Publication date Oct 6, 2022
- INVENSAS BONDING TECHNOLOGIES, INC.
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Manufacturing
- Publication number 20220278063
- Publication date Sep 1, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Chia Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING ALIGNMENT MARKS AT BONDING INTERFACE
- Publication number 20220173038
- Publication date Jun 2, 2022
- Yangtze Memory Technologies Co., Ltd.
- Meng Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES
- Publication number 20220115358
- Publication date Apr 14, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xin-Hua Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES HAVING ADJOINED VIA STRUCTURES FORMED BY BOND...
- Publication number 20220059482
- Publication date Feb 24, 2022
- Yangtze Memory Technologies Co., Ltd.
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES
- Publication number 20210296283
- Publication date Sep 23, 2021
- Taiwan Semiconductor Manufacturing Co., LTD
- Xin-Hua Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED ASSEMBLY CONTAINING A DIELECTRIC BONDING PATTERN DEFINITION...
- Publication number 20210143115
- Publication date May 13, 2021
- SANDISK TECHNOLOGIES LLC
- Chen WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES HAVING ADJOINED VIA STRUCTURES FORMED BY BOND...
- Publication number 20210134748
- Publication date May 6, 2021
- YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING ALIGNMENT MARKS AT BONDING INTERFACE
- Publication number 20210072653
- Publication date Mar 11, 2021
- YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Meng Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Manufacturing
- Publication number 20210005561
- Publication date Jan 7, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Chia Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Manufacture
- Publication number 20200388563
- Publication date Dec 10, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Manufacture
- Publication number 20200118915
- Publication date Apr 16, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SERIALIZER-DESERIALIZER DIE FOR HIGH SPEED SIGNAL INTERCONNECT
- Publication number 20200075521
- Publication date Mar 5, 2020
- Intel Corporation
- Adel A. Elsherbini
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor Device and Method of Manufacture
- Publication number 20190244947
- Publication date Aug 8, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Manufacturing
- Publication number 20190164919
- Publication date May 30, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Chia Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEAL RING FOR BONDED DIES
- Publication number 20190131255
- Publication date May 2, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ya-Chun TENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D Chip Sharing Clock Interconnect Layer
- Publication number 20180350775
- Publication date Dec 6, 2018
- Xcelsis Corporation
- Javier DeLaCruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING HYBRID BONDING WITH THROUGH SUBSTRATE VIA (TSV)
- Publication number 20180005977
- Publication date Jan 4, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jing-Cheng LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED PROCESSED SEMICONDUCTOR STRUCTURES AND CARRIERS
- Publication number 20130256907
- Publication date Oct 3, 2013
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TREATMENT, BEFORE THE BONDING OF A MIXED CU-OXIDE SURFACE, BY A PLA...
- Publication number 20130153093
- Publication date Jun 20, 2013
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Laurent Vandroux
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
TEMPORARY SEMICONDUCTOR STRUCTURE BONDING METHODS AND RELATED BONDE...
- Publication number 20120013013
- Publication date Jan 19, 2012
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ASSEMBLY OF SEMICONDUCTOR CHIPS/WAFERS
- Publication number 20110086468
- Publication date Apr 14, 2011
- Yacine Felk
- H01 - BASIC ELECTRIC ELEMENTS

Combinations of bonding methods provided for in at least two different groups from H01L2224/808 - H01L2224/80904

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device and method of manufacturing

Semiconductor devices having adjoined via structures formed by bond...

Bonding alignment marks at bonding interface

3D trench capacitor for integrated passive devices

Serializer-deserializer die for high speed signal interconnect

Semiconductor device and method of manufacture

Semiconductor devices having adjoined via structures formed by bond...

Semiconductor device and method of manufacturing

Bonding alignment marks at bonding in interface

3D trench capacitor for integrated passive devices

Bonded assembly containing a dielectric bonding pattern definition...

Multi-chip package with offset 3D structure

Treatment, before the bonding of a mixed Cu-oxide surface, by a pla...

Hybrid wafer-to-wafer bonding and methods of surface preparation fo...

Semiconductor device and method of manufacturing

Semiconductor device packaging structure having through interposer...

Multi-chip package with offset 3D structure

3D chip sharing clock interconnect layer

Seal ring for bonded dies

Method of manufacturing semiconductor device packaging structure ha...

Method for forming hybrid bonding with through substrate via (TSV)

Hybrid bonding with through substrate via (TSV)

Bonded processed semiconductor structures and carriers

Bonded processed semiconductor structures and carriers

Methods of forming bonded semiconductor structures using a temporar...

Patents Applicationslast 30 patents

DIRECT HYBRID BOND PAD HAVING TAPERED SIDEWALL

ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES

3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES

THREE DIMENSIONAL (3D) CHIPLET AND METHODS FOR FORMING THE SAME

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

GANG-FLIPPING OF DIES PRIOR TO BONDING

Semiconductor Package and Method of Forming Same

Semiconductor Device and Method of Manufacture

DIRECT BONDING METHODS AND STRUCTURES

Semiconductor Device and Method of Manufacturing

BONDING ALIGNMENT MARKS AT BONDING INTERFACE

3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES

SEMICONDUCTOR DEVICES HAVING ADJOINED VIA STRUCTURES FORMED BY BOND...

3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES

BONDED ASSEMBLY CONTAINING A DIELECTRIC BONDING PATTERN DEFINITION...

SEMICONDUCTOR DEVICES HAVING ADJOINED VIA STRUCTURES FORMED BY BOND...

BONDING ALIGNMENT MARKS AT BONDING INTERFACE

Semiconductor Device and Method of Manufacturing

Semiconductor Device and Method of Manufacture

Semiconductor Device and Method of Manufacture

SERIALIZER-DESERIALIZER DIE FOR HIGH SPEED SIGNAL INTERCONNECT

Semiconductor Device and Method of Manufacture

Semiconductor Device and Method of Manufacturing

SEAL RING FOR BONDED DIES

3D Chip Sharing Clock Interconnect Layer

METHOD FOR FORMING HYBRID BONDING WITH THROUGH SUBSTRATE VIA (TSV)

BONDED PROCESSED SEMICONDUCTOR STRUCTURES AND CARRIERS

TREATMENT, BEFORE THE BONDING OF A MIXED CU-OXIDE SURFACE, BY A PLA...

TEMPORARY SEMICONDUCTOR STRUCTURE BONDING METHODS AND RELATED BONDE...

ASSEMBLY OF SEMICONDUCTOR CHIPS/WAFERS