Command of the display device

GPHYSICS G09Cryptography, education, displays G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G2310/00Command of the display device

G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto G09G2310/0202Addressing of scan or signal lines G09G2310/0205Simultaneous scanning of several lines in flat panels G09G2310/0208using active addressing G09G2310/021Double addressing, i.e. scanning two or more lines G09G2310/0213controlling the sequence of the scanning lines with respect to the patterns to be displayed G09G2310/0216Interleaved control phases for different scan lines in the same sub-field G09G2310/0218with collection of electrodes in groups for n-dimensional addressing G09G2310/0221with use of split matrices G09G2310/0224Details of interlacing G09G2310/0227related to multiple interlacing G09G2310/0229De-interlacing G09G2310/0232Special driving of display border areas G09G2310/0235Field-sequential colour display G09G2310/0237Switching ON and OFF the backlight within one frame G09G2310/024Scrolling of light from the illumination source over the display in combination with the scanning of the display screen G09G2310/0243Details of the generation of driving signals G09G2310/0245Clearing or presetting the whole screen independently of waveforms G09G2310/0248Precharge or discharge of column electrodes before or after applying exact column voltages G09G2310/0251Precharge or discharge of pixel before applying new pixel voltage G09G2310/0254Control of polarity reversal in general, other than for liquid crystal displays G09G2310/0256with the purpose of reversing the voltage across a light emitting or modulating element within a pixel G09G2310/0259with use of an analog or digital ramp generator in the column driver or in the pixel circuit G09G2310/0262The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes G09G2310/0264Details of driving circuits G09G2310/0267Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays G09G2310/027Details of drivers for data electrodes, the drivers handling digital grey scale data G09G2310/0272Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current G09G2310/0275Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current G09G2310/0278Details of driving circuits arranged to drive both scan and data electrodes G09G2310/0281Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure G09G2310/0283Arrangement of drivers for different directions of scanning G09G2310/0286Details of a shift registers arranged for use in a driving circuit G09G2310/0289Details of voltage level shifters arranged for use in a driving circuit G09G2310/0291Details of output amplifiers or buffers arranged for use in a driving circuit G09G2310/0294Details of sampling or holding circuits arranged for use in a driver for data electrodes G09G2310/0297Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel G09G2310/04Partial updating of the display screen G09G2310/06Details of flat display driving waveforms G09G2310/061for resetting or blanking G09G2310/062Waveforms for resetting a plurality of scan lines at a time G09G2310/063Waveforms for resetting the whole screen at once G09G2310/065Waveforms comprising zero voltage phase or pause G09G2310/066Waveforms comprising a gently increasing or decreasing portion G09G2310/067Special waveforms for scanning, where no circuit details of the gate driver are given G09G2310/068Application of pulses of alternating polarity prior to the drive pulse in electrophoretic displays G09G2310/08Details of timing specific for flat panels, other than clock recovery