comprising I/O circuitry

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CPC
G11C29/1201

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/1201comprising I/O circuitry

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Electronic device for adjusting driving voltage of volatile memory...
- Patent number 12,340,857
- Issue date Jun 24, 2025
- Samsung Electronics Co., Ltd.
- Changmi Shin
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid memory system with increased bandwidth
- Patent number 12,340,859
- Issue date Jun 24, 2025
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic fuse device and operation method thereof
- Patent number 12,326,473
- Issue date Jun 10, 2025
- Faraday Technology Corp.
- Chi-Chou Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital verify failbit count (VFC) circuit
- Patent number 12,322,465
- Issue date Jun 3, 2025
- Yangtze Memory Technologies Co., Ltd.
- Teng Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including sense amplifying circuit
- Patent number 12,315,579
- Issue date May 27, 2025
- SK Hynix Inc.
- Yeonsu Jang
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfigurable MBIST method based on adaptive march algorithm
- Patent number 12,308,085
- Issue date May 20, 2025
- Nanjing University Of Posts And Telecommunications
- Zhikuang Cai
- G11 - INFORMATION STORAGE
Information Patent Grant
In-situ detection of anomalies in integrated circuits using machine...
- Patent number 12,307,747
- Issue date May 20, 2025
- Intel Corporation
- Sriram R. Vangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable scan chain architecture for multi-port memory
- Patent number 12,300,338
- Issue date May 13, 2025
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system including a sub-controller and operating method of th...
- Patent number 12,300,341
- Issue date May 13, 2025
- SK Hynix Inc.
- Jong Joo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing a non-volatile memory
- Patent number 12,300,342
- Issue date May 13, 2025
- Infineon Technologies LLC
- Bogdan Georgescu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory device test method, and test system
- Patent number 12,300,344
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Hong-Jun Jin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory interface and semiconductor memory device and semiconductor...
- Patent number 12,293,801
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Hojun Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test burst patterns based on architecture of memory
- Patent number 12,293,803
- Issue date May 6, 2025
- Micron Technology, Inc.
- William Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit and receiving circuit having test function
- Patent number 12,288,589
- Issue date Apr 29, 2025
- SK hynix Inc.
- Gi Moon Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit retiring to mitigate bit errors
- Patent number 12,283,333
- Issue date Apr 22, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Component die validation built-in self-test (VBIST) engine
- Patent number 12,282,064
- Issue date Apr 22, 2025
- Ampere Computing LLC
- Sandeep Brahmadathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory BIST circuit and method
- Patent number 12,283,332
- Issue date Apr 22, 2025
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing memory device
- Patent number 12,272,415
- Issue date Apr 8, 2025
- NANYA TECHNOLOGY CORPORATION
- Yaochang Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for improving ECC operation of memories
- Patent number 12,266,410
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Christophe Laurent
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test circuit for row hammering in memory
- Patent number 12,266,413
- Issue date Apr 1, 2025
- Synopsys, Inc.
- Grigor Tshagharyan
- G11 - INFORMATION STORAGE
Information Patent Grant
Testability circuit and read and write path decoupling circuit of SRAM
- Patent number 12,260,924
- Issue date Mar 25, 2025
- Shanghai Huali Integrated Circuit Corporation
- Zhenan Lai
- G11 - INFORMATION STORAGE
Information Patent Grant
Data integrity check in non-volatile storage
- Patent number 12,260,925
- Issue date Mar 25, 2025
- SanDisk Technologies, Inc.
- Sugandha Sharma
- G11 - INFORMATION STORAGE
Information Patent Grant
Loopback datapath for clock quality detection
- Patent number 12,260,926
- Issue date Mar 25, 2025
- Micron Technology, Inc.
- Matthew Alan Prather
- G11 - INFORMATION STORAGE
Information Patent Grant
Die-based high and low priority error queues
- Patent number 12,260,927
- Issue date Mar 25, 2025
- Kioxia Corporation
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage device and method for runtime exclusive—or zoning duri...
- Patent number 12,254,936
- Issue date Mar 18, 2025
- SanDisk Technologies, Inc.
- Pawan Negi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and method for performing test
- Patent number 12,254,937
- Issue date Mar 18, 2025
- SK hynix Inc.
- Choung Ki Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with serial and parallel testing structure for sensin...
- Patent number 12,254,938
- Issue date Mar 18, 2025
- Alberto Troia
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit, test method and memory
- Patent number 12,254,941
- Issue date Mar 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jianyong Qin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface circuit, memory controller and method for calibrating sig...
- Patent number 12,249,385
- Issue date Mar 11, 2025
- Silicon Motion, Inc.
- Fu-Jen Shih
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory, memory system and operation method of memory system
- Patent number 12,249,386
- Issue date Mar 11, 2025
- SK Hynix Inc.
- Munseon Jang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE WITH IMPROVED SENSING STRUCTURE
- Publication number 20250210123
- Publication date Jun 26, 2025
- Lodestar Licensing Group LLC
- Alberto Troia
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR TESTING MEMORY DEVICE
- Publication number 20250201327
- Publication date Jun 19, 2025
- NANYA TECHNOLOGY CORPORATION
- Yaochang CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES
- Publication number 20250191669
- Publication date Jun 12, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh SHAH
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN-SELF-TEST LOGIC, MEMORY DEVICE INCLUDING BUILT-IN-SELF-TES...
- Publication number 20250191671
- Publication date Jun 12, 2025
- Samsung Electronics Co., Ltd.
- Jaehyeok KIM
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE
- Publication number 20250182838
- Publication date Jun 5, 2025
- Canon Kabushiki Kaisha
- YOSHIHISA SUZUKI
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK CONVERSION DEVICE, TEST SYSTEM INCLUDING THEREOF AND METHOD O...
- Publication number 20250174293
- Publication date May 29, 2025
- Samsung Electronics Co., Ltd.
- Jinuk Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE AND OPERATING METHOD THEREOF
- Publication number 20250157559
- Publication date May 15, 2025
- SK HYNIX INC.
- Jung Sik Choi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE HAVING CELL OVER PERIPHERY STRUCTURE AND SEMICONDUCTO...
- Publication number 20250140332
- Publication date May 1, 2025
- Samsung Electronics Co., Ltd.
- Changyoung Lee
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM FOR DETECTING FAIL LOCATION
- Publication number 20250140333
- Publication date May 1, 2025
- SK HYNIX INC.
- Dong Yoon KA
- G11 - INFORMATION STORAGE
Information Patent Application
STORING MEMORY ARRAY OPERATIONAL INFORMATION IN NON-VOLATILE SUBARRAYS
- Publication number 20250130908
- Publication date Apr 24, 2025
- Micron Technology, Inc.
- Christopher John Kawamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDING FUNCTIONALITY OF MEMORY CONTROLLERS USING A LOOPBACK MODE...
- Publication number 20250131970
- Publication date Apr 24, 2025
- Ampere Computing LLC
- Massimo Sutera
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES RELATED TO GENERATION OF INTERNAL COMMMANDS
- Publication number 20250124999
- Publication date Apr 17, 2025
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING CIRCUIT FOR A MEMORY DEVICE
- Publication number 20250118385
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Chunqiang Weng
- G11 - INFORMATION STORAGE
Information Patent Application
METADATA STORAGE AT A MEMORY DEVICE
- Publication number 20250118388
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
HEALTH SCAN FOR CONTENT ADDRESSABLE MEMORY
- Publication number 20250111884
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Tomoko Ogura Iwasaki
- G11 - INFORMATION STORAGE
Information Patent Application
DATA CODING DEVICE, MEMORY CONTROLLER, AND STORAGE DEVICE
- Publication number 20250104743
- Publication date Mar 27, 2025
- SK HYNIX INC.
- Ie Ryung PARK
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage Ramp Memory Calibration
- Publication number 20250104790
- Publication date Mar 27, 2025
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Application
READ DESTRUCTIVE MEMORY WEAR LEVELING SYSTEM
- Publication number 20250104793
- Publication date Mar 27, 2025
- SEAGATE TECHNOLOGY LLC
- Jon D. TRANTHAM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS INCLUDING BTI CONTROLLER
- Publication number 20250104792
- Publication date Mar 27, 2025
- Micron Technology, Inc.
- YASUSHI MATSUBARA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST CIRCUIT, MEMORY ARRAY, AND TESTING METHOD OF MEMORY ARRAY
- Publication number 20250095762
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER AND OUTPUT LATCH CIRCUIT FOR TESTING
- Publication number 20250087291
- Publication date Mar 13, 2025
- Taiwan Semiconductor Manufacturing company Ltd.
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR INITIALIZING MEMORY ERROR CORRECTION
- Publication number 20250078948
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250078946
- Publication date Mar 6, 2025
- RENESAS ELECTRONICS CORPORATION
- Tomohiro MIURA
- G11 - INFORMATION STORAGE
Information Patent Application
IMAGE DISPLAY DEVICE
- Publication number 20250078944
- Publication date Mar 6, 2025
- LG ELECTRONICS INC.
- Wonsang JEONG
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMOR...
- Publication number 20250069678
- Publication date Feb 27, 2025
- STMicroelectronics International N.V.
- Hitesh CHAWLA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND OPERATION METHOD THEREOF
- Publication number 20250069639
- Publication date Feb 27, 2025
- SK HYNIX INC.
- Sang Woo YOON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC DEVICE AND SYSTEM AND METHODS FOR DEFINITION AND CONFIGURATIO...
- Publication number 20250061958
- Publication date Feb 20, 2025
- MENTA
- Clément AYME
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING METHOD AND MEMORY MODULE UNDER TEST
- Publication number 20250046391
- Publication date Feb 6, 2025
- NANYA TECHNOLOGY CORPORATION
- Wei-Chun CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER FOR CONTROLLING BACKGROUND OPERATION AND OPERATIO...
- Publication number 20250037779
- Publication date Jan 30, 2025
- Samsung Electronics Co., Ltd.
- Sangsoo Cha
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC FUSE DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250037780
- Publication date Jan 30, 2025
- Faraday Technology Corp.
- Chi-Chou Huang
- G11 - INFORMATION STORAGE

comprising I/O circuitry

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Electronic device for adjusting driving voltage of volatile memory...

Hybrid memory system with increased bandwidth

Electronic fuse device and operation method thereof

Digital verify failbit count (VFC) circuit

Memory device including sense amplifying circuit

Reconfigurable MBIST method based on adaptive march algorithm

In-situ detection of anomalies in integrated circuits using machine...

Configurable scan chain architecture for multi-port memory

Memory system including a sub-controller and operating method of th...

System and method for testing a non-volatile memory

Memory device, memory device test method, and test system

Memory interface and semiconductor memory device and semiconductor...

Built-in self-test burst patterns based on architecture of memory

Test circuit and receiving circuit having test function

Bit retiring to mitigate bit errors

Component die validation built-in self-test (VBIST) engine

Memory BIST circuit and method

System and method for testing memory device

Methods and systems for improving ECC operation of memories

Built-in self-test circuit for row hammering in memory

Testability circuit and read and write path decoupling circuit of SRAM

Data integrity check in non-volatile storage

Loopback datapath for clock quality detection

Die-based high and low priority error queues

Data storage device and method for runtime exclusive—or zoning duri...

Semiconductor device and method for performing test

Memory device with serial and parallel testing structure for sensin...

Test circuit, test method and memory

Interface circuit, memory controller and method for calibrating sig...

Memory, memory system and operation method of memory system

Patents Applicationslast 30 patents

MEMORY DEVICE WITH IMPROVED SENSING STRUCTURE

SYSTEM AND METHOD FOR TESTING MEMORY DEVICE

METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES

BUILT-IN-SELF-TEST LOGIC, MEMORY DEVICE INCLUDING BUILT-IN-SELF-TES...

STORAGE DEVICE

CLOCK CONVERSION DEVICE, TEST SYSTEM INCLUDING THEREOF AND METHOD O...

STORAGE DEVICE AND OPERATING METHOD THEREOF

MEMORY DEVICE HAVING CELL OVER PERIPHERY STRUCTURE AND SEMICONDUCTO...

SEMICONDUCTOR SYSTEM FOR DETECTING FAIL LOCATION

STORING MEMORY ARRAY OPERATIONAL INFORMATION IN NON-VOLATILE SUBARRAYS

EXTENDING FUNCTIONALITY OF MEMORY CONTROLLERS USING A LOOPBACK MODE...

SEMICONDUCTOR DEVICES RELATED TO GENERATION OF INTERNAL COMMMANDS

TESTING CIRCUIT FOR A MEMORY DEVICE

METADATA STORAGE AT A MEMORY DEVICE

HEALTH SCAN FOR CONTENT ADDRESSABLE MEMORY

DATA CODING DEVICE, MEMORY CONTROLLER, AND STORAGE DEVICE

Voltage Ramp Memory Calibration

READ DESTRUCTIVE MEMORY WEAR LEVELING SYSTEM

APPARATUS INCLUDING BTI CONTROLLER

MEMORY TEST CIRCUIT, MEMORY ARRAY, AND TESTING METHOD OF MEMORY ARRAY

SENSE AMPLIFIER AND OUTPUT LATCH CIRCUIT FOR TESTING

TECHNIQUES FOR INITIALIZING MEMORY ERROR CORRECTION

MEMORY DEVICE

IMAGE DISPLAY DEVICE

BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMOR...

MEMORY AND OPERATION METHOD THEREOF

LOGIC DEVICE AND SYSTEM AND METHODS FOR DEFINITION AND CONFIGURATIO...

TESTING METHOD AND MEMORY MODULE UNDER TEST

MEMORY CONTROLLER FOR CONTROLLING BACKGROUND OPERATION AND OPERATIO...

ELECTRONIC FUSE DEVICE AND OPERATION METHOD THEREOF