Controlling diffusion profile by oxidation

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Y10S438/92

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S438/00Semiconductor device manufacturing: process

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Y10S438/92Controlling diffusion profile by oxidation

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Patents Grantslast 30 patents

Information Patent Grant
Method for fabricating transistor with thinned channel
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- Issue date May 7, 2024
- Tahoe Research, LTD.
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating transistor with thinned channel
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- Issue date Mar 2, 2021
- Intel Corporation
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Information Patent Grant
Semiconductor device
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- Issue date Feb 23, 2021
- Seiko Epson Corporation
- Katsumi Mori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
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- Issue date Jun 9, 2020
- Seiko Epson Corporation
- Katsumi Mori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for fabricating transistor with thinned channel
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- Issue date Jul 30, 2019
- Justin K. Brask
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Microstructure processing method and microstructure processing appa...
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- Issue date Jul 2, 2019
- Hitachi, Ltd.
- Keiji Watanabe
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Etch rate modulation through ion implantation
- Patent number 10,332,748
- Issue date Jun 25, 2019
- Varian Semiconductor Equipment Associates, Inc.
- Rajesh Prasad
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of manufacturing a semiconductor device
- Patent number 10,263,005
- Issue date Apr 16, 2019
- Renesas Electronics Corporation
- Keisuke Tsukamoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structures employing strained material layers with de...
- Patent number 10,164,015
- Issue date Dec 25, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Matthew T. Currie
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Atomic layer etching of tungsten and other metals
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- Issue date Oct 9, 2018
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Information Patent Grant
Bottom processing
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- Issue date Jul 10, 2018
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Information Patent Grant
Semiconductor device, method for manufacturing the same, method for...
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- Issue date May 22, 2018
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- Katsumi Mori
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Information Patent Grant
Etch rate modulation through ion implantation
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- Issue date Apr 3, 2018
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and manufacturing method thereof
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- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structures employing strained material layers with de...
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- Issue date Mar 20, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Matthew T. Currie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating transistor with thinned channel
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- Issue date Oct 31, 2017
- Intel Corporation
- Justin K. Brask
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of manufacturing a semiconductor device
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- Issue date Oct 24, 2017
- Renesas Electronics Corporation
- Keisuke Tsukamoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and manufacturing method thereof
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- Issue date Nov 29, 2016
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device, method for manufacturing the same, method for...
- Patent number 9,455,223
- Issue date Sep 27, 2016
- Seiko Epson Corporation
- Katsumi Mori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for determining thermal cycle reliability
- Patent number 9,443,776
- Issue date Sep 13, 2016
- GLOBALFOUNDRIES, INC.
- Ronald G. Filippi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,395,584
- Issue date Jul 19, 2016
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Method and structure for determining thermal cycle reliability
- Patent number 9,287,186
- Issue date Mar 15, 2016
- GLOBALFOUNDRIES Inc.
- Ronald Gene Filippi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor structures employing strained material layers with de...
- Patent number 9,281,376
- Issue date Mar 8, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Matthew T. Currie
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 9,224,667
- Issue date Dec 29, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device and method of fabricating the same
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- Issue date Jun 30, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,052,551
- Issue date Jun 9, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Methods of exposing conductive vias of semiconductor devices and as...
- Patent number 9,034,752
- Issue date May 19, 2015
- Micron Technology, Inc.
- Hongqi Li
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Integrated circuit package with open substrate and method of manufa...
- Patent number 9,034,693
- Issue date May 19, 2015
- ST Assembly Test Services Ltd.
- Il Kwon Shim
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Silicon wafer and method for heat-treating silicon wafer
- Patent number 8,999,864
- Issue date Apr 7, 2015
- Global Wafers Japan Co., Ltd.
- Takeshi Senda
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device, method for manufacturing the same, method for...
- Patent number 8,984,466
- Issue date Mar 17, 2015
- Seiko Epson Corporation
- Katsumi Mori
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC

Patents Applicationslast 30 patents

Information Patent Application
SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...
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- Hui Jae YOO
- H01 - BASIC ELECTRIC ELEMENTS
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METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND RE...
- Publication number 20210183697
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Hongqi Li
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
METHOD FOR FABRICATING TRANSISTOR WITH THINNED CHANNEL
- Publication number 20210135007
- Publication date May 6, 2021
- Intel Corporation
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20200258877
- Publication date Aug 13, 2020
- SEIKO EPSON CORPORATION
- Katsumi MORI
- G06 - COMPUTING CALCULATING COUNTING
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METHOD FOR FABRICATING TRANSISTOR WITH THINNED CHANNEL
- Publication number 20190371940
- Publication date Dec 5, 2019
- Intel Corporation
- Justin K. Brask
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
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SEMICONDUCTOR DEVICE
- Publication number 20190035776
- Publication date Jan 31, 2019
- SEIKO EPSON CORPORATION
- Katsumi MORI
- G06 - COMPUTING CALCULATING COUNTING
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Semiconductor Structures Employing Strained Material Layers with De...
- Publication number 20180197954
- Publication date Jul 12, 2018
- Taiwan Semiconductor Manufacturing company Ltd.
- Matthew T. Currie
- H01 - BASIC ELECTRIC ELEMENTS
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Etch Rate Modulation Through Ion Implantation
- Publication number 20180182636
- Publication date Jun 28, 2018
- Varian Semiconductor Equipment Associates, Inc.
- Rajesh Prasad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING TRANSISTOR WITH THINNED CHANNEL
- Publication number 20180047846
- Publication date Feb 15, 2018
- Intel Corporation
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
- Publication number 20180006048
- Publication date Jan 4, 2018
- Renesas Electronics Corporation
- Keisuke Tsukamoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
- Publication number 20140227843
- Publication date Aug 14, 2014
- RENESAS ELECTRONICS CORPORATION
- Keisuke Tsukamoto
- H01 - BASIC ELECTRIC ELEMENTS
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Semiconductor Structures Employing Strained Material Layers with De...
- Publication number 20140220755
- Publication date Aug 7, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Matthew T. Currie
- H01 - BASIC ELECTRIC ELEMENTS
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METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND AS...
- Publication number 20140183740
- Publication date Jul 3, 2014
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
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IMPROVEMENT OF REVERSE RECOVERY USING OXYGEN-VACANCY DEFECTS
- Publication number 20140179116
- Publication date Jun 26, 2014
- Toyota Jidosha Kabushiki Kaisha
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
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- Semiconductor Energy Laboratory Co., Ltd.
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- G02 - OPTICS
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- SEIKO EPSON CORPORATION
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PMOS TRANSISTORS AND FABRICATION METHOD
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- SEMICONDUCTOR MANUFACTURING INTERNATIONAL CORP.
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- Publication number 20130260553
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- Hui Jae Yoo
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Information Patent Application
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- Semiconductor Energy Laboratory Co., Ltd.
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METHODS AND STRUCTURES FOR CONTROLLING WAFER CURVATURE
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- Mohammed Fazil Fayaz
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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- Institute of Microelectronics, Chinese Academy of Sciences
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- Semiconductor Energy Laboratory Co., Ltd.
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- SUMITOMO ELECTRIC INDUSTRIES, LTD.
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- C30 - CRYSTAL GROWTH

Controlling diffusion profile by oxidation

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method for fabricating transistor with thinned channel

Method for fabricating transistor with thinned channel

Semiconductor device

Semiconductor device

Method for fabricating transistor with thinned channel

Microstructure processing method and microstructure processing appa...

Etch rate modulation through ion implantation

Method of manufacturing a semiconductor device

Semiconductor structures employing strained material layers with de...

Atomic layer etching of tungsten and other metals

Bottom processing

Semiconductor device, method for manufacturing the same, method for...

Etch rate modulation through ion implantation

Semiconductor device and manufacturing method thereof

Semiconductor structures employing strained material layers with de...

Method for fabricating transistor with thinned channel

Method of manufacturing a semiconductor device

Semiconductor device and manufacturing method thereof

Semiconductor device, method for manufacturing the same, method for...

Method and structure for determining thermal cycle reliability

Semiconductor device and method of fabricating the same

Method and structure for determining thermal cycle reliability

Semiconductor structures employing strained material layers with de...

Semiconductor device and manufacturing method thereof

Semiconductor device and method of fabricating the same

Semiconductor device and method of fabricating the same

Methods of exposing conductive vias of semiconductor devices and as...

Integrated circuit package with open substrate and method of manufa...

Silicon wafer and method for heat-treating silicon wafer

Semiconductor device, method for manufacturing the same, method for...

Patents Applicationslast 30 patents

SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...

METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND RE...

METHOD FOR FABRICATING TRANSISTOR WITH THINNED CHANNEL

SEMICONDUCTOR DEVICE

METHOD FOR FABRICATING TRANSISTOR WITH THINNED CHANNEL

SEMICONDUCTOR DEVICE

Semiconductor Structures Employing Strained Material Layers with De...

Etch Rate Modulation Through Ion Implantation

METHOD FOR FABRICATING TRANSISTOR WITH THINNED CHANNEL

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

Semiconductor Structures Employing Strained Material Layers with De...

METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND AS...

IMPROVEMENT OF REVERSE RECOVERY USING OXYGEN-VACANCY DEFECTS

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, METHOD FOR...

PMOS TRANSISTORS AND FABRICATION METHOD

SEMICONDUCTOR DEVICE HAVING RING-SHAPED GATE ELECTRODE, DESIGN APPA...

SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, METHOD FOR...

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

Semiconductor Structures Employing Strained Material Layers with De...

METHODS AND STRUCTURES FOR CONTROLLING WAFER CURVATURE

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND...

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, METHOD FOR...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE

METHOD OF PROCESSING OF NITRIDE SEMICONDUCTOR WAFER, NITRIDE SEMICO...