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H01L2224/09179

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/09179Corner adaptations

Industries

Patents Grantslast 30 patents

Information Patent Grant
Offset-aligned three-dimensional integrated circuit
- Patent number 11,855,061
- Issue date Dec 26, 2023
- Advanced Micro Devices, Inc.
- Brett P. Wilkerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Offset-aligned three-dimensional integrated circuit
- Patent number 11,437,359
- Issue date Sep 6, 2022
- Advanced Micro Devices, Inc.
- Brett P. Wilkerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Alignment carrier for interconnect bridge assembly
- Patent number 11,393,759
- Issue date Jul 19, 2022
- International Business Machines Corporation
- Thomas Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Offset-aligned three-dimensional integrated circuit
- Patent number 10,573,630
- Issue date Feb 25, 2020
- Advanced Micro Devices, Inc.
- Brett P. Wilkerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor chip with each contact pad...
- Patent number 9,299,673
- Issue date Mar 29, 2016
- Infineon Technologies AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor stacked package
- Patent number 9,208,827
- Issue date Dec 8, 2015
- SK Hynix Inc.
- Ki Yong Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices and semiconductor packages
- Patent number 9,070,569
- Issue date Jun 30, 2015
- Samsung Electronics Co., Ltd.
- Ho-Cheol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices and semiconductor packages
- Patent number 8,796,863
- Issue date Aug 5, 2014
- Samsung Electronics Co., Ltd.
- Ho-Cheol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor chip comprising a plurality of contact pads and a plu...
- Patent number 8,779,577
- Issue date Jul 15, 2014
- Infineon Technologies AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CHIP STRUCTURE, SEMICONDUCTOR PACKAGE, AND FABRICATING METHOD THEREOF
- Publication number 20240021558
- Publication date Jan 18, 2024
- Powertech Technology Inc.
- Shang-Yu CHANG-CHIEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20230411328
- Publication date Dec 21, 2023
- KIOXIA Corporation
- Shinya ARAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
- Publication number 20230317657
- Publication date Oct 5, 2023
- Samsung Electronics Co., Ltd.
- Wonil SEO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20230230946
- Publication date Jul 20, 2023
- Samsung Electronics Co., Ltd.
- Seongyo KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LAYOUTS OF DATA PADS ON A SEMICONDUCTOR DIE
- Publication number 20230215828
- Publication date Jul 6, 2023
- Micron Technology, Inc.
- Andreas Kuesel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20230215829
- Publication date Jul 6, 2023
- Samsung Electronics Co., Ltd.
- JINHEE HONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OFFSET-ALIGNED THREE-DIMENSIONAL INTEGRATED CIRCUIT
- Publication number 20220392882
- Publication date Dec 8, 2022
- ADVANCED MICRO DEVICES, INC.
- Brett P. Wilkerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ALIGNMENT CARRIER FOR INTERCONNECT BRIDGE ASSEMBLY
- Publication number 20210104464
- Publication date Apr 8, 2021
- International Business Machines Corporation
- Thomas Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OFFSET-ALIGNED THREE-DIMENSIONAL INTEGRATED CIRCUIT
- Publication number 20200194413
- Publication date Jun 18, 2020
- ADVANCED MICRO DEVICES, INC.
- Brett P. Wilkerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OFFSET-ALIGNED THREE-DIMENSIONAL INTEGRATED CIRCUIT
- Publication number 20190326272
- Publication date Oct 24, 2019
- ADVANCED MICRO DEVICES, INC.
- Brett P. Wilkerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH A RESIN LAYER AND METHOD OF MANUFACTURING...
- Publication number 20170133344
- Publication date May 11, 2017
- Kabushiki Kaisha Toshiba
- Satoru TAKAKU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STACKED PACKAGE
- Publication number 20150302900
- Publication date Oct 22, 2015
- SK HYNIX INC.
- Ki Yong LEE
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR PACKAGES
- Publication number 20140346516
- Publication date Nov 27, 2014
- Ho-Cheol LEE
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...
- Publication number 20140264814
- Publication date Sep 18, 2014
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...
- Publication number 20130207254
- Publication date Aug 15, 2013
- INFINEON TECHNOLOGIES AG
- Peter Ossimitz
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR PACKAGES
- Publication number 20110193086
- Publication date Aug 11, 2011
- Samsung Electronics Co., Ltd.
- Ho-Cheol LEE
- G11 - INFORMATION STORAGE

Corner adaptations

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Offset-aligned three-dimensional integrated circuit

Offset-aligned three-dimensional integrated circuit

Alignment carrier for interconnect bridge assembly

Offset-aligned three-dimensional integrated circuit

Method for manufacturing a semiconductor chip with each contact pad...

Semiconductor stacked package

Semiconductor memory devices and semiconductor packages

Semiconductor memory devices and semiconductor packages

Semiconductor chip comprising a plurality of contact pads and a plu...

Patents Applicationslast 30 patents

CHIP STRUCTURE, SEMICONDUCTOR PACKAGE, AND FABRICATING METHOD THEREOF

SEMICONDUCTOR DEVICE

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

SEMICONDUCTOR PACKAGE

LAYOUTS OF DATA PADS ON A SEMICONDUCTOR DIE

SEMICONDUCTOR PACKAGE

OFFSET-ALIGNED THREE-DIMENSIONAL INTEGRATED CIRCUIT

ALIGNMENT CARRIER FOR INTERCONNECT BRIDGE ASSEMBLY

OFFSET-ALIGNED THREE-DIMENSIONAL INTEGRATED CIRCUIT

OFFSET-ALIGNED THREE-DIMENSIONAL INTEGRATED CIRCUIT

SEMICONDUCTOR DEVICE WITH A RESIN LAYER AND METHOD OF MANUFACTURING...

SEMICONDUCTOR STACKED PACKAGE

SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR PACKAGES

SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...

SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING A SEMICONDUCTOR CHIP,...

SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR PACKAGES