Data input buffers

Industry

CPC
G11C7/1084

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/1084Data input buffers

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Controlling memory module clock buffer power in a system with a sin...
- Patent number 12,315,594
- Issue date May 27, 2025
- Dell Products L.P.
- Isaac Q. Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device configured to reduce verification time and operating...
- Patent number 12,315,590
- Issue date May 27, 2025
- Samsung Electronics Co., Ltd.
- Hyunjun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory package having stacked array dies and reduced driver load
- Patent number 12,308,087
- Issue date May 20, 2025
- Netlist, Inc.
- Hyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module multiple port buffer techniques
- Patent number 12,300,349
- Issue date May 13, 2025
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Grant
On-die termination
- Patent number 12,301,227
- Issue date May 13, 2025
- RAMBUS INC.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Receiving circuit and memory
- Patent number 12,300,350
- Issue date May 13, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Resumption of program or erase operations in memory
- Patent number 12,300,332
- Issue date May 13, 2025
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Offset calibration training method for adjusting data receiver offs...
- Patent number 12,293,807
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Younggil Go
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic device with buffered operation engine and method for per...
- Patent number 12,283,344
- Issue date Apr 22, 2025
- XCENA Inc.
- Ji Hun Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and ZQ calibration method
- Patent number 12,277,992
- Issue date Apr 15, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Kai Tian
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing spurious write operations in a memory device
- Patent number 12,272,424
- Issue date Apr 8, 2025
- Synopsys, Inc.
- Shishir Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
ATPG testing method for latch based memories, for area reduction
- Patent number 12,272,416
- Issue date Apr 8, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Venkata Narayanan Srinivasan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting stable data transfer and memory system...
- Patent number 12,243,616
- Issue date Mar 4, 2025
- SK hynix Inc.
- Hyeon Uk Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Loopback circuit for low-power memory devices
- Patent number 12,243,617
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Yoshihito Morishita
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer control of multiple memory banks
- Patent number 12,243,621
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shih-Lien Linus Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device including nonvolatile memory device and controller,...
- Patent number 12,242,761
- Issue date Mar 4, 2025
- Samsung Electronics Co., Ltd.
- Jesuk Yeon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level signaling in memory with wide system interface
- Patent number 12,237,953
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Timothy M. Hollis
- G11 - INFORMATION STORAGE
Information Patent Grant
Data receiving circuit, data receiving system and memory device
- Patent number 12,237,042
- Issue date Feb 25, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory system, and operating method of memory system
- Patent number 12,230,356
- Issue date Feb 18, 2025
- Samsung Electronics Co., Ltd.
- Sun Young Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Bias generation circuit and memory circuit
- Patent number 12,217,818
- Issue date Feb 4, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhonglai Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for error correction coding with multiple hash groupings and...
- Patent number 12,211,574
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Katherine H. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data-buffer controller/control-signal redriver
- Patent number 12,211,583
- Issue date Jan 28, 2025
- RAMBUS INC.
- Torsten Partsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and memory system including the same
- Patent number 12,190,995
- Issue date Jan 7, 2025
- Samsung Electronics Co., Ltd.
- Byunghoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller and a method for controlling access to a memory m...
- Patent number 12,190,996
- Issue date Jan 7, 2025
- MONTAGE TECHNOLOGY CO., LTD.
- Yi Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input buffer circuit and semiconductor memory
- Patent number 12,183,423
- Issue date Dec 31, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Siman Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Input buffer circuit in semiconductor memory device having hysteres...
- Patent number 12,176,897
- Issue date Dec 24, 2024
- FIDELIX CO., LTD.
- Jae Jin Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,176,062
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- He-Zhou Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer configurations for communications between memory dies and a...
- Patent number 12,170,127
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture and method for repeatedly using the...
- Patent number 12,159,685
- Issue date Dec 3, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250149076
- Publication date May 8, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250124959
- Publication date Apr 17, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR ERROR CORRECTION CODING WITH MULTIPLE HASH GROUPINGS AND...
- Publication number 20250124997
- Publication date Apr 17, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Katherine H. CHIANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Current Control Systems And Methods For Communications Between Devices
- Publication number 20250104745
- Publication date Mar 27, 2025
- Intel Corporation
- Kasper Wszolek
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING...
- Publication number 20250104751
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- Byongmo MOON
- G11 - INFORMATION STORAGE
Information Patent Application
DATA BUFFER FOR MEMORY DEVICES WITH MEMORY ADDRESS REMAPPING
- Publication number 20250087255
- Publication date Mar 13, 2025
- Rambus Inc.
- Christopher Haywood
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING VOLTAGE GENERATING CIRCUIT AND OPERATION ME...
- Publication number 20250087256
- Publication date Mar 13, 2025
- Samsung Electronics Co., Ltd.
- Yoonjae Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250078885
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- He-Zhou WAN
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...
- Publication number 20250078884
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
ON-DIE TERMINATION OPTIMIZATION
- Publication number 20250045234
- Publication date Feb 6, 2025
- Dell Products L.P.
- Douglas S. Winterberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES FOR MULTIPLE READ OPERATIONS
- Publication number 20250029641
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR CORRECTING AN ERROR IN DATA TRANSMISSION O...
- Publication number 20250014666
- Publication date Jan 9, 2025
- MimirIP LLC
- In Jong JANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING OFFSET CALIBRATION AND OPERATING METHOD TH...
- Publication number 20250006233
- Publication date Jan 2, 2025
- Samsung Electronics Co., Ltd.
- Donghun Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous Input Buffer Control Using a Ripple Counter
- Publication number 20240420746
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Brian W. Huber
- G11 - INFORMATION STORAGE
Information Patent Application
INTERFACE REGIONS, AND ASSOCIATED DEVICES AND SYSTEMS
- Publication number 20240420747
- Publication date Dec 19, 2024
- Lodestar Licensing Group LLC
- KAZUHIRO YOSHIDA
- G11 - INFORMATION STORAGE
Information Patent Application
ENDURANCE, POWER, AND PERFORMANCE IMPROVEMENT LOGIC FOR A MEMORY ARRAY
- Publication number 20240420761
- Publication date Dec 19, 2024
- Numem Inc.
- Jack Guedj
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-DRIVER SIGNALING
- Publication number 20240412765
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS FOR TRANSMITTING AND RECEIVING A SIGNAL, A METHOD OF OPER...
- Publication number 20240388291
- Publication date Nov 21, 2024
- Samsung Electronics Co., Ltd.
- Changkyo Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple Stack High Voltage Circuit for Memory
- Publication number 20240386919
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR READING DATA IN MEMORY
- Publication number 20240371420
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaw-Juinn Horng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY INCLUDING ON-DIE-TERMINATION CIRCUIT AND STORAGE...
- Publication number 20240371457
- Publication date Nov 7, 2024
- Samsung Electronics Co., Ltd.
- Eun-Ji Kim
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR INPUT BUFFER POWER SAVINGS
- Publication number 20240355378
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Akira Yamashita
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CIRCUIT, CLOCK GENERATING CIRCUIT, SEMICONDUCTOR APPARATUS A...
- Publication number 20240356550
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Ji Hyo KANG
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES TO MITIGATE MEMORY DIE MISALIGNMENT
- Publication number 20240347083
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Jie Yang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEMS AND DEVICES THAT SUPPORT METHODS FOR CALIBRATING INP...
- Publication number 20240296876
- Publication date Sep 5, 2024
- Samsung Electronics Co., Ltd.
- YongHyun An
- G11 - INFORMATION STORAGE
Information Patent Application
ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION
- Publication number 20240296899
- Publication date Sep 5, 2024
- STMicroelectronics International N.V.
- Venkata Narayanan SRINIVASAN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING NEW COMMAND INPUT SCHEME AND METHOD OF...
- Publication number 20240282353
- Publication date Aug 22, 2024
- Samsung Electronics Co., Ltd.
- Youngcheon KWON
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE
- Publication number 20240274167
- Publication date Aug 15, 2024
- SK HYNIX INC.
- Hyung Jin CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND TRAINING METHOD OF THE SEMICONDUCTOR DEVICE
- Publication number 20240274168
- Publication date Aug 15, 2024
- SK HYNIX INC.
- Choung Ki SONG
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY...
- Publication number 20240249756
- Publication date Jul 25, 2024
- SK HYNIX INC.
- Choung Ki SONG
- G11 - INFORMATION STORAGE

Data input buffers

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Controlling memory module clock buffer power in a system with a sin...

Memory device configured to reduce verification time and operating...

Memory package having stacked array dies and reduced driver load

Memory module multiple port buffer techniques

On-die termination

Receiving circuit and memory

Resumption of program or erase operations in memory

Offset calibration training method for adjusting data receiver offs...

Electronic device with buffered operation engine and method for per...

Memory device and ZQ calibration method

Reducing spurious write operations in a memory device

ATPG testing method for latch based memories, for area reduction

Memory device for supporting stable data transfer and memory system...

Loopback circuit for low-power memory devices

Buffer control of multiple memory banks

Storage device including nonvolatile memory device and controller,...

Multi-level signaling in memory with wide system interface

Data receiving circuit, data receiving system and memory device

Memory device, memory system, and operating method of memory system

Bias generation circuit and memory circuit

Memory device for supporting command bus training mode and method o...

Method for error correction coding with multiple hash groupings and...

Data-buffer controller/control-signal redriver

Memory device and memory system including the same

Memory controller and a method for controlling access to a memory m...

Input buffer circuit and semiconductor memory

Input buffer circuit in semiconductor memory device having hysteres...

Memory device

Buffer configurations for communications between memory dies and a...

Partitioned memory architecture and method for repeatedly using the...

Patents Applicationslast 30 patents

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

METHOD FOR ERROR CORRECTION CODING WITH MULTIPLE HASH GROUPINGS AND...

Current Control Systems And Methods For Communications Between Devices

MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING...

DATA BUFFER FOR MEMORY DEVICES WITH MEMORY ADDRESS REMAPPING

MEMORY DEVICE INCLUDING VOLTAGE GENERATING CIRCUIT AND OPERATION ME...

MEMORY DEVICE

BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...

ON-DIE TERMINATION OPTIMIZATION

MEMORY DEVICES FOR MULTIPLE READ OPERATIONS

APPARATUS AND METHOD FOR CORRECTING AN ERROR IN DATA TRANSMISSION O...

MEMORY DEVICE PERFORMING OFFSET CALIBRATION AND OPERATING METHOD TH...

Synchronous Input Buffer Control Using a Ripple Counter

INTERFACE REGIONS, AND ASSOCIATED DEVICES AND SYSTEMS

ENDURANCE, POWER, AND PERFORMANCE IMPROVEMENT LOGIC FOR A MEMORY ARRAY

MULTI-DRIVER SIGNALING

APPARATUS FOR TRANSMITTING AND RECEIVING A SIGNAL, A METHOD OF OPER...

Multiple Stack High Voltage Circuit for Memory

DEVICE AND METHOD FOR READING DATA IN MEMORY

NONVOLATILE MEMORY INCLUDING ON-DIE-TERMINATION CIRCUIT AND STORAGE...

APPARATUSES AND METHODS FOR INPUT BUFFER POWER SAVINGS

BUFFER CIRCUIT, CLOCK GENERATING CIRCUIT, SEMICONDUCTOR APPARATUS A...

TECHNIQUES TO MITIGATE MEMORY DIE MISALIGNMENT

MEMORY SYSTEMS AND DEVICES THAT SUPPORT METHODS FOR CALIBRATING INP...

ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION

MEMORY DEVICE FOR SUPPORTING NEW COMMAND INPUT SCHEME AND METHOD OF...

SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE AND TRAINING METHOD OF THE SEMICONDUCTOR DEVICE

BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY...