Direct decoding

Industry

CPC
H03M13/1575

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Parent Industries

HELECTRICITY H03Electronic circuits H03MCODING DECODING CODE CONVERSION IN GENERAL H03M13/00Coding, decoding or code conversion, for error detection or error correction Coding theory basic assumptions Coding bounds Error probability evaluation methods Channel models Simulation or testing of codes

Current Industry

H03M13/1575Direct decoding

Industries

Patents Grantslast 30 patents

Information Patent Grant
Capacity-expanding memory control component
- Patent number 12,323,164
- Issue date Jun 3, 2025
- Astera Labs, Inc.
- Enrique Musoll
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst correction reed solomon decoding for memory applications
- Patent number 12,321,229
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Joseph M. McCrate
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Iterative decoding technique for correcting DRAM device failures
- Patent number 12,316,349
- Issue date May 27, 2025
- Micron Technology, Inc.
- Joseph M. McCrate
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Software-hardware memory management modes
- Patent number 12,314,187
- Issue date May 27, 2025
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoding of error correction codes based on reverse diffusion
- Patent number 12,294,387
- Issue date May 6, 2025
- Ramot At Tel-Aviv University Ltd.
- Yoni Choukroun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Encoding device, encoding method, decoding device, decoding method,...
- Patent number 12,289,118
- Issue date Apr 29, 2025
- SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Tatsuya Sugioka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Byte error correction
- Patent number 12,273,125
- Issue date Apr 8, 2025
- Infineon Technologies AG
- Thomas Kern
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Decoding errors using quantum subspace expansion
- Patent number 12,261,627
- Issue date Mar 25, 2025
- Google LLC
- Jarrod Ryan McClean
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction systems and methods
- Patent number 12,250,005
- Issue date Mar 11, 2025
- Microsoft Technology Licensing, LLC
- Gregory Alan Bryant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encoder and decoder of forward error correction (FEC) codec
- Patent number 12,244,326
- Issue date Mar 4, 2025
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore, multibank, fully concurrent coherence controller
- Patent number 12,223,165
- Issue date Feb 11, 2025
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction with fast syndrome calculation
- Patent number 12,218,688
- Issue date Feb 4, 2025
- Infineon Technologies AG
- Rainer Göttfert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bit mask for syndrome decoding operations
- Patent number 12,218,681
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Leon Zlotnik
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Decoding errors using quantum subspace expansion
- Patent number 12,210,936
- Issue date Jan 28, 2025
- Google LLC
- Jarrod Ryan McClean
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-stalling, non-blocking translation lookaside buffer invalidation
- Patent number 12,210,459
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Syndrome decoder circuit
- Patent number 12,212,338
- Issue date Jan 28, 2025
- Winbond Electronics Corp.
- Chuen-Der Lien
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electronic device having ECC decoder
- Patent number 12,204,404
- Issue date Jan 21, 2025
- SK Hynix Inc.
- Dae Sung Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual network pre-arbitration for deadlock avoidance and enhanced...
- Patent number 12,182,398
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of reducing logic for multi-bit error correcting...
- Patent number 12,181,968
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code circuit, memory device including error correc...
- Patent number 12,176,919
- Issue date Dec 24, 2024
- Samsung Electronics Co., Ltd.
- Sung-Rae Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Iterative decoder for correcting dram device failures
- Patent number 12,170,531
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Joseph M. McCrate
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device and method of operating semiconductor m...
- Patent number 12,170,533
- Issue date Dec 17, 2024
- Samsung Electronics Co., Ltd.
- Sungrae Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial speed changes to improve in-order transfer
- Patent number 12,166,505
- Issue date Dec 10, 2024
- SanDisk Technologies, Inc.
- Shay Benisty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,159,030
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-cycle byte correcting and multi-byte detecting error code
- Patent number 12,149,259
- Issue date Nov 19, 2024
- NVIDIA Corporation
- Michael Brendan Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processing-in-memory (PIM) devices
- Patent number 12,148,491
- Issue date Nov 19, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallelized scrubbing transactions
- Patent number 12,147,301
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- David Matthew Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache for coherent system
- Patent number 12,141,435
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient similarity search
- Patent number 12,135,725
- Issue date Nov 5, 2024
- GSI Technology Inc.
- Samuel Lifsches
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for encoded diagnostics in a functional safety system
- Patent number 12,124,321
- Issue date Oct 22, 2024
- Fort Robotics, Inc.
- Kerfegar Khurshed Katrak
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CODING CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20250183916
- Publication date Jun 5, 2025
- SK HYNIX INC.
- Seongyoon Kang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER
- Publication number 20250181238
- Publication date Jun 5, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Matthew David PIERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DECODING CODEWORDS
- Publication number 20250167812
- Publication date May 22, 2025
- INNOGRIT TECHNOLOGIES CO., LTD
- Chenrong Xiong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NON-STALLING, NON-BLOCKING TRANSLATION LOOKASIDE BUFFER INVALIDATION
- Publication number 20250117338
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Brad WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE SHARED CACHE OPERATION ENGINE
- Publication number 20250094044
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR ELECTRONIC FUSE MANAGEMENT
- Publication number 20250093900
- Publication date Mar 20, 2025
- QUALCOMM Incorporated
- Remi GERAUD-STEWART
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Error Correction Device and Method for Correcting a Data Block
- Publication number 20250088205
- Publication date Mar 13, 2025
- INFINEON TECHNOLOGIES AG
- Berndt Gammel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Error Correction Device and Method for Correcting a Data Block
- Publication number 20250088202
- Publication date Mar 13, 2025
- INFINEON TECHNOLOGIES AG
- Rainer Göttfert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY REPAIR METHOD AND APPARATUS BASED ON ERROR CODE TRACKING
- Publication number 20250086051
- Publication date Mar 13, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE CACHE FOR COHERENT SYSTEM
- Publication number 20250060873
- Publication date Feb 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing a Data Word
- Publication number 20250038770
- Publication date Jan 30, 2025
- INFINEON TECHNOLOGIES AG
- Bernd Meyer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PARALLELIZED SCRUBBING TRANSACTIONS
- Publication number 20250036522
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- David Matthew THOMPSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNDROME DECODER CIRCUIT
- Publication number 20250038769
- Publication date Jan 30, 2025
- WINBOND ELECTRONICS CORP.
- Chuen-Der Lien
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DECODING ERRORS USING QUANTUM SUBSPACE EXPANSION
- Publication number 20250030440
- Publication date Jan 23, 2025
- Google LLC
- Jarrod Ryan McClean
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR ENCODED DIAGNOSTICS IN A FUNCTIONAL SAFETY SYSTEM
- Publication number 20250013515
- Publication date Jan 9, 2025
- Fort Robotics, Inc.
- Kerfegar Khurshed Katrak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION SYSTEMS AND METHODS
- Publication number 20240421833
- Publication date Dec 19, 2024
- Microsoft Technology Licensing, LLC
- Gregory Alan BRYANT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ITERATIVE DECODING TECHNIQUE FOR CORRECTING DRAM DEVICE FAILURES
- Publication number 20240413842
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Joseph M. McCrate
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ASSOCIATIVE COMPUTING FOR ERROR CORRECTION
- Publication number 20240396573
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Ameen D. Akel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS
- Publication number 20240388311
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE MODE ERROR CONTROL
- Publication number 20240372566
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FAST MULTI-PAYLOAD-LENGTH ERROR-CORRECTING SYSTEM AND METHODS
- Publication number 20240356567
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION CODE (ECC) CIRCUIT INCLUDING LOW-DENSITY PARITY-CH...
- Publication number 20240356565
- Publication date Oct 24, 2024
- Samsung Electronics Co., Ltd.
- Kangseok Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FAST MULTI-PAYLOAD-LENGTH ERROR-CORRECTING SYSTEM AND METHODS
- Publication number 20240356566
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Marco Sforzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ENCODING DEVICE, ENCODING METHOD, DECODING DEVICE, DECODING METHOD,...
- Publication number 20240348266
- Publication date Oct 17, 2024
- Sony Semiconductor Solutions Corporation
- Tatsuya Sugioka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HANDLING NON-CORRECTABLE ERRORS
- Publication number 20240311235
- Publication date Sep 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- David Matthew THOMPSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HETEROGENOUS INTERLEAVED REED-SOLOMON (HETIRS) WITH ERASURE DECODING
- Publication number 20240297668
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Joseph M. MCCRATE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFECTLY BALANCED ERROR CODE CORRECTION WITHOUT CORRECTION POWER I...
- Publication number 20240291505
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DETECTING A STALL CONDITION IN BIT FLIPPING DECODING USING SYNDROME...
- Publication number 20240275407
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY SYSTEM, MEMORY CONTROLLER, AND METHOD OF CONTROLLING NON-VOL...
- Publication number 20240275408
- Publication date Aug 15, 2024
- KIOXIA Corporation
- Yuki KONDO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for Transmitting a Check Vector From a Transmitter Unit to a...
- Publication number 20240267058
- Publication date Aug 8, 2024
- Deutsches Zentrum fur Luft-und Raumfahrt e.V.
- Francisco Lázaro Blasco
- G06 - COMPUTING CALCULATING COUNTING

Direct decoding

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Capacity-expanding memory control component

Burst correction reed solomon decoding for memory applications

Iterative decoding technique for correcting DRAM device failures

Software-hardware memory management modes

Decoding of error correction codes based on reverse diffusion

Encoding device, encoding method, decoding device, decoding method,...

Byte error correction

Decoding errors using quantum subspace expansion

Error correction systems and methods

Encoder and decoder of forward error correction (FEC) codec

Multicore, multibank, fully concurrent coherence controller

Error correction with fast syndrome calculation

Bit mask for syndrome decoding operations

Decoding errors using quantum subspace expansion

Non-stalling, non-blocking translation lookaside buffer invalidation

Syndrome decoder circuit

Electronic device having ECC decoder

Virtual network pre-arbitration for deadlock avoidance and enhanced...

System and method of reducing logic for multi-bit error correcting...

Error correction code circuit, memory device including error correc...

Iterative decoder for correcting dram device failures

Semiconductor memory device and method of operating semiconductor m...

Partial speed changes to improve in-order transfer

Multicore shared cache operation engine

Single-cycle byte correcting and multi-byte detecting error code

Processing-in-memory (PIM) devices

Parallelized scrubbing transactions

Configurable cache for coherent system

Efficient similarity search

Method for encoded diagnostics in a functional safety system

Patents Applicationslast 30 patents

CODING CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER

SYSTEMS AND METHODS FOR DECODING CODEWORDS

NON-STALLING, NON-BLOCKING TRANSLATION LOOKASIDE BUFFER INVALIDATION

MULTICORE SHARED CACHE OPERATION ENGINE

SYSTEMS AND METHODS FOR ELECTRONIC FUSE MANAGEMENT

Error Correction Device and Method for Correcting a Data Block

Error Correction Device and Method for Correcting a Data Block

MEMORY REPAIR METHOD AND APPARATUS BASED ON ERROR CODE TRACKING

CONFIGURABLE CACHE FOR COHERENT SYSTEM

Processing a Data Word

PARALLELIZED SCRUBBING TRANSACTIONS

SYNDROME DECODER CIRCUIT

DECODING ERRORS USING QUANTUM SUBSPACE EXPANSION

METHOD FOR ENCODED DIAGNOSTICS IN A FUNCTIONAL SAFETY SYSTEM

ERROR CORRECTION SYSTEMS AND METHODS

ITERATIVE DECODING TECHNIQUE FOR CORRECTING DRAM DEVICE FAILURES

ASSOCIATIVE COMPUTING FOR ERROR CORRECTION

TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS

SELECTIVE MODE ERROR CONTROL

FAST MULTI-PAYLOAD-LENGTH ERROR-CORRECTING SYSTEM AND METHODS

ERROR CORRECTION CODE (ECC) CIRCUIT INCLUDING LOW-DENSITY PARITY-CH...

FAST MULTI-PAYLOAD-LENGTH ERROR-CORRECTING SYSTEM AND METHODS

ENCODING DEVICE, ENCODING METHOD, DECODING DEVICE, DECODING METHOD,...

HANDLING NON-CORRECTABLE ERRORS

HETEROGENOUS INTERLEAVED REED-SOLOMON (HETIRS) WITH ERASURE DECODING

PERFECTLY BALANCED ERROR CODE CORRECTION WITHOUT CORRECTION POWER I...

DETECTING A STALL CONDITION IN BIT FLIPPING DECODING USING SYNDROME...

MEMORY SYSTEM, MEMORY CONTROLLER, AND METHOD OF CONTROLLING NON-VOL...

Method for Transmitting a Check Vector From a Transmitter Unit to a...