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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

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Y10S148/04Dopants, special

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Patents Grantslast 30 patents

Information Patent Grant
Microstructure processing method and microstructure processing appa...
- Patent number 10,336,609
- Issue date Jul 2, 2019
- Hitachi, Ltd.
- Keiji Watanabe
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Atomic layer etching of tungsten and other metals
- Patent number 10,096,487
- Issue date Oct 9, 2018
- Lam Research Corporation
- Wenbing Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bottom processing
- Patent number 10,020,204
- Issue date Jul 10, 2018
- Applied Materials, Inc.
- Joseph M. Ranish
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating semiconductor device
- Patent number 7,037,371
- Issue date May 2, 2006
- Matsushita Electric Industrial Co., Ltd.
- Shin Hashimoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon wafers for CMOS and other integrated circuits
- Patent number 6,667,522
- Issue date Dec 23, 2003
- Intel Corporation
- Kramadhati V. Ravi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CVD apparatus
- Patent number 6,520,189
- Issue date Feb 18, 2003
- Semiconductor Energy Laboratory Co., Ltd.
- Takashi Inushima
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Silicon wafers for CMOS and other integrated circuits
- Patent number 6,423,615
- Issue date Jul 23, 2002
- Intel Corporation
- Kramadhati V. Ravi
- C30 - CRYSTAL GROWTH
Information Patent Grant
Insulation layer structure and method for making the same
- Patent number 6,150,220
- Issue date Nov 21, 2000
- Hyundai Electronics Industries Co., Ltd.
- Yun-Jun Huh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a polysilicon TFT with a variable thicknes...
- Patent number 6,124,153
- Issue date Sep 26, 2000
- SamSung Electronics Co., Ltd.
- Joo-hyung Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating integrated circuits with oxidized isolation
- Patent number 6,093,620
- Issue date Jul 25, 2000
- National Semiconductor Corporation
- Douglas L. Peltzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CVD apparatus
- Patent number 6,013,338
- Issue date Jan 11, 2000
- Semiconductor Energy Laboratory Co., Ltd.
- Takashi Inushima
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor integrated circuit using monolayer epitaxial growth
- Patent number 5,905,297
- Issue date May 18, 1999
- Fujitsu Limited
- Toshihiko Mori
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Fabrication method for horizontal direction semiconductor PN juncti...
- Patent number 5,882,950
- Issue date Mar 16, 1999
- Korea Institute of Science and Technology
- Suk-Ki Min
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mesa isolation Refill Process for Silicon on Insulator Technology U...
- Patent number 5,882,981
- Issue date Mar 16, 1999
- Texas Instruments Incorporated
- Rajan Rajgopal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor IC device fabricating method
- Patent number 5,837,423
- Issue date Nov 17, 1998
- Hitachi, Ltd.
- Yoshihiko Okamoto
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for fabricating compound semiconductor laser
- Patent number 5,789,273
- Issue date Aug 4, 1998
- Sony Corporation
- Tadashi Yamamoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure with an integrated low density dielectric
- Patent number 5,747,880
- Issue date May 5, 1998
- Texas Instruments Incorporated
- Robert H. Havemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a high voltage planar edge termination structure
- Patent number 5,714,396
- Issue date Feb 3, 1998
- Motorola, Inc.
- Stephen Robb
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming semiconductor integrated circuit using monolayer...
- Patent number 5,705,408
- Issue date Jan 6, 1998
- Fujitsu Limited
- Toshihiko Mori
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for making semiconductor device having field limiting ring
- Patent number 5,672,528
- Issue date Sep 30, 1997
- Delco Electronics Corporation
- Donald Ray Disney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor IC device fabricating method
- Patent number 5,641,715
- Issue date Jun 24, 1997
- Hitachi, Ltd.
- Yoshihiko Okamoto
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of etching a pattern on a substrate using a scanning probe m...
- Patent number 5,618,760
- Issue date Apr 8, 1997
- The Board of Trustees of the Leland Stanford, Jr. University
- Hyongsok Soh
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of producing sheets of crystalline material and devices made...
- Patent number 5,549,747
- Issue date Aug 27, 1996
- Massachusetts Institute of Technology
- Carl O. Bozler
- C30 - CRYSTAL GROWTH
Information Patent Grant
Semiconductor device having field limiting ring and a process therefor
- Patent number 5,545,915
- Issue date Aug 13, 1996
- Delco Electronics Corporation
- Donald R. Disney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for lowering the phase transformation temperature of a metal...
- Patent number 5,510,295
- Issue date Apr 23, 1996
- International Business Machines Corporation
- Cyril Cabral
- C30 - CRYSTAL GROWTH
Information Patent Grant
Method of making an interconnect structure with an integrated low d...
- Patent number 5,488,015
- Issue date Jan 30, 1996
- Texas Instruments Incorporated
- Robert H. Havemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High voltage planar edge termination structure and method of making...
- Patent number 5,486,718
- Issue date Jan 23, 1996
- Motorola, Inc.
- Stephen Robb
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating metallized substrates using an organic etch b...
- Patent number 5,474,956
- Issue date Dec 12, 1995
- Hughes Aircraft Company
- Philip A. Trask
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method of manufacturing a semiconductor element
- Patent number 5,462,886
- Issue date Oct 31, 1995
- Fuji Xerox Co., Ltd.
- Yoshihiko Sakai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a multilayer epitaxial structure
- Patent number 5,432,121
- Issue date Jul 11, 1995
- G. I. Corporation
- Joseph Chan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CVD apparatus
- Publication number 20030140941
- Publication date Jul 31, 2003
- Semiconductor Energy Laboratory Co., Ltd.
- Takashi Inushima
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Silicon wafers for CMOS and other integrated circuits
- Publication number 20020142566
- Publication date Oct 3, 2002
- Intel Corporation
- Kramadhati V. Ravi
- C30 - CRYSTAL GROWTH

Dopants, special

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Microstructure processing method and microstructure processing appa...

Atomic layer etching of tungsten and other metals

Bottom processing

Method for fabricating semiconductor device

Silicon wafers for CMOS and other integrated circuits

CVD apparatus

Silicon wafers for CMOS and other integrated circuits

Insulation layer structure and method for making the same

Method for manufacturing a polysilicon TFT with a variable thicknes...

Method of fabricating integrated circuits with oxidized isolation

CVD apparatus

Semiconductor integrated circuit using monolayer epitaxial growth

Fabrication method for horizontal direction semiconductor PN juncti...

Mesa isolation Refill Process for Silicon on Insulator Technology U...

Semiconductor IC device fabricating method

Method for fabricating compound semiconductor laser

Interconnect structure with an integrated low density dielectric

Method of making a high voltage planar edge termination structure

Method for forming semiconductor integrated circuit using monolayer...

Method for making semiconductor device having field limiting ring

Semiconductor IC device fabricating method

Method of etching a pattern on a substrate using a scanning probe m...

Method of producing sheets of crystalline material and devices made...

Semiconductor device having field limiting ring and a process therefor

Method for lowering the phase transformation temperature of a metal...

Method of making an interconnect structure with an integrated low d...

High voltage planar edge termination structure and method of making...

Method of fabricating metallized substrates using an organic etch b...

Method of manufacturing a semiconductor element

Method for fabricating a multilayer epitaxial structure

Patents Applicationslast 30 patents

CVD apparatus

Silicon wafers for CMOS and other integrated circuits