Equalization of bit lines

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CPC
G11C2207/12

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GPHYSICS G11Information storage G11CSTATIC STORES G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C2207/12Equalization of bit lines

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Patents Grantslast 30 patents

Information Patent Grant
Signal generator for controlling timing of signal in memory device
- Patent number 12,211,586
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line pre-charge circuit for power management modes in multi ban...
- Patent number 11,935,589
- Issue date Mar 19, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal generator for controlling timing of signal in memory device
- Patent number 11,923,041
- Issue date Mar 5, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including multiple memory chips and data signal lines...
- Patent number 11,810,638
- Issue date Nov 7, 2023
- Samsung Electronics Co., Ltd.
- Seonkyoo Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data receiving circuit with latch and equalizer
- Patent number 11,798,602
- Issue date Oct 24, 2023
- NANYA TECHNOLOGY CORPORATION
- Wu-Der Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line pre-charge circuit for power management modes in multi ban...
- Patent number 11,626,158
- Issue date Apr 11, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
3D memory with 3D sense amplifier
- Patent number 11,600,309
- Issue date Mar 7, 2023
- BESANG, INC.
- Sang-Yun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and signal generator for controlling timing of signal in mem...
- Patent number 11,398,261
- Issue date Jul 26, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-charge circuit of SRAM controller and pre charging method thereof
- Patent number 10,937,489
- Issue date Mar 2, 2021
- Novatek Microelectronics Corp.
- Pin-Han Su
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuits precharging memory cell arrays and memory devices i...
- Patent number 10,726,886
- Issue date Jul 28, 2020
- Samsung Electronics Co., Ltd.
- Jin-Yong Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory unit
- Patent number 10,586,589
- Issue date Mar 10, 2020
- SURECORE LIMITED
- Andrew Pickering
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for multi-level setback read for three dimensi...
- Patent number 10,438,659
- Issue date Oct 8, 2019
- Intel Corporation
- Balaji Srinivasan
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for reading a memory cell of a non-volatile memo...
- Patent number 10,249,373
- Issue date Apr 2, 2019
- STMicroelectronics S.r.l.
- Giovanni Campardo
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device including variable resistance element
- Patent number 10,032,509
- Issue date Jul 24, 2018
- TOSHIBA MEMORY CORPORATION
- Ryu Ogiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line equalizer
- Patent number 9,842,632
- Issue date Dec 12, 2017
- SK hynix Inc.
- Duk Su Chun
- G11 - INFORMATION STORAGE
Information Patent Grant
Two transistor ternary random access memory
- Patent number 9,704,555
- Issue date Jul 11, 2017
- Rangel, Tsaoussis and Technologies LLC
- Simon Peter Tsaoussis
- G11 - INFORMATION STORAGE
Information Patent Grant
Data sensing circuit of semiconductor apparatus
- Patent number 9,324,395
- Issue date Apr 26, 2016
- SK hynix Inc.
- One Gyun Na
- G11 - INFORMATION STORAGE
Information Patent Grant
Two transistor ternary random access memory
- Patent number 9,269,422
- Issue date Feb 23, 2016
- Simon Peter Tsaoussis
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line pre-settlement circuit and method for flash memory sensing...
- Patent number 7,342,832
- Issue date Mar 11, 2008
- Actel Corporation
- Poongyeub Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
RAM store and control method therefor
- Patent number 7,110,310
- Issue date Sep 19, 2006
- Infineon Technologies AG
- Manfred Proell
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier
- Patent number 6,961,274
- Issue date Nov 1, 2005
- Hynix Semiconductor Inc.
- Jong Bae Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for accelerating signal equalization between a...
- Patent number 6,785,176
- Issue date Aug 31, 2004
- Mosaid Technologies Incorporated
- Paul Demone
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory array with equalized bit line potentials
- Patent number 6,532,176
- Issue date Mar 11, 2003
- Tower Semiconductor Ltd.
- Alexander Kushnarenko
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with sense amplifier block
- Patent number 6,347,057
- Issue date Feb 12, 2002
- Oki Electric Industry Co., Ltd.
- Katsuaki Matsui
- G11 - INFORMATION STORAGE
Information Patent Grant
Technique for reducing peak current in memory operation
- Patent number 6,075,733
- Issue date Jun 13, 2000
- LSI Logic Corporation
- Jeff S. Brown
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed static random access memory
- Patent number 6,075,729
- Issue date Jun 13, 2000
- Hitachi, Ltd.
- Kenichi Ohhata
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having a precharge device
- Patent number 6,049,493
- Issue date Apr 11, 2000
- Fujitsu Limited
- Ayako Kitamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-bank integrated circuit memory devices having cross-coupled i...
- Patent number 6,028,797
- Issue date Feb 22, 2000
- Samsung Electronics Co., Ltd.
- Gwang-young Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory devices having improved precharge and I/O...
- Patent number 6,026,035
- Issue date Feb 15, 2000
- Samsung Electronics Co., Ltd.
- Gyu-Hong Kim
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Bit Line Pre-Charge Circuit for Power Management Modes in Multi Ban...
- Publication number 20240242762
- Publication date Jul 18, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE
- Publication number 20240161798
- Publication date May 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE
- Publication number 20240021225
- Publication date Jan 18, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
DATA RECEIVING CIRCUIT WITH LATCH AND EQUALIZER
- Publication number 20230368822
- Publication date Nov 16, 2023
- NANYA TECHNOLOGY CORPORATION
- Wu-Der Yang
- G11 - INFORMATION STORAGE
Information Patent Application
PRECHARGE CIRCUITRY FOR MEMORY
- Publication number 20230154506
- Publication date May 18, 2023
- XENERGIC AB
- Adam Makosiej
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE
- Publication number 20220335992
- Publication date Oct 20, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
3D Memory with 3D Sense Amplifier
- Publication number 20220189515
- Publication date Jun 16, 2022
- BeSang, Inc.
- Sang-Yun Lee
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEM...
- Publication number 20220165315
- Publication date May 26, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
Bit Line Pre-Charge Circuit for Power Management Modes in Multi Ban...
- Publication number 20220130455
- Publication date Apr 28, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING MULTIPLE MEMORY CHIPS AND DATA SIGNAL LINES...
- Publication number 20220101894
- Publication date Mar 31, 2022
- Samsung Electronics Co., Ltd.
- Seonkyoo Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUITS PRECHARGING MEMORY CELL ARRAYS AND MEMORY DEVICES I...
- Publication number 20190147925
- Publication date May 16, 2019
- Samsung Electronics Co., Ltd.
- JIN-YONG CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR MULTI-LEVEL SETBACK READ FOR THREE DIMENSI...
- Publication number 20190013071
- Publication date Jan 10, 2019
- Intel Corporation
- Balaji Srinivasan
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE PRE-SETTLEMENT CIRCUIT AND METHOD FOR FLASH MEMORY SENSING...
- Publication number 20080144393
- Publication date Jun 19, 2008
- Actel Corporation
- Poongyeub Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Bit line pre-settlement circuit and method for flash memory sensing...
- Publication number 20070109157
- Publication date May 17, 2007
- Actel Corporation, a California Corporation
- Poongyueb Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for accelerating signal equalization between a...
- Publication number 20040264272
- Publication date Dec 30, 2004
- Paul Demone
- G11 - INFORMATION STORAGE
Information Patent Application
RAM store and control method therefor
- Publication number 20040233747
- Publication date Nov 25, 2004
- Manfred Proell
- G11 - INFORMATION STORAGE
Information Patent Application
Sense amplifier
- Publication number 20040004868
- Publication date Jan 8, 2004
- Jong Bae Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for accelerating signal equalization between a...
- Publication number 20030142567
- Publication date Jul 31, 2003
- Paul Demone
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ARRAY WITH EQUALIZED BIT LINE POTENTIALS
- Publication number 20030058690
- Publication date Mar 27, 2003
- Tower Semiconductor Ltd.
- Alexander Kushnarenko
- G11 - INFORMATION STORAGE

Equalization of bit lines

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Signal generator for controlling timing of signal in memory device

Bit line pre-charge circuit for power management modes in multi ban...

Signal generator for controlling timing of signal in memory device

Memory device including multiple memory chips and data signal lines...

Data receiving circuit with latch and equalizer

Bit line pre-charge circuit for power management modes in multi ban...

3D memory with 3D sense amplifier

Method and signal generator for controlling timing of signal in mem...

Pre-charge circuit of SRAM controller and pre charging method thereof

Memory circuits precharging memory cell arrays and memory devices i...

Memory unit

Method and apparatus for multi-level setback read for three dimensi...

Circuit and method for reading a memory cell of a non-volatile memo...

Semiconductor memory device including variable resistance element

Bit line equalizer

Two transistor ternary random access memory

Data sensing circuit of semiconductor apparatus

Two transistor ternary random access memory

Bit line pre-settlement circuit and method for flash memory sensing...

RAM store and control method therefor

Sense amplifier

Method and apparatus for accelerating signal equalization between a...

Non-volatile memory array with equalized bit line potentials

Semiconductor memory device with sense amplifier block

Technique for reducing peak current in memory operation

High-speed static random access memory

Semiconductor memory device having a precharge device

Multi-bank integrated circuit memory devices having cross-coupled i...

Integrated circuit memory devices having improved precharge and I/O...

Patents Applicationslast 30 patents

Bit Line Pre-Charge Circuit for Power Management Modes in Multi Ban...

SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE

SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE

DATA RECEIVING CIRCUIT WITH LATCH AND EQUALIZER

PRECHARGE CIRCUITRY FOR MEMORY

SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE

3D Memory with 3D Sense Amplifier

METHOD AND SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEM...

Bit Line Pre-Charge Circuit for Power Management Modes in Multi Ban...

MEMORY DEVICE INCLUDING MULTIPLE MEMORY CHIPS AND DATA SIGNAL LINES...

MEMORY CIRCUITS PRECHARGING MEMORY CELL ARRAYS AND MEMORY DEVICES I...

METHOD AND APPARATUS FOR MULTI-LEVEL SETBACK READ FOR THREE DIMENSI...

BIT LINE PRE-SETTLEMENT CIRCUIT AND METHOD FOR FLASH MEMORY SENSING...

Bit line pre-settlement circuit and method for flash memory sensing...

Method and apparatus for accelerating signal equalization between a...

RAM store and control method therefor

Sense amplifier

Method and apparatus for accelerating signal equalization between a...

NON-VOLATILE MEMORY ARRAY WITH EQUALIZED BIT LINE POTENTIALS