for access to memory bus

Industry

CPC
G06F13/16

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Current Industry

G06F13/16for access to memory bus

Industries

Patents Grantslast 30 patents

Information Patent Grant
Method for configuring multiple input-output channels
- Patent number 12,190,987
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page-based remote memory access using system memory interface netwo...
- Patent number 12,192,023
- Issue date Jan 7, 2025
- Intel Corporation
- Sujoy Sen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extended memory architecture
- Patent number 12,189,524
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Vijay S. Ramesh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus-based communication system, system-on-chip and method therefor
- Patent number 12,189,557
- Issue date Jan 7, 2025
- Black Sesame Technologies Inc.
- Bangjian Ouyang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register clock driver loaded memory subsystem
- Patent number 12,189,996
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmitting a response with a request and state information about...
- Patent number 12,189,544
- Issue date Jan 7, 2025
- SiFive, Inc.
- Michael Klinglesmith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and methods for handling consistent memory transa...
- Patent number 12,189,545
- Issue date Jan 7, 2025
- Intel Corporation
- Karthik Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monolithic serial NOR flash with wide input-output bus
- Patent number 12,189,547
- Issue date Jan 7, 2025
- Integrated Silicon Solution, (Cayman) Inc.
- SungJin Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Retry regulator for transactions of an integrated circuit
- Patent number 12,189,563
- Issue date Jan 7, 2025
- Amazon Technologies, Inc.
- Moshe Raz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared memory
- Patent number 12,192,024
- Issue date Jan 7, 2025
- Intel Corporation
- Bassam N. Coury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer IC with asymmetric memory module interfaces
- Patent number 12,189,548
- Issue date Jan 7, 2025
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for outputting internal state of memory apparatus and mem...
- Patent number 12,189,976
- Issue date Jan 7, 2025
- Samsung Electronics Co., Ltd.
- Seong-hoon Woo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully pipelined read-modify-write support
- Patent number 12,189,540
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous communication protocol compatible with synchronous DDR...
- Patent number 12,189,546
- Issue date Jan 7, 2025
- Samsung Electronics Co., Ltd.
- Dimin Niu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of operating memory devices based on sub-block positions an...
- Patent number 12,190,963
- Issue date Jan 7, 2025
- Samsung Electronics Co., Ltd.
- Se-Hwan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for dynamically managing resources in disaggregated ac...
- Patent number 12,191,987
- Issue date Jan 7, 2025
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory and an operating method thereof, a memory system
- Patent number 12,182,039
- Issue date Dec 31, 2024
- Yangtze Memory Technologies Co., Ltd.
- Wenjie Mu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 12,182,045
- Issue date Dec 31, 2024
- Renesas Electronics Corporation
- Kazuaki Terashima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash registry with on-disk hashing
- Patent number 12,182,453
- Issue date Dec 31, 2024
- Weka.IO Ltd.
- Maor Ben Dayan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 12,182,038
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-chip module (MCM) with scalable high bandwidth memory
- Patent number 12,182,040
- Issue date Dec 31, 2024
- Eliyan Corporation
- Ramin Farjadrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing platform with heterogenous quantum processors
- Patent number 12,182,661
- Issue date Dec 31, 2024
- Rigetti & Co, LLC
- Chad Tyler Rigetti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data burst suspend mode using pause detection
- Patent number 12,182,046
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Eric N. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual network pre-arbitration for deadlock avoidance and enhanced...
- Patent number 12,182,398
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application processors and electronic devices including the same
- Patent number 12,183,388
- Issue date Dec 31, 2024
- Samsung Electronics Co., Ltd.
- Kyumin Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for peripheral utilization metrics collection and reporting
- Patent number 12,181,974
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Veeramanikandan Raju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to autonomously manage SSDs in an array
- Patent number 12,174,762
- Issue date Dec 24, 2024
- Samsung Electronics Co., Ltd.
- Oscar P. Pinto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable memory timing
- Patent number 12,176,061
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Kernel mapping to nodes in compute fabric
- Patent number 12,174,760
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Gongyu Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing system and corresponding method of operation
- Patent number 12,174,973
- Issue date Dec 24, 2024
- STMicroelectronics S.r.l.
- Rosalino Critelli
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ALLOCATING CORES TO EMPTY PROGRAMMING ENGINES USING A MEMORY ACCESS...
- Publication number 20250013501
- Publication date Jan 9, 2025
- Metis XCO., Ltd.
- Ji Hun Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCE SHARED STATE SUPPRESSION
- Publication number 20250013569
- Publication date Jan 9, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Validation
- Publication number 20250013586
- Publication date Jan 9, 2025
- WAYMO LLC
- Sabareeshkumar Ravikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH DEFERRED EXCEPTION REPORTING
- Publication number 20250013518
- Publication date Jan 9, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Writing Method and Processing System
- Publication number 20250013535
- Publication date Jan 9, 2025
- Huawei Technologies Co., Ltd
- Zhiyong Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE AND COMMUNICATION SYSTEM
- Publication number 20250016023
- Publication date Jan 9, 2025
- Rohm Co., Ltd.
- Kei Nagao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA MANAGEMENT SYSTEM AND METHOD OF CONTROLLING
- Publication number 20250013381
- Publication date Jan 9, 2025
- Samsung Electronics Co., Ltd.
- Vinod Kumar DAGA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGED NAND FLASH MEMORY REGION CONTROL AGAINST ENDURANCE HACKING
- Publication number 20250013583
- Publication date Jan 9, 2025
- Lodestar Licensing Group LLC
- Gil Golov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR INTERFACING A FIRST DATA READING/ WRITING UNIT WITH A SE...
- Publication number 20250013584
- Publication date Jan 9, 2025
- ERAM S.R.L.
- Pietro CARRA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND SCHEDULING COMPONENT FOR MEMORY
- Publication number 20250014628
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Patrick A. La Fratta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING WHICH MEMORY SOURCE IS UTILIZED FOR FETCHING INSTRUCTIO...
- Publication number 20250013469
- Publication date Jan 9, 2025
- MICROCHIP TECHNOLOGY INCORPORATED
- Ivar Holand
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NODE IDENTIFICATION ALLOCATION IN A MULTI-TILE SYSTEM WITH MULTIPLE...
- Publication number 20250013585
- Publication date Jan 9, 2025
- MELLANOX TECHNOLOGIES, LTD.
- Rui Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP INTERCONNECT FOR MEMORY CHANNEL CONTROLLERS
- Publication number 20250004956
- Publication date Jan 2, 2025
- Google LLC
- Rahul Nagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable Input/Output Dies for Specialization in Disaggregated...
- Publication number 20250004955
- Publication date Jan 2, 2025
- ADVANCED MICRO DEVICES, INC.
- Anthony Thomas Gutierrez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PROTOCOL
- Publication number 20250004669
- Publication date Jan 2, 2025
- Lodestar Licensing Group LLC
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA BURST SUSPEND MODE USING MULTI-LEVEL SIGNALING
- Publication number 20250004962
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Eric N. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...
- Publication number 20250006251
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REFERENCING MEMORY USING PORTIONS OF A SPLIT LOGICAL BLOCK ADDRESS
- Publication number 20240427699
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP HEAT TREATMENT SYSTEM
- Publication number 20240428875
- Publication date Dec 26, 2024
- KIOXIA Corporation
- Tomoya SANUKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Alarms with Priorities in a Storage Network
- Publication number 20240427712
- Publication date Dec 26, 2024
- PURE STORAGE, INC.
- Greg R. Dhuse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK DEVICE-BASED DATA PROCESSING METHOD AND NETWORK DEVICE
- Publication number 20240427598
- Publication date Dec 26, 2024
- Huawei Technologies Co., Ltd
- Bojie LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING METHOD, COMPUTER DEVICE, AND READABLE STORAGE MEDIUM
- Publication number 20240427711
- Publication date Dec 26, 2024
- SHENZHEN HANGSHUN CHIP TECHNOLOGY DEVELOPMENT CO., LTD
- Jiping LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Secure stacking of memory dies
- Publication number 20240427897
- Publication date Dec 26, 2024
- WINBOND ELECTRONICS CORPORATION
- Itay Admon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA RECEIVER DESIGN IN DDR MEMORY INTERFACES
- Publication number 20240428860
- Publication date Dec 26, 2024
- Western Digital Technologies, Inc.
- MOHAMMAD REZA MAHMOODI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE APPARATUS AND CONTROL METHOD FOR STORAGE APPARATUS
- Publication number 20240427713
- Publication date Dec 26, 2024
- Hitachi, Ltd
- Norio CHUJO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTICAL MEMORY MODULE AND OPTICAL COMPUTING SYSTEM INCLUDING THE SAME
- Publication number 20240427715
- Publication date Dec 26, 2024
- Samsung Electronics Co., Ltd.
- JOONHO JUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUS TO ENABLE DATA AGGREGATION AND ADAP...
- Publication number 20240427716
- Publication date Dec 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Niraj Nandan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tracing for High Bandwidth Masters in SoC
- Publication number 20240427717
- Publication date Dec 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Mihir Narendra MODY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPLICATION PROGRAMMING INTERFACE TO CAUSE INFORMATION TO BE READ F...
- Publication number 20240427696
- Publication date Dec 26, 2024
- NVIDIA Corporation
- Fnu Vishnuswaroop Ramesh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR REDUCING LATENCIES ASSOCIATED WITH LINK S...
- Publication number 20240427709
- Publication date Dec 26, 2024
- QUALCOMM Incorporated
- Santhosh Reddy AKAVARAM
- G06 - COMPUTING CALCULATING COUNTING

for access to memory bus

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method for configuring multiple input-output channels

Page-based remote memory access using system memory interface netwo...

Extended memory architecture

Bus-based communication system, system-on-chip and method therefor

Multiple register clock driver loaded memory subsystem

Transmitting a response with a request and state information about...

System, apparatus and methods for handling consistent memory transa...

Monolithic serial NOR flash with wide input-output bus

Retry regulator for transactions of an integrated circuit

Shared memory

Buffer IC with asymmetric memory module interfaces

Apparatus for outputting internal state of memory apparatus and mem...

Fully pipelined read-modify-write support

Asynchronous communication protocol compatible with synchronous DDR...

Methods of operating memory devices based on sub-block positions an...

Technologies for dynamically managing resources in disaggregated ac...

Memory and an operating method thereof, a memory system

Semiconductor device

Flash registry with on-disk hashing

Methods and apparatus for allocation in a victim cache system

Multi-chip module (MCM) with scalable high bandwidth memory

Computing platform with heterogenous quantum processors

Data burst suspend mode using pause detection

Virtual network pre-arbitration for deadlock avoidance and enhanced...

Application processors and electronic devices including the same

Techniques for peripheral utilization metrics collection and reporting

Mechanism to autonomously manage SSDs in an array

Programmable memory timing

Kernel mapping to nodes in compute fabric

Processing system and corresponding method of operation

Patents Applicationslast 30 patents

ALLOCATING CORES TO EMPTY PROGRAMMING ENGINES USING A MEMORY ACCESS...

CACHE COHERENCE SHARED STATE SUPPRESSION

Memory Validation

STREAMING ENGINE WITH DEFERRED EXCEPTION REPORTING

Data Writing Method and Processing System

SEMICONDUCTOR DEVICE AND COMMUNICATION SYSTEM

DATA MANAGEMENT SYSTEM AND METHOD OF CONTROLLING

MANAGED NAND FLASH MEMORY REGION CONTROL AGAINST ENDURANCE HACKING

METHOD FOR INTERFACING A FIRST DATA READING/ WRITING UNIT WITH A SE...

COMMAND SCHEDULING COMPONENT FOR MEMORY

CONTROLLING WHICH MEMORY SOURCE IS UTILIZED FOR FETCHING INSTRUCTIO...

NODE IDENTIFICATION ALLOCATION IN A MULTI-TILE SYSTEM WITH MULTIPLE...

ON-CHIP INTERCONNECT FOR MEMORY CHANNEL CONTROLLERS

Programmable Input/Output Dies for Specialization in Disaggregated...

MEMORY PROTOCOL

DATA BURST SUSPEND MODE USING MULTI-LEVEL SIGNALING

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...

REFERENCING MEMORY USING PORTIONS OF A SPLIT LOGICAL BLOCK ADDRESS

CHIP HEAT TREATMENT SYSTEM

Alarms with Priorities in a Storage Network

NETWORK DEVICE-BASED DATA PROCESSING METHOD AND NETWORK DEVICE

DATA PROCESSING METHOD, COMPUTER DEVICE, AND READABLE STORAGE MEDIUM

Secure stacking of memory dies

DATA RECEIVER DESIGN IN DDR MEMORY INTERFACES

STORAGE APPARATUS AND CONTROL METHOD FOR STORAGE APPARATUS

OPTICAL MEMORY MODULE AND OPTICAL COMPUTING SYSTEM INCLUDING THE SAME

SYSTEMS, METHODS, AND APPARATUS TO ENABLE DATA AGGREGATION AND ADAP...

Tracing for High Bandwidth Masters in SoC

APPLICATION PROGRAMMING INTERFACE TO CAUSE INFORMATION TO BE READ F...

APPARATUS AND METHODS FOR REDUCING LATENCIES ASSOCIATED WITH LINK S...