for memories with random access ports synchronised on clock signal pulse trains

Industry

CPC
G11C7/1072

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/1072for memories with random access ports synchronised on clock signal pulse trains

Industries

Patents Grantslast 30 patents

Information Patent Grant
Signal processing circuit, chip and electronic device
- Patent number 11,972,838
- Issue date Apr 30, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zequn Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and operating method of the memory system
- Patent number 11,972,839
- Issue date Apr 30, 2024
- SK Hynix Inc.
- Chang Kyun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device delaying mode control signals
- Patent number 11,967,398
- Issue date Apr 23, 2024
- SK hynix Inc.
- Haeng Seon Chae
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller with looped-back calibration data receiver
- Patent number 11,960,344
- Issue date Apr 16, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with multiple striping of RAID groups and method for...
- Patent number 11,960,743
- Issue date Apr 16, 2024
- Innovations In Memory LLC
- Jon C. R. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory systems with on-die data buffering
- Patent number 11,960,418
- Issue date Apr 16, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command-triggered data clock distribution mode
- Patent number 11,955,161
- Issue date Apr 9, 2024
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device including internal transmission path and stack...
- Patent number 11,942,181
- Issue date Mar 26, 2024
- SK Hynix Inc.
- Jinhyung Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatuses for addressing memory caches
- Patent number 11,921,642
- Issue date Mar 5, 2024
- RAMBUS INC.
- Trung Diep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-based distributed processor architecture
- Patent number 11,914,487
- Issue date Feb 27, 2024
- NeuroBlade Ltd.
- Elad Sity
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and operating method of the memory system
- Patent number 11,915,790
- Issue date Feb 27, 2024
- SK Hynix Inc.
- Chang Kyun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component for deployment in a dynamic stripe width memory sy...
- Patent number 11,862,236
- Issue date Jan 2, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for dynamically managing resources in disaggregated ac...
- Patent number 11,855,766
- Issue date Dec 26, 2023
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectable trim settings on a memory device
- Patent number 11,854,634
- Issue date Dec 26, 2023
- Micron Technology, Inc.
- Aswin Thiruvengadam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory buffer with data scrambling and error correction
- Patent number 11,854,658
- Issue date Dec 26, 2023
- RAMBUS INC.
- Christopher Haywood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to verify and authenticate resources in a data center co...
- Patent number 11,838,113
- Issue date Dec 5, 2023
- Intel Corporation
- Alberto J. Munoz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock locking for packet based communications of memory devices
- Patent number 11,837,318
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- James Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and method of controlling a memory chip
- Patent number 11,830,576
- Issue date Nov 28, 2023
- Kioxia Corporation
- Shinya Koizumi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with staggered request signal output
- Patent number 11,830,573
- Issue date Nov 28, 2023
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for encoding and decoding of signal lines f...
- Patent number 11,809,715
- Issue date Nov 7, 2023
- Timothy Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to provide cache move with non-volatile mass m...
- Patent number 11,797,180
- Issue date Oct 24, 2023
- Memory Technologies LLC
- Kimmo J. Mylly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Refresh operation in multi-die memory
- Patent number 11,783,882
- Issue date Oct 10, 2023
- Matthew A. Prather
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal receiver with skew-tolerant strobe gating
- Patent number 11,763,865
- Issue date Sep 19, 2023
- RAMBUS INC.
- Andrew Fuller
- G11 - INFORMATION STORAGE
Information Patent Grant
Proactive read disturb mitigation
- Patent number 11,735,274
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Saeed Sharifi Tehrani
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controllers, systems, and methods supporting multiple reques...
- Patent number 11,727,966
- Issue date Aug 15, 2023
- RAMBUS INC.
- Richard E. Perego
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared multi-port memory from single port
- Patent number 11,721,373
- Issue date Aug 8, 2023
- Xilinx, Inc.
- Richard Lewis Walke
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 11,715,504
- Issue date Aug 1, 2023
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Double data rate (DDR) memory controller apparatus and method
- Patent number 11,710,516
- Issue date Jul 25, 2023
- Uniquify, Inc.
- Mahesh Gopalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die for a printhead
- Patent number 11,701,880
- Issue date Jul 18, 2023
- Hewlett-Packard Development Company, L.P.
- Scott A. Linn
- G11 - INFORMATION STORAGE
Information Patent Grant
Banked memory architecture for multiple parallel datapath channels...
- Patent number 11,704,251
- Issue date Jul 18, 2023
- Microsoft Technology Licensing, LLC
- Stephen Sangho Youn
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Apparatus and Method to Provide Cache Move with Non-Volatile Mass M...
- Publication number 20240152274
- Publication date May 9, 2024
- Memory Technologies LLC
- Kimmo J. Mylly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE PROCESSOR FOR LOW-WAY AND HIGH-LATENCY MEMORY INST...
- Publication number 20240143457
- Publication date May 2, 2024
- NeuroBlade Ltd.
- Elad SITY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR DYNAMICALLY MANAGING RESOURCES IN DISAGGREGATED AC...
- Publication number 20240113954
- Publication date Apr 4, 2024
- Intel Corporation
- Francesc GUIM BERNAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DOUBLE DATA RATE (DDR) MEMORY CONTROLLER APPARATUS AND METHOD
- Publication number 20240112721
- Publication date Apr 4, 2024
- Uniquify, Inc.
- Mahesh GOPALAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP
- Publication number 20240046971
- Publication date Feb 8, 2024
- KIOXIA Corporation
- Shinya KOIZUMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory controllers, systems, and methods supporting multiple reques...
- Publication number 20230420010
- Publication date Dec 28, 2023
- Rambus Inc.
- Richard E. Perego
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low-Pincount High-Bandwidth Memory And Memory Bus
- Publication number 20230385224
- Publication date Nov 30, 2023
- ETRON TECHNOLOGY, INC.
- Richard Dewitt Crisp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE HAVING VOLATILE AND NON-VOLATILE MEMORY SUBSYSTEMS AN...
- Publication number 20230385192
- Publication date Nov 30, 2023
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER WITH SKEW COMPENSATED DATA TRANSMIT TIMING
- Publication number 20230335177
- Publication date Oct 19, 2023
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES HAVING SPECIAL MODE ACCESS
- Publication number 20230335166
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Theodore T. Pekny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20230326513
- Publication date Oct 12, 2023
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20230317128
- Publication date Oct 5, 2023
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
BANKED MEMORY ARCHITECTURE FOR MULTIPLE PARALLEL DATAPATH CHANNELS...
- Publication number 20230305967
- Publication date Sep 28, 2023
- Microsoft Technology Licensing, LLC
- Stephen Sangho YOUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE FOR A PRINTHEAD
- Publication number 20230302790
- Publication date Sep 28, 2023
- Hewlett-Packard Development Company, L.P.
- Scott A. LINN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20230290394
- Publication date Sep 14, 2023
- SK HYNIX INC.
- Haeng Seon CHAE
- G11 - INFORMATION STORAGE
Information Patent Application
OPTIMIZING POWER USAGE BY FACTORING PROCESSOR ARCHITECTURAL EVENTS...
- Publication number 20230251702
- Publication date Aug 10, 2023
- Tahoe Research, Ltd.
- Yen-Cheng LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACTIVATION FUNCTIONS FOR ARTIFICIAL INTELLIGENCE OPERATIONS
- Publication number 20230253020
- Publication date Aug 10, 2023
- Micron Technology, Inc.
- Alberto Troia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES
- Publication number 20230244293
- Publication date Aug 3, 2023
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR DATA MOVEMENT
- Publication number 20230236752
- Publication date Jul 27, 2023
- Micron Technology, Inc.
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM ON CHIP FOR REDUCING WAKE-UP TIME, METHOD OF OPERATING SAME,...
- Publication number 20230236654
- Publication date Jul 27, 2023
- Samsung Electronics Co., Ltd.
- Hee Dong SHIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO CONTROL SYSTEM UPDATES AND CONFIGURATION CHANGES VIA...
- Publication number 20230208731
- Publication date Jun 29, 2023
- Intel Corporation
- MURUGASAMY K. NACHIMUTHU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH REGION-SPECIFIC MEMORY ACCESS SCHEDULING
- Publication number 20230142598
- Publication date May 11, 2023
- ADVANCED MICRO DEVICES, INC.
- Yi XU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS, MEMORY DEVICE, AND METHOD FOR MULTI-PHASE CLOCK TRAINING
- Publication number 20230147016
- Publication date May 11, 2023
- Samsung Electronics Co., Ltd.
- Taegook KIM
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and Apparatuses for Addressing Memory Caches
- Publication number 20230142048
- Publication date May 11, 2023
- Rambus Inc.
- Trung Diep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC DEVICE TEST METHOD AND TEST DEVICE
- Publication number 20230132675
- Publication date May 4, 2023
- Realtek Semiconductor Corp.
- Han-Yun Tsai
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT FOR DUAL IN-LINE MEMORY TO SUPPORT 128-BYTE CACHE LINE PROCE...
- Publication number 20230132146
- Publication date Apr 27, 2023
- TACHYUM LTD.
- Radoslav DANILAK
- G11 - INFORMATION STORAGE
Information Patent Application
ALGORITHMIC TCAM BASED TERNARY LOOKUP
- Publication number 20230127391
- Publication date Apr 27, 2023
- Barefoot Networks, Inc.
- Patrick BOSSHART
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING
- Publication number 20230120661
- Publication date Apr 20, 2023
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APERTURE ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
- Publication number 20230109637
- Publication date Apr 6, 2023
- Intel Corporation
- Barry E. Huntley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR SWITCHING NETWORK TRAFFIC IN A DATA CENTER
- Publication number 20230098017
- Publication date Mar 30, 2023
- Intel Corporation
- Matthew Adiletta
- G06 - COMPUTING CALCULATING COUNTING

for memories with random access ports synchronised on clock signal pulse trains

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Signal processing circuit, chip and electronic device

Memory system and operating method of the memory system

Semiconductor device delaying mode control signals

Memory controller with looped-back calibration data receiver

Memory system with multiple striping of RAID groups and method for...

Semiconductor memory systems with on-die data buffering

Command-triggered data clock distribution mode

Semiconductor device including internal transmission path and stack...

Methods and apparatuses for addressing memory caches

Memory-based distributed processor architecture

Memory system and operating method of the memory system

Memory component for deployment in a dynamic stripe width memory sy...

Technologies for dynamically managing resources in disaggregated ac...

Selectable trim settings on a memory device

Memory buffer with data scrambling and error correction

Techniques to verify and authenticate resources in a data center co...

Clock locking for packet based communications of memory devices

Memory system and method of controlling a memory chip

Memory controller with staggered request signal output

Apparatuses and methods for encoding and decoding of signal lines f...

Apparatus and method to provide cache move with non-volatile mass m...

Refresh operation in multi-die memory

Signal receiver with skew-tolerant strobe gating

Proactive read disturb mitigation

Memory controllers, systems, and methods supporting multiple reques...

Shared multi-port memory from single port

Memory device for supporting command bus training mode and method o...

Double data rate (DDR) memory controller apparatus and method

Die for a printhead

Banked memory architecture for multiple parallel datapath channels...

Patents Applicationslast 30 patents

Apparatus and Method to Provide Cache Move with Non-Volatile Mass M...

HIGH PERFORMANCE PROCESSOR FOR LOW-WAY AND HIGH-LATENCY MEMORY INST...

TECHNOLOGIES FOR DYNAMICALLY MANAGING RESOURCES IN DISAGGREGATED AC...

DOUBLE DATA RATE (DDR) MEMORY CONTROLLER APPARATUS AND METHOD

MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP

Memory controllers, systems, and methods supporting multiple reques...

Low-Pincount High-Bandwidth Memory And Memory Bus

MEMORY MODULE HAVING VOLATILE AND NON-VOLATILE MEMORY SUBSYSTEMS AN...

MEMORY CONTROLLER WITH SKEW COMPENSATED DATA TRANSMIT TIMING

MEMORY DEVICES HAVING SPECIAL MODE ACCESS

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

BANKED MEMORY ARCHITECTURE FOR MULTIPLE PARALLEL DATAPATH CHANNELS...

DIE FOR A PRINTHEAD

SEMICONDUCTOR DEVICE

OPTIMIZING POWER USAGE BY FACTORING PROCESSOR ARCHITECTURAL EVENTS...

ACTIVATION FUNCTIONS FOR ARTIFICIAL INTELLIGENCE OPERATIONS

MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES

APPARATUSES AND METHODS FOR DATA MOVEMENT

SYSTEM ON CHIP FOR REDUCING WAKE-UP TIME, METHOD OF OPERATING SAME,...

TECHNIQUES TO CONTROL SYSTEM UPDATES AND CONFIGURATION CHANGES VIA...

MEMORY SYSTEM WITH REGION-SPECIFIC MEMORY ACCESS SCHEDULING

APPARATUS, MEMORY DEVICE, AND METHOD FOR MULTI-PHASE CLOCK TRAINING

Methods and Apparatuses for Addressing Memory Caches

ELECTRONIC DEVICE TEST METHOD AND TEST DEVICE

LAYOUT FOR DUAL IN-LINE MEMORY TO SUPPORT 128-BYTE CACHE LINE PROCE...

ALGORITHMIC TCAM BASED TERNARY LOOKUP

SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING

APERTURE ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS

TECHNOLOGIES FOR SWITCHING NETWORK TRAFFIC IN A DATA CENTER