Formatter

Industry

CPC
G01R31/31928

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Parent Industries

GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/31928Formatter

Industries

Patents Grantslast 30 patents

Information Patent Grant
Multiple-level driver circuit with non-commutating bridge
- Patent number 10,209,307
- Issue date Feb 19, 2019
- Analog Devices, Inc.
- Christopher C. McQuilkin
- G01 - MEASURING TESTING
Information Patent Grant
Automated test system with event detection capability
- Patent number 9,244,126
- Issue date Jan 26, 2016
- Teradyne, Inc.
- Ronald A. Sartschev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit testing module including signal shaping interface
- Patent number 9,116,210
- Issue date Aug 25, 2015
- Rambus Inc.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, apparatus, and system for enabling a deterministic interface
- Patent number 8,806,093
- Issue date Aug 12, 2014
- Intel Corporation
- Bibbin Chacko
- G01 - MEASURING TESTING
Information Patent Grant
Test apparatus for digital modulated signal
- Patent number 8,754,631
- Issue date Jun 17, 2014
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Sub-instruction repeats for algorithmic pattern generators
- Patent number 8,607,111
- Issue date Dec 10, 2013
- Micron Technology, Inc.
- Phillip Rasmussen
- G01 - MEASURING TESTING
Information Patent Grant
Programmable on-chip logic analyzer apparatus, systems, and methods
- Patent number 8,575,958
- Issue date Nov 5, 2013
- Micron Technology, Inc.
- Kirsten S. Lunzer
- G01 - MEASURING TESTING
Information Patent Grant
Probe card
- Patent number 8,542,027
- Issue date Sep 24, 2013
- MPI Corporation
- Young-Huang Chou
- G01 - MEASURING TESTING
Information Patent Grant
Test apparatus for digital modulated signal
- Patent number 8,456,170
- Issue date Jun 4, 2013
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus using a service to launch and/or monitor data...
- Patent number 8,397,173
- Issue date Mar 12, 2013
- Advantest (Singapore) Pte Ltd
- Reid Hayhow
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor test apparatus and test method
- Patent number 8,384,406
- Issue date Feb 26, 2013
- Advantest Corporation
- Daisuke Watanabe
- G01 - MEASURING TESTING
Information Patent Grant
Test apparatus, test method and manufacturing method
- Patent number 8,373,433
- Issue date Feb 12, 2013
- Advantest Corporation
- Nobuei Washizu
- G01 - MEASURING TESTING
Information Patent Grant
Multiply apparatus for semiconductor test pattern signal
- Patent number 8,340,940
- Issue date Dec 25, 2012
- International Trading & Technology Co., Ltd.
- Kyung-hun Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for testing and for diagnosing digital circuits
- Patent number 8,312,332
- Issue date Nov 13, 2012
- Infineon Technologies AG
- Andreas Leininger
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit testing module including signal shaping interface
- Patent number 8,286,046
- Issue date Oct 9, 2012
- Rambus Inc.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
High impedance, high parallelism, high temperature memory test syst...
- Patent number 8,269,515
- Issue date Sep 18, 2012
- Advantest (Singapore) Pte Ltd
- Romi O. Mayder
- G01 - MEASURING TESTING
Information Patent Grant
Test apparatus and manufacturing method
- Patent number 8,239,147
- Issue date Aug 7, 2012
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed fully differential resistor-based level formatter
- Patent number 8,228,108
- Issue date Jul 24, 2012
- Texas Instruments Incorporated
- Hector Torres
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit testing module configured for set-up and hold ti...
- Patent number 8,166,361
- Issue date Apr 24, 2012
- Rambus Inc.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Test apparatus, test method and manufacturing method
- Patent number 8,014,969
- Issue date Sep 6, 2011
- Advantest Corporation
- Hirokatsu Niijima
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing vernier using a delay locked loop
- Patent number 8,013,646
- Issue date Sep 6, 2011
- MOSAID Technologies Incorporated
- Bruce Millar
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit testing module including signal shaping interface
- Patent number 8,001,439
- Issue date Aug 16, 2011
- Rambus Inc.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast, low power formatter for automatic test system
- Patent number 7,987,063
- Issue date Jul 26, 2011
- Teradyne, Inc.
- David Coyne
- G01 - MEASURING TESTING
Information Patent Grant
Programmable on-chip logic analyzer apparatus, systems, and methods
- Patent number 7,944,234
- Issue date May 17, 2011
- Micron Technology, Inc.
- Kirsten S. Lunzer
- G01 - MEASURING TESTING
Information Patent Grant
Signal generating apparatus, test apparatus and circuit device
- Patent number 7,911,242
- Issue date Mar 22, 2011
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Waveform generator, waveform generating device, test apparatus, and...
- Patent number 7,885,776
- Issue date Feb 8, 2011
- Advantest Corporation
- Makoto Kurosawa
- G01 - MEASURING TESTING
Information Patent Grant
Timing vernier using a delay locked loop
- Patent number 7,863,954
- Issue date Jan 4, 2011
- MOSAID Technologies Incorporated
- Bruce Millar
- G01 - MEASURING TESTING
Information Patent Grant
Testing hardware components to detect hardware failures
- Patent number 7,853,850
- Issue date Dec 14, 2010
- Raytheon Company
- Michael J. Femal
- G01 - MEASURING TESTING
Information Patent Grant
Circuit verification apparatus, circuit verification method, and si...
- Patent number 7,797,653
- Issue date Sep 14, 2010
- NEC Corporation
- Kouhei Hosokawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing apparatus
- Patent number 7,795,879
- Issue date Sep 14, 2010
- Advantest Corporation
- Daisuke Watanabe
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
TESTING A CONTROL DEVICE USING A TEST ASSEMBLY
- Publication number 20240337695
- Publication date Oct 10, 2024
- dSPACE GmbH
- Remigiusz SEILER
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT TESTING MODULE INCLUDING SIGNAL SHAPING INTERFACE
- Publication number 20130066581
- Publication date Mar 14, 2013
- Adrian E. Ong
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT TESTING MODULE INCLUDING SIGNAL SHAPING INTERFACE
- Publication number 20110251819
- Publication date Oct 13, 2011
- RAMBUS INC.
- Adrian E. Ong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for enabling a deterministic interface
- Publication number 20110243211
- Publication date Oct 6, 2011
- Bibbing Chacko
- G01 - MEASURING TESTING
Information Patent Application
PROGRAMMABLE ON-CHIP LOGIC ANALYZER APPARATUS, SYSTEMS, AND METHODS
- Publication number 20110215833
- Publication date Sep 8, 2011
- Kirsten S. Lunzer
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR TEST APPARATUS AND TEST METHOD
- Publication number 20110187400
- Publication date Aug 4, 2011
- Advantest Corporation
- DAISUKE WATANABE
- G01 - MEASURING TESTING
Information Patent Application
High Speed Fully Differential Resistor-Based Level Formatter
- Publication number 20110095798
- Publication date Apr 28, 2011
- Hector Torres
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TIMING VERNIER USING A DELAY LOCKED LOOP
- Publication number 20110063006
- Publication date Mar 17, 2011
- MOSAID TECHNOLOGIES INCORPORATED
- Bruce Millar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TEST APPARATUS FOR DIGITAL MODULATED SIGNAL
- Publication number 20110057665
- Publication date Mar 10, 2011
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TEST APPARATUS FOR DIGITAL MODULATED SIGNAL
- Publication number 20110057642
- Publication date Mar 10, 2011
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH IMPEDANCE, HIGH PARALLELISM, HIGH TEMPERATURE MEMORY TEST SYST...
- Publication number 20100301885
- Publication date Dec 2, 2010
- Verigy (Singapore) Pte. Ltd.
- Romi O. Mayder
- G01 - MEASURING TESTING
Information Patent Application
MULTIPLY APPARATUS FOR SEMICONDUCTOR TEST PATTERN SIGNAL
- Publication number 20100262397
- Publication date Oct 14, 2010
- INTERNATIONAL TRADING & TECHNOLOGY CO., LTD.
- Kyung-hun Chang
- G01 - MEASURING TESTING
Information Patent Application
PROBE CARD
- Publication number 20100237886
- Publication date Sep 23, 2010
- MPI CORPORATION
- Young Huang Chou
- G01 - MEASURING TESTING
Information Patent Application
TEST APPARATUS, TEST METHOD AND MANUFACTURING METHOD
- Publication number 20100207640
- Publication date Aug 19, 2010
- Advantest Corporation
- Nobuei WASHIZU
- G01 - MEASURING TESTING
Information Patent Application
TIMING VERNIER USING A DELAY LOCKED LOOP
- Publication number 20100117698
- Publication date May 13, 2010
- MOSAID TECHNOLOGIES INCORPORATED
- Bruce Millar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIGNAL GENERATING APPARATUS, TEST APPARATUS AND CIRCUIT DEVICE
- Publication number 20100052736
- Publication date Mar 4, 2010
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TEST APPARATUS AND MANUFACTURING METHOD
- Publication number 20100049453
- Publication date Feb 25, 2010
- Advantest Corporation
- Daisuke Watanabe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PIN ELECTRONICS CIRCUIT, SEMICONDUCTOR DEVICE TEST EQUIPMENT AND SY...
- Publication number 20100030508
- Publication date Feb 4, 2010
- Kabushiki Kaisha Toshiba
- Tatsuhiro Gake
- G01 - MEASURING TESTING
Information Patent Application
FAST, LOW POWER FORMATTER FOR AUTOMATIC TEST SYSTEM
- Publication number 20090261872
- Publication date Oct 22, 2009
- Teradyne, Inc.
- David Coyne
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE ON-CHIP LOGIC ANALYZER APPARATUS, SYSTEMS, AND METHODS
- Publication number 20090237110
- Publication date Sep 24, 2009
- Micron Technology, Inc.
- Kirsten S. Lunzer
- G01 - MEASURING TESTING
Information Patent Application
TEST APPARATUS, TEST METHOD AND MANUFACTURING METHOD
- Publication number 20090240365
- Publication date Sep 24, 2009
- Advantest Corporation
- HIROKATSU NIIJIMA
- G01 - MEASURING TESTING
Information Patent Application
TEST APPARATUS, PROBE CARD, AND TEST METHOD
- Publication number 20090174420
- Publication date Jul 9, 2009
- Advantest Corporation
- YUJI ARIYAMA
- G01 - MEASURING TESTING
Information Patent Application
TEST APPARATUS
- Publication number 20090048796
- Publication date Feb 19, 2009
- Advantest Corporation
- KAZUHIRO YAMAMOTO
- G01 - MEASURING TESTING
Information Patent Application
WAVEFORM GENERATOR, WAVEFORM GENERATING DEVICE, TEST APPARATUS, AND...
- Publication number 20090027134
- Publication date Jan 29, 2009
- Advantest Corporation
- Makoto Kurosawa
- G01 - MEASURING TESTING
Information Patent Application
Signal generating apparatus, periodic-signal observing system, inte...
- Publication number 20090009220
- Publication date Jan 8, 2009
- FUJITSU LIMITED
- Sadanori Akiya
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT WITH CONTINUOUS TESTING OF REPETITIVE FUNCTIONAL...
- Publication number 20080301511
- Publication date Dec 4, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Gary L. Miller
- G01 - MEASURING TESTING
Information Patent Application
Waveform generation apparatus, setup cycle correction method and se...
- Publication number 20080297222
- Publication date Dec 4, 2008
- Kenji Tamura
- G01 - MEASURING TESTING
Information Patent Application
TIMING VERNIER USING A DELAY LOCKED LOOP
- Publication number 20080252344
- Publication date Oct 16, 2008
- MOSAID Technologies Incorporated
- Bruce Millar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TEST APPARATUS AND ELECTRONIC DEVICE
- Publication number 20080234969
- Publication date Sep 25, 2008
- Advantest Corporation
- Masaru Goishi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST APPARATUS AND ELECTRONIC DEVICE
- Publication number 20080232538
- Publication date Sep 25, 2008
- Advantest Corporation
- Masaru Goishi
- G01 - MEASURING TESTING

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Multiple-level driver circuit with non-commutating bridge

Automated test system with event detection capability

Integrated circuit testing module including signal shaping interface

Method, apparatus, and system for enabling a deterministic interface

Test apparatus for digital modulated signal

Sub-instruction repeats for algorithmic pattern generators

Programmable on-chip logic analyzer apparatus, systems, and methods

Probe card

Test apparatus for digital modulated signal

Methods and apparatus using a service to launch and/or monitor data...

Semiconductor test apparatus and test method

Test apparatus, test method and manufacturing method

Multiply apparatus for semiconductor test pattern signal

Device and method for testing and for diagnosing digital circuits

Integrated circuit testing module including signal shaping interface

High impedance, high parallelism, high temperature memory test syst...

Test apparatus and manufacturing method

High speed fully differential resistor-based level formatter

Integrated circuit testing module configured for set-up and hold ti...

Test apparatus, test method and manufacturing method

Timing vernier using a delay locked loop

Integrated circuit testing module including signal shaping interface

Fast, low power formatter for automatic test system

Programmable on-chip logic analyzer apparatus, systems, and methods

Signal generating apparatus, test apparatus and circuit device

Waveform generator, waveform generating device, test apparatus, and...

Timing vernier using a delay locked loop

Testing hardware components to detect hardware failures

Circuit verification apparatus, circuit verification method, and si...

Testing apparatus

Patents Applicationslast 30 patents

TESTING A CONTROL DEVICE USING A TEST ASSEMBLY

INTEGRATED CIRCUIT TESTING MODULE INCLUDING SIGNAL SHAPING INTERFACE

INTEGRATED CIRCUIT TESTING MODULE INCLUDING SIGNAL SHAPING INTERFACE

Method, apparatus, and system for enabling a deterministic interface

PROGRAMMABLE ON-CHIP LOGIC ANALYZER APPARATUS, SYSTEMS, AND METHODS

SEMICONDUCTOR TEST APPARATUS AND TEST METHOD

High Speed Fully Differential Resistor-Based Level Formatter

TIMING VERNIER USING A DELAY LOCKED LOOP

TEST APPARATUS FOR DIGITAL MODULATED SIGNAL

TEST APPARATUS FOR DIGITAL MODULATED SIGNAL

HIGH IMPEDANCE, HIGH PARALLELISM, HIGH TEMPERATURE MEMORY TEST SYST...

MULTIPLY APPARATUS FOR SEMICONDUCTOR TEST PATTERN SIGNAL

PROBE CARD

TEST APPARATUS, TEST METHOD AND MANUFACTURING METHOD

TIMING VERNIER USING A DELAY LOCKED LOOP

SIGNAL GENERATING APPARATUS, TEST APPARATUS AND CIRCUIT DEVICE

TEST APPARATUS AND MANUFACTURING METHOD

PIN ELECTRONICS CIRCUIT, SEMICONDUCTOR DEVICE TEST EQUIPMENT AND SY...

FAST, LOW POWER FORMATTER FOR AUTOMATIC TEST SYSTEM

PROGRAMMABLE ON-CHIP LOGIC ANALYZER APPARATUS, SYSTEMS, AND METHODS

TEST APPARATUS, TEST METHOD AND MANUFACTURING METHOD

TEST APPARATUS, PROBE CARD, AND TEST METHOD

TEST APPARATUS

WAVEFORM GENERATOR, WAVEFORM GENERATING DEVICE, TEST APPARATUS, AND...

Signal generating apparatus, periodic-signal observing system, inte...

INTEGRATED CIRCUIT WITH CONTINUOUS TESTING OF REPETITIVE FUNCTIONAL...

Waveform generation apparatus, setup cycle correction method and se...

TIMING VERNIER USING A DELAY LOCKED LOOP

TEST APPARATUS AND ELECTRONIC DEVICE

TEST APPARATUS AND ELECTRONIC DEVICE