Implementation of control logic

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G11C29/14

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

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G11C29/14Implementation of control logic

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Patents Grantslast 30 patents

Information Patent Grant
3D stacked integrated circuits having functional blocks configured...
- Patent number 12,266,647
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and method for performing test
- Patent number 12,254,937
- Issue date Mar 18, 2025
- SK hynix Inc.
- Choung Ki Song
- G11 - INFORMATION STORAGE
Information Patent Grant
At-speed test of functional memory interface logic in devices
- Patent number 12,243,603
- Issue date Mar 4, 2025
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Control method, semiconductor memory, and electronic device
- Patent number 12,230,348
- Issue date Feb 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yoonjoo Eom
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and memory system including the same
- Patent number 12,205,661
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Sung-Rae Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable error correction codeword packing to support bit error rat...
- Patent number 12,106,815
- Issue date Oct 1, 2024
- Intel Coproration
- Ravi Motwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device detecting defect, and operating method...
- Patent number 12,100,463
- Issue date Sep 24, 2024
- Samsung Electronics Co., Ltd.
- Bongkil Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Floating gate test structure for embedded memory device
- Patent number 12,096,629
- Issue date Sep 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hung-Ling Shih
- G11 - INFORMATION STORAGE
Information Patent Grant
JTAG registers with concurrent inputs
- Patent number 12,072,380
- Issue date Aug 27, 2024
- Antonino Mondello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Track charge loss based on signal and noise characteristics of memo...
- Patent number 12,073,899
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory built-in self-test with automated reference trim feedback fo...
- Patent number 12,046,315
- Issue date Jul 23, 2024
- SIEMENS INDUSTRY SOFTWARE INC.
- Jongsin Yun
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for detecting a state of a bus
- Patent number 12,046,316
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit and test method thereof
- Patent number 12,033,709
- Issue date Jul 9, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Liang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
ATPG testing method for latch based memories, for area reduction
- Patent number 12,020,760
- Issue date Jun 25, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Venkata Narayanan Srinivasan
- G11 - INFORMATION STORAGE
Information Patent Grant
Management of multiple memory in-field self-repair options
- Patent number 12,009,045
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with selective command delay and associated me...
- Patent number 11,990,195
- Issue date May 21, 2024
- Boon Hor Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip having debug function and chip debugging method
- Patent number 11,942,172
- Issue date Mar 26, 2024
- Realtek Semiconductor Corporation
- Pan-Ting Jiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimization of soft bit windows based on signal and noise characte...
- Patent number 11,875,846
- Issue date Jan 16, 2024
- Micron Technology, Inc.
- James Fitzpatrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system including an in-package sequencer to perform erro...
- Patent number 11,869,618
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Samir Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device test mode access
- Patent number 11,854,637
- Issue date Dec 26, 2023
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory chip having on-die mirroring function and method for testing...
- Patent number 11,848,068
- Issue date Dec 19, 2023
- Samsung Electronics Co., Ltd.
- Byoungsul Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory, memory test system, and memory test method
- Patent number 11,817,166
- Issue date Nov 14, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jia Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Computer system with redundancy having fail test mode
- Patent number 11,810,634
- Issue date Nov 7, 2023
- Micron Technology, Inc.
- Sadayuki Okuma
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory systems including simplified BISR logic circuit
- Patent number 11,804,278
- Issue date Oct 31, 2023
- SK hynix Inc.
- Bo Ra Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay fault testing of pseudo static controls
- Patent number 11,768,726
- Issue date Sep 26, 2023
- Texas Instruments Incorporated
- Aravinda Acharya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and operating method thereof
- Patent number 11,769,565
- Issue date Sep 26, 2023
- SK Hynix Inc.
- Seung Hyun Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for LUT-free memory repair
- Patent number 11,769,568
- Issue date Sep 26, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Katherine H. Chiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Quick configurable universal register for a configurable integrated...
- Patent number 11,749,368
- Issue date Sep 5, 2023
- Intel Corporation
- Bee Yee Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing of comparators within a memory safety logic circuit using a...
- Patent number 11,742,045
- Issue date Aug 29, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Rohit Bhasin
- G11 - INFORMATION STORAGE
Information Patent Grant
Devices including control logic structures, and related methods
- Patent number 11,742,344
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Kurt D. Beigel
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20250078947
- Publication date Mar 6, 2025
- Samsung Electronics Co., Ltd.
- Sung-Rae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
ABORTED OPERATION DETECTION FOR NONVOLATILE MEMORY WITH NON-UNIFORM...
- Publication number 20240428874
- Publication date Dec 26, 2024
- Western Digital Technologies, Inc.
- Huiwen Xu
- G11 - INFORMATION STORAGE
Information Patent Application
TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMO...
- Publication number 20240412795
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20240412801
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE WITH SELECTIVE COMMAND DELAY AND ASSOCIATED ME...
- Publication number 20240304269
- Publication date Sep 12, 2024
- Lodestar Licensing Group LLC
- Boon Hor Lam
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM, DEBUGGING DEVICE, DEBUGGING METHOD OF MEMORY SYSTEM,...
- Publication number 20240304270
- Publication date Sep 12, 2024
- Samsung Electronics Co., Ltd.
- Bumju KIM
- G11 - INFORMATION STORAGE
Information Patent Application
ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION
- Publication number 20240296899
- Publication date Sep 5, 2024
- STMicroelectronics International N.V.
- Venkata Narayanan SRINIVASAN
- G11 - INFORMATION STORAGE
Information Patent Application
TEST CIRCUIT AND RECEIVING CIRCUIT HAVING TEST FUNCTION
- Publication number 20240242773
- Publication date Jul 18, 2024
- SK HYNIX INC.
- Gi Moon HONG
- G11 - INFORMATION STORAGE
Information Patent Application
LATCH TYPE SENSE AMPLIFIER FOR TESTING
- Publication number 20240242772
- Publication date Jul 18, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND OPERATING METHOD T...
- Publication number 20240212776
- Publication date Jun 27, 2024
- Samsung Electronics Co., Ltd.
- Jongpil SON
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Verification Using Processing-in-Memory
- Publication number 20240212777
- Publication date Jun 27, 2024
- ADVANCED MICRO DEVICES, INC.
- Robin Conradine Knauerhase
- G11 - INFORMATION STORAGE
Information Patent Application
OPTIMIZATION OF SOFT BIT WINDOWS BASED ON SIGNAL AND NOISE CHARACTE...
- Publication number 20240185915
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- James Fitzpatrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION CODE CIRCUIT, MEMORY DEVICE INCLUDING ERROR CORREC...
- Publication number 20240185942
- Publication date Jun 6, 2024
- Samsung Electronics Co., Ltd.
- Myungkyu Lee
- G11 - INFORMATION STORAGE
Information Patent Application
STATISTICS BASED NON-VOLATILE MEMORY HEALTH MITIGATION
- Publication number 20240185940
- Publication date Jun 6, 2024
- Western Digital Technologies, Inc.
- Shabtay Yudkovich
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE XNOR AND NON-VOLATILE SRAM SYSTEM WITH ENHANCED STORE...
- Publication number 20240153574
- Publication date May 9, 2024
- Rouwaida Kanj
- G11 - INFORMATION STORAGE
Information Patent Application
AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES
- Publication number 20240120016
- Publication date Apr 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR PERFORMING TEST
- Publication number 20240120015
- Publication date Apr 11, 2024
- SK HYNIX INC.
- Choung Ki SONG
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR RESTRICTING READ ACCESS TO SUPPLY CHIPS
- Publication number 20240094925
- Publication date Mar 21, 2024
- Lexmark International, Inc.
- Stephen Porter Bush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION CODE CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING...
- Publication number 20240079076
- Publication date Mar 7, 2024
- SK HYNIX INC.
- Hong Ki MOON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BUILT-IN SELF-TEST WITH AUTOMATED REFERENCE TRIM FEEDBACK FO...
- Publication number 20240013846
- Publication date Jan 11, 2024
- Siemens Industry Software Inc.
- Jongsin Yun
- G11 - INFORMATION STORAGE
Information Patent Application
INTERPOSERS FOR MEMORY DEVICE TESTING AND CHARACTERIZATION, INCLUDI...
- Publication number 20230386596
- Publication date Nov 30, 2023
- Micron Technology, Inc.
- Eric J. Stave
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES, OPERATING METHODS OF THE MEMORY DEVICES, AND TEST S...
- Publication number 20230377669
- Publication date Nov 23, 2023
- Samsung Electronics Co., Ltd.
- Wonyoung Choi
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR LUT-FREE MEMORY REPAIR
- Publication number 20230368858
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Katherine H. Chiang
- G11 - INFORMATION STORAGE
Information Patent Application
FLOATING GATE TEST STRUCTURE FOR EMBEDDED MEMORY DEVICE
- Publication number 20230345717
- Publication date Oct 26, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Ling Shih
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROL METHOD, SEMICONDUCTOR MEMORY, AND ELECTRONIC DEVICE
- Publication number 20230307081
- Publication date Sep 28, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- YoonJoo EOM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE TEST MODE ACCESS
- Publication number 20230178163
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20230142474
- Publication date May 11, 2023
- Samsung Electronics Co., Ltd.
- Sung-Rae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE DETECTING DEFECT, AND OPERATING METHOD...
- Publication number 20230121078
- Publication date Apr 20, 2023
- Samsung Electronics Co., Ltd.
- Bongkil JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION
- Publication number 20230105305
- Publication date Apr 6, 2023
- STMicroelectronics International N.V.
- Venkata Narayanan SRINIVASAN
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM FOR OUTPUTTING TEST DATA FROM MULTIPLE CORES AND METHOD THEREOF
- Publication number 20230092302
- Publication date Mar 23, 2023
- SK HYNIX INC.
- Siarhei Rusakovich
- G11 - INFORMATION STORAGE

Implementation of control logic

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

3D stacked integrated circuits having functional blocks configured...

Semiconductor device and method for performing test

At-speed test of functional memory interface logic in devices

Control method, semiconductor memory, and electronic device

Memory device and memory system including the same

Variable error correction codeword packing to support bit error rat...

Semiconductor memory device detecting defect, and operating method...

Floating gate test structure for embedded memory device

JTAG registers with concurrent inputs

Track charge loss based on signal and noise characteristics of memo...

Memory built-in self-test with automated reference trim feedback fo...

Techniques for detecting a state of a bus

Test circuit and test method thereof

ATPG testing method for latch based memories, for area reduction

Management of multiple memory in-field self-repair options

Semiconductor device with selective command delay and associated me...

Chip having debug function and chip debugging method

Optimization of soft bit windows based on signal and noise characte...

Memory sub-system including an in-package sequencer to perform erro...

Memory device test mode access

Memory chip having on-die mirroring function and method for testing...

Memory, memory test system, and memory test method

Computer system with redundancy having fail test mode

Memory systems including simplified BISR logic circuit

Delay fault testing of pseudo static controls

Memory device and operating method thereof

Method for LUT-free memory repair

Quick configurable universal register for a configurable integrated...

Testing of comparators within a memory safety logic circuit using a...

Devices including control logic structures, and related methods

Patents Applicationslast 30 patents

MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

ABORTED OPERATION DETECTION FOR NONVOLATILE MEMORY WITH NON-UNIFORM...

TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMO...

TECHNIQUES FOR DETECTING A STATE OF A BUS

SEMICONDUCTOR DEVICE WITH SELECTIVE COMMAND DELAY AND ASSOCIATED ME...

MEMORY SYSTEM, DEBUGGING DEVICE, DEBUGGING METHOD OF MEMORY SYSTEM,...

ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION

TEST CIRCUIT AND RECEIVING CIRCUIT HAVING TEST FUNCTION

LATCH TYPE SENSE AMPLIFIER FOR TESTING

MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND OPERATING METHOD T...

Memory Verification Using Processing-in-Memory

OPTIMIZATION OF SOFT BIT WINDOWS BASED ON SIGNAL AND NOISE CHARACTE...

ERROR CORRECTION CODE CIRCUIT, MEMORY DEVICE INCLUDING ERROR CORREC...

STATISTICS BASED NON-VOLATILE MEMORY HEALTH MITIGATION

NON-VOLATILE XNOR AND NON-VOLATILE SRAM SYSTEM WITH ENHANCED STORE...

AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES

SEMICONDUCTOR DEVICE AND METHOD FOR PERFORMING TEST

METHODS FOR RESTRICTING READ ACCESS TO SUPPLY CHIPS

ERROR CORRECTION CODE CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING...

MEMORY BUILT-IN SELF-TEST WITH AUTOMATED REFERENCE TRIM FEEDBACK FO...

INTERPOSERS FOR MEMORY DEVICE TESTING AND CHARACTERIZATION, INCLUDI...

MEMORY DEVICES, OPERATING METHODS OF THE MEMORY DEVICES, AND TEST S...

METHOD FOR LUT-FREE MEMORY REPAIR

FLOATING GATE TEST STRUCTURE FOR EMBEDDED MEMORY DEVICE

CONTROL METHOD, SEMICONDUCTOR MEMORY, AND ELECTRONIC DEVICE

MEMORY DEVICE TEST MODE ACCESS

MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

SEMICONDUCTOR MEMORY DEVICE DETECTING DEFECT, AND OPERATING METHOD...

ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION

SYSTEM FOR OUTPUTTING TEST DATA FROM MULTIPLE CORES AND METHOD THEREOF