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G11C29/024

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

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G11C29/024in decoders

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Patents Grantslast 30 patents

Information Patent Grant
Method and device for correcting errors in resistive memories
- Patent number 12,154,647
- Issue date Nov 26, 2024
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Valentin Gherman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient soft decoding of error correction code via extrinsic bit...
- Patent number 12,119,075
- Issue date Oct 15, 2024
- Kioxia Corporation
- Avi Steiner
- G11 - INFORMATION STORAGE
Information Patent Grant
Authenticity and yield by reading defective cells
- Patent number 12,027,224
- Issue date Jul 2, 2024
- International Business Machines Corporation
- Julien Frougier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Correcting memory data using an error code and a memory test result
- Patent number 11,996,859
- Issue date May 28, 2024
- Amazon Technologies, Inc.
- Itai Avron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal drop compensated memory
- Patent number 11,508,455
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory address decoder, system, and related method f...
- Patent number 11,443,820
- Issue date Sep 13, 2022
- Microchip Technology Incorporated
- Lorenzo Bedarida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices configured to detect internal potential failures
- Patent number 11,244,716
- Issue date Feb 8, 2022
- Samsung Electronics Co., Ltd.
- Jinseok Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor apparatus and semiconductor system with training func...
- Patent number 11,195,563
- Issue date Dec 7, 2021
- SK hynix Inc.
- Gi Moon Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast copy through controller
- Patent number 11,177,012
- Issue date Nov 16, 2021
- Western Digital Technologies, Inc.
- Dudy David Avraham
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of detecting address decoding error
- Patent number 11,139,040
- Issue date Oct 5, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device with cache latches
- Patent number 11,107,521
- Issue date Aug 31, 2021
- SK hynix Inc.
- Sung Lae Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods to test a memory device
- Patent number 10,998,071
- Issue date May 4, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Lien Linus Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
One-time programmable (OTP) memory devices and methods of testing O...
- Patent number 10,964,399
- Issue date Mar 30, 2021
- Samsung Electronics Co., Ltd.
- Min-Yeol Ha
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods to encode column plane compression data
- Patent number 10,937,517
- Issue date Mar 2, 2021
- Micron Technology, Inc.
- Eric J. Rich-Plotkin
- G11 - INFORMATION STORAGE
Information Patent Grant
Joint soft boundaries and LLRS update for flash memory
- Patent number 10,847,241
- Issue date Nov 24, 2020
- Kabushiki Kaisha Toshiba
- Hachem Yassine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault detection circuitry
- Patent number 10,848,186
- Issue date Nov 24, 2020
- ARM Limited
- Vivek Asthana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatuses including command delay adjustment circuit
- Patent number 10,755,758
- Issue date Aug 25, 2020
- Micron Technology, Inc.
- Shuichi Ishibashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Failure detection circuitry for address decoder for a data storage...
- Patent number 10,706,934
- Issue date Jul 7, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Address fault detection in a flash memory system
- Patent number 10,692,548
- Issue date Jun 23, 2020
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods to test a memory device
- Patent number 10,672,494
- Issue date Jun 2, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Lien Linus Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing content addressable memory and random access memory
- Patent number 10,593,420
- Issue date Mar 17, 2020
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of detecting address decoding error and address decoder erro...
- Patent number 10,553,300
- Issue date Feb 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods to test a memory device
- Patent number 10,504,604
- Issue date Dec 10, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Lien Linus Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Address fault detection in a flash memory system
- Patent number 10,431,265
- Issue date Oct 1, 2019
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Failure detection circuitry for address decoder for a data storage...
- Patent number 10,354,731
- Issue date Jul 16, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-overhead mechanism to detect address faults in ECC-protected me...
- Patent number 10,319,461
- Issue date Jun 11, 2019
- Intel Corporation
- Kon-Woo Kwon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses including command delay adjustment circuit
- Patent number 10,290,336
- Issue date May 14, 2019
- Micron Technology, Inc.
- Shuichi Ishibashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory controller and operation method thereof
- Patent number 10,204,037
- Issue date Feb 12, 2019
- SK Hynix Inc.
- Ja-Hyun Koo
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing content addressable memory and random access memory
- Patent number 10,170,199
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory macro and semiconductor integrated circuit device
- Patent number 10,109,337
- Issue date Oct 23, 2018
- RENESAS ELECTRONICS CORPORATION
- Yoshisato Yokoyama
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE
- Publication number 20240321374
- Publication date Sep 26, 2024
- KIOXIA Corporation
- Manabu SATO
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT SOFT DECODING OF ERROR CORRECTION CODE VIA EXTRINSIC BIT...
- Publication number 20240312552
- Publication date Sep 19, 2024
- KIOXIA Corporation
- Avi Steiner
- G11 - INFORMATION STORAGE
Information Patent Application
AUTHENTICITY AND YIELD BY READING DEFECTIVE CELLS
- Publication number 20230298683
- Publication date Sep 21, 2023
- International Business Machines Corporation
- Julien Frougier
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND DEVICE FOR CORRECTING ERRORS IN RESISTIVE MEMORIES
- Publication number 20230187013
- Publication date Jun 15, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Valentin GHERMAN
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL DROP COMPENSATED MEMORY
- Publication number 20230039775
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL DROP COMPENSATED MEMORY
- Publication number 20220399070
- Publication date Dec 15, 2022
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH PAGE BUFFERS
- Publication number 20210057019
- Publication date Feb 25, 2021
- SK hynix Inc.
- Sung Lae Oh
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS TO TEST A MEMORY DEVICE
- Publication number 20200365223
- Publication date Nov 19, 2020
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
JOINT SOFT BOUNDARIES AND LLRS UPDATE FOR FLASH MEMORY
- Publication number 20200294611
- Publication date Sep 17, 2020
- KABUSHIKI KAISHA TOSHIBA
- Hachem Yassine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ONE-TIME PROGRAMMABLE (OTP) MEMORY DEVICES AND METHODS OF TESTING O...
- Publication number 20200219570
- Publication date Jul 9, 2020
- Samsung Electronics Co., Ltd.
- Min-Yeol HA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM WITH TRAINING FUNC...
- Publication number 20200202905
- Publication date Jun 25, 2020
- SK HYNIX INC.
- Gi Moon HONG
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF DETECTING ADDRESS DECODING ERROR
- Publication number 20200168286
- Publication date May 28, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro FUJIWARA
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS TO TEST A MEMORY DEVICE
- Publication number 20200118639
- Publication date Apr 16, 2020
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
FAILURE DETECTION CIRCUITRY FOR ADDRESS DECODER FOR A DATA STORAGE...
- Publication number 20190333584
- Publication date Oct 31, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hidehiro FUJIWARA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY ADDRESS DECODER, SYSTEM, AND RELATED METHOD F...
- Publication number 20190228831
- Publication date Jul 25, 2019
- MICROCHIP TECHNOLOGY INCORPORATED
- Lorenzo Bedarida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS TO TEST A MEMORY DEVICE
- Publication number 20190096502
- Publication date Mar 28, 2019
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
FAILURE DETECTION CIRCUITRY FOR ADDRESS DECODER FOR A DATA STORAGE...
- Publication number 20190080765
- Publication date Mar 14, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hidehiro FUJIWARA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF DETECTING ADDRESS DECODING ERROR AND ADDRESS DECODER ERRO...
- Publication number 20180358106
- Publication date Dec 13, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro FUJIWARA
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUSES INCLUDING COMMAND DELAY ADJUSTMENT CIRCUIT
- Publication number 20180358064
- Publication date Dec 13, 2018
- Micron Technology, Inc.
- Shuichi Ishibashi
- G11 - INFORMATION STORAGE
Information Patent Application
MESSAGE STORAGE IN MEMORY BLOCKS USING CODEWORDS
- Publication number 20160170830
- Publication date Jun 16, 2016
- Microsoft Technology Licensing, LLC
- John D. Davis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-Speed Address Fault Detection Using Split Address ROM
- Publication number 20150243368
- Publication date Aug 27, 2015
- Scott I. Remington
- G11 - INFORMATION STORAGE
Information Patent Application
Word Line Address Scan
- Publication number 20150170762
- Publication date Jun 18, 2015
- INFINEON TECHNOLOGIES AG
- Thomas Nirschl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MESSAGE STORAGE IN MEMORY BLOCKS USING CODEWORDS
- Publication number 20140351501
- Publication date Nov 27, 2014
- Microsoft Corporation
- John D. Davis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Select Transistor Tuning
- Publication number 20140247665
- Publication date Sep 4, 2014
- San Disk Technologies Inc.
- Chris Avila
- G11 - INFORMATION STORAGE
Information Patent Application
Select Transistor Tuning
- Publication number 20140169095
- Publication date Jun 19, 2014
- SANDISK TECHNOLOGIES INC.
- Chris Nga Yee Avila
- G11 - INFORMATION STORAGE
Information Patent Application
ADDRESS INPUT CIRCUIT OF SEMICONDUCTOR APPARATUS
- Publication number 20140169118
- Publication date Jun 19, 2014
- SK HYNIX INC.
- Young Ju KIM
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT FOR DRIVING WORD LINE
- Publication number 20130215697
- Publication date Aug 22, 2013
- SK HYNIX INC.
- Byeong Chan CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR DETECTING PERMANENT FAULTS OF AN ADDRESS DECODER OF AN E...
- Publication number 20130114360
- Publication date May 9, 2013
- STMicroelectronics S.r.l.
- Stefano CORBANI
- G11 - INFORMATION STORAGE
Information Patent Application
WORD LINE FAULT DETECTION
- Publication number 20120327699
- Publication date Dec 27, 2012
- RAVINDRARAJ RAMARAJU
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic random access memory address line test technique
- Publication number 20120250438
- Publication date Oct 4, 2012
- Peiyuan Liu
- G11 - INFORMATION STORAGE

in decoders

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method and device for correcting errors in resistive memories

Efficient soft decoding of error correction code via extrinsic bit...

Authenticity and yield by reading defective cells

Correcting memory data using an error code and a memory test result

Signal drop compensated memory

Memory device, memory address decoder, system, and related method f...

Memory devices configured to detect internal potential failures

Semiconductor apparatus and semiconductor system with training func...

Fast copy through controller

Method of detecting address decoding error

Semiconductor memory device with cache latches

Systems and methods to test a memory device

One-time programmable (OTP) memory devices and methods of testing O...

Apparatuses and methods to encode column plane compression data

Joint soft boundaries and LLRS update for flash memory

Fault detection circuitry

Methods and apparatuses including command delay adjustment circuit

Failure detection circuitry for address decoder for a data storage...

Address fault detection in a flash memory system

Systems and methods to test a memory device

Testing content addressable memory and random access memory

Method of detecting address decoding error and address decoder erro...

Systems and methods to test a memory device

Address fault detection in a flash memory system

Failure detection circuitry for address decoder for a data storage...

Low-overhead mechanism to detect address faults in ECC-protected me...

Methods and apparatuses including command delay adjustment circuit

Memory device, memory controller and operation method thereof

Testing content addressable memory and random access memory

Memory macro and semiconductor integrated circuit device

Patents Applicationslast 30 patents

MEMORY DEVICE

EFFICIENT SOFT DECODING OF ERROR CORRECTION CODE VIA EXTRINSIC BIT...

AUTHENTICITY AND YIELD BY READING DEFECTIVE CELLS

METHOD AND DEVICE FOR CORRECTING ERRORS IN RESISTIVE MEMORIES

SIGNAL DROP COMPENSATED MEMORY

SIGNAL DROP COMPENSATED MEMORY

SEMICONDUCTOR MEMORY DEVICE WITH PAGE BUFFERS

SYSTEMS AND METHODS TO TEST A MEMORY DEVICE

JOINT SOFT BOUNDARIES AND LLRS UPDATE FOR FLASH MEMORY

ONE-TIME PROGRAMMABLE (OTP) MEMORY DEVICES AND METHODS OF TESTING O...

SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM WITH TRAINING FUNC...

METHOD OF DETECTING ADDRESS DECODING ERROR

SYSTEMS AND METHODS TO TEST A MEMORY DEVICE

FAILURE DETECTION CIRCUITRY FOR ADDRESS DECODER FOR A DATA STORAGE...

MEMORY DEVICE, MEMORY ADDRESS DECODER, SYSTEM, AND RELATED METHOD F...

SYSTEMS AND METHODS TO TEST A MEMORY DEVICE

FAILURE DETECTION CIRCUITRY FOR ADDRESS DECODER FOR A DATA STORAGE...

METHOD OF DETECTING ADDRESS DECODING ERROR AND ADDRESS DECODER ERRO...

METHODS AND APPARATUSES INCLUDING COMMAND DELAY ADJUSTMENT CIRCUIT

MESSAGE STORAGE IN MEMORY BLOCKS USING CODEWORDS

High-Speed Address Fault Detection Using Split Address ROM

Word Line Address Scan

MESSAGE STORAGE IN MEMORY BLOCKS USING CODEWORDS

Select Transistor Tuning

Select Transistor Tuning

ADDRESS INPUT CIRCUIT OF SEMICONDUCTOR APPARATUS

CIRCUIT FOR DRIVING WORD LINE

METHOD FOR DETECTING PERMANENT FAULTS OF AN ADDRESS DECODER OF AN E...

WORD LINE FAULT DETECTION

Dynamic random access memory address line test technique