Indication or identification of errors

Industry

CPC
G11C29/44

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/44Indication or identification of errors

Industries

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory devices and methods of operating semiconductor...
- Patent number 12,148,494
- Issue date Nov 19, 2024
- Samsung Electronics Co., Ltd.
- Kiheung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Detect whether die or channel is defective to confirm temperature data
- Patent number 12,148,495
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Venkata Naga Lakshman Pasala
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor system for detecting an erro...
- Patent number 12,148,492
- Issue date Nov 19, 2024
- SK hynix Inc.
- Yeong Han Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device capable of reducing program disturbance and erasing m...
- Patent number 12,142,327
- Issue date Nov 12, 2024
- Yangtze Memory Technologies Co., Ltd.
- Qiang Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intelligent memory device test rack
- Patent number 12,142,336
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Gary D. Hamor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory devices and methods of operating semiconductor...
- Patent number 12,136,463
- Issue date Nov 5, 2024
- Samsung Electronics Co., Ltd.
- Kiheung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system including semiconductor device for performing...
- Patent number 12,131,791
- Issue date Oct 29, 2024
- SK Hynix Inc.
- Byung Goo Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for correcting an error in data transmission o...
- Patent number 12,125,549
- Issue date Oct 22, 2024
- MIMIRIP LLC
- In Jong Jang
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-level error correcting code with sharing of check-bits
- Patent number 12,126,358
- Issue date Oct 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shih-Lien Linus Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Binary to ternary convertor for multilevel memory
- Patent number 12,119,064
- Issue date Oct 15, 2024
- Intel Corporation
- Pawel Tomkiewicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for determining memory cell data states
- Patent number 12,112,819
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Sheyang Ning
- G11 - INFORMATION STORAGE
Information Patent Grant
Test method, computer apparatus, and computer-readable storage medium
- Patent number 12,112,817
- Issue date Oct 8, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Biao Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Single event effect mitigation with smart-redundancy
- Patent number 12,112,820
- Issue date Oct 8, 2024
- University of Utah Research Foundation
- Aurelien Alacchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Read destructive memory wear leveling system
- Patent number 12,112,821
- Issue date Oct 8, 2024
- Seagate Technology LLC
- Jon D. Trantham
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory repair method and apparatus based on error code tracking
- Patent number 12,111,723
- Issue date Oct 8, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable error correction codeword packing to support bit error rat...
- Patent number 12,106,815
- Issue date Oct 1, 2024
- Intel Coproration
- Ravi Motwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repairable latch array
- Patent number 12,100,464
- Issue date Sep 24, 2024
- Advanced Micro Devices, Inc.
- Joel Thornton Irby
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for testing redundant fuse latches in a memory...
- Patent number 12,100,467
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device, operating method thereof, controller fo...
- Patent number 12,094,552
- Issue date Sep 17, 2024
- Samsung Electronics Co., Ltd.
- Sehwan Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Modular error correction code circuitry
- Patent number 12,094,551
- Issue date Sep 17, 2024
- Intel Corporation
- Hwa Chaw Law
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device having various recovery methods and recovery modes
- Patent number RE50129
- Issue date Sep 17, 2024
- Samsung Electronics Co., Ltd.
- Ji Hyung Park
Information Patent Grant
Virtualized scan chain testing in a random access memory (RAM) array
- Patent number 12,087,383
- Issue date Sep 10, 2024
- Ampere Computing LLC
- David Hoff
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive threshold for bad flash memory blocks
- Patent number 12,087,382
- Issue date Sep 10, 2024
- PURE STORAGE, INC.
- Matthew D. Fleming
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus to facilitate read-modify-write support in a...
- Patent number 12,072,814
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory, memory system, operation method of the memory, and operatio...
- Patent number 12,073,902
- Issue date Aug 27, 2024
- SK Hynix Inc.
- Kyung Whan Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and data processing system including the same
- Patent number 12,073,217
- Issue date Aug 27, 2024
- SK Hynix Inc.
- Dong Uk Lee
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS
- Publication number 20240388311
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE EXECUTING READ RETRY OPERATION BASED ON READ RETRY S...
- Publication number 20240379182
- Publication date Nov 14, 2024
- SK HYNIX INC.
- Hong Sik YUN
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR TESTING AND REPAIRING MEMORY DEVICE
- Publication number 20240379183
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Hao Lee
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM
- Publication number 20240363186
- Publication date Oct 31, 2024
- KIOXIA Corporation
- Naomi TAKEDA
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-LEVEL CELL DATA ENCODING
- Publication number 20240363184
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM
- Publication number 20240363185
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Deping He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME
- Publication number 20240354210
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Eung-Bo SHIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTENT ADDRESSABLE MEMORY AND CONTENT ADDRESSABLE MEMORY CELL
- Publication number 20240355408
- Publication date Oct 24, 2024
- Faraday Technology Corp.
- Yi-Hsin Tseng
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND/ADDRESS CHANNEL ERROR DETECTION
- Publication number 20240355407
- Publication date Oct 24, 2024
- Rambus Inc.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Application
COUNTING CIRCUIT, SEMICONDUCTOR MEMORY, AND COUNTING METHOD
- Publication number 20240347124
- Publication date Oct 17, 2024
- CXMT Corporation
- Zequn HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
PERFORMING DATA INTEGRITY CHECKS TO IDENTIFY DEFECTIVE WORDLINES
- Publication number 20240347110
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Jian Huang
- G11 - INFORMATION STORAGE
Information Patent Application
CENTRALIZED ERROR CORRECTION CIRCUIT
- Publication number 20240347123
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Taeksang Song
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME
- Publication number 20240338215
- Publication date Oct 10, 2024
- SK HYNIX INC.
- Dong Uk LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEMS HAVING MEMORY DEVICES THEREIN WITH ENHANCED ERROR CO...
- Publication number 20240339168
- Publication date Oct 10, 2024
- Samsung Electronics Co., Ltd.
- Sunghye Cho
- G11 - INFORMATION STORAGE
Information Patent Application
INTERRUPTING A MEMORY BUILT-IN SELF-TEST
- Publication number 20240339170
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLS
- Publication number 20240339169
- Publication date Oct 10, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hiroki NOGUCHI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST SYSTEM AND MEMORY TEST METHOD
- Publication number 20240331793
- Publication date Oct 3, 2024
- NANYA TECHNOLOGY CORPORATION
- CHENG-TING HSU
- G11 - INFORMATION STORAGE
Information Patent Application
Magnetic Memory Device
- Publication number 20240331796
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Hsiang CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR TESTING MEMORY DEVICES
- Publication number 20240331794
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- TAKAMASA SUZUKI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST SYSTEM AND MEMORY TEST METHOD
- Publication number 20240331792
- Publication date Oct 3, 2024
- NANYA TECHNOLOGY CORPORATION
- CHENG-TING HSU
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR MEMORY REPAIR
- Publication number 20240331795
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Katherine H. CHIANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE REGISTER ACCESS
- Publication number 20240320080
- Publication date Sep 26, 2024
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION
- Publication number 20240321378
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan VARADARAJAN
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...
- Publication number 20240312547
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE WITH SELECTIVE COMMAND DELAY AND ASSOCIATED ME...
- Publication number 20240304269
- Publication date Sep 12, 2024
- Lodestar Licensing Group LLC
- Boon Hor Lam
- G11 - INFORMATION STORAGE
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY WITH FASTER POST-ERASE DEFECT TESTING
- Publication number 20240290412
- Publication date Aug 29, 2024
- SANDISK TECHNOLOGIES LLC
- Sai Gautham Thoppa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF TESTING REPAIR CIRCUITS OF MEMORY DEVICES
- Publication number 20240290414
- Publication date Aug 29, 2024
- Samsung Electronics Co., Ltd.
- Taewon Kim
- G11 - INFORMATION STORAGE
Information Patent Application
TOPOLOGY-BASED RETIREMENT IN A MEMORY SYSTEM
- Publication number 20240290411
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Chun S. Yeung
- G11 - INFORMATION STORAGE

Indication or identification of errors

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus for read-modify-write support in multi-banked...

Semiconductor memory devices and methods of operating semiconductor...

Detect whether die or channel is defective to confirm temperature data

Semiconductor device and semiconductor system for detecting an erro...

Memory device capable of reducing program disturbance and erasing m...

Victim cache with dynamic allocation of entries

Atomic operations and histogram operations in a cache pipeline

Intelligent memory device test rack

Semiconductor memory devices and methods of operating semiconductor...

Semiconductor system including semiconductor device for performing...

Apparatus and method for correcting an error in data transmission o...

Two-level error correcting code with sharing of check-bits

Binary to ternary convertor for multilevel memory

Apparatus for determining memory cell data states

Test method, computer apparatus, and computer-readable storage medium

Single event effect mitigation with smart-redundancy

Read destructive memory wear leveling system

Memory repair method and apparatus based on error code tracking

Methods and apparatus for eviction in dual datapath victim cache sy...

Variable error correction codeword packing to support bit error rat...

Repairable latch array

Systems and methods for testing redundant fuse latches in a memory...

Non-volatile memory device, operating method thereof, controller fo...

Modular error correction code circuitry

Storage device having various recovery methods and recovery modes

Virtualized scan chain testing in a random access memory (RAM) array

Adaptive threshold for bad flash memory blocks

Methods and apparatus to facilitate read-modify-write support in a...

Memory, memory system, operation method of the memory, and operatio...

Memory system and data processing system including the same

Patents Applicationslast 30 patents

TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS

STORAGE DEVICE EXECUTING READ RETRY OPERATION BASED ON READ RETRY S...

METHOD FOR TESTING AND REPAIRING MEMORY DEVICE

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

MEMORY SYSTEM

MULTI-LEVEL CELL DATA ENCODING

TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM

MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME

CONTENT ADDRESSABLE MEMORY AND CONTENT ADDRESSABLE MEMORY CELL

COMMAND/ADDRESS CHANNEL ERROR DETECTION

COUNTING CIRCUIT, SEMICONDUCTOR MEMORY, AND COUNTING METHOD

PERFORMING DATA INTEGRITY CHECKS TO IDENTIFY DEFECTIVE WORDLINES

CENTRALIZED ERROR CORRECTION CIRCUIT

MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME

MEMORY SYSTEMS HAVING MEMORY DEVICES THEREIN WITH ENHANCED ERROR CO...

INTERRUPTING A MEMORY BUILT-IN SELF-TEST

METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLS

MEMORY TEST SYSTEM AND MEMORY TEST METHOD

Magnetic Memory Device

APPARATUSES AND METHODS FOR TESTING MEMORY DEVICES

MEMORY TEST SYSTEM AND MEMORY TEST METHOD

METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR MEMORY REPAIR

MEMORY MODULE REGISTER ACCESS

BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...

SEMICONDUCTOR DEVICE WITH SELECTIVE COMMAND DELAY AND ASSOCIATED ME...

VICTIM CACHE WITH WRITE MISS MERGING

NON-VOLATILE MEMORY WITH FASTER POST-ERASE DEFECT TESTING

METHODS OF TESTING REPAIR CIRCUITS OF MEMORY DEVICES

TOPOLOGY-BASED RETIREMENT IN A MEMORY SYSTEM