Input/output (I/O) data management or control circuits

Industry

CPC
G11C11/4096

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C11/4096Input/output (I/O) data management or control circuits

Industries

Patents Grantslast 30 patents

Information Patent Grant
Method of operating an integrated circuit and integrated circuit
- Patent number 12,148,465
- Issue date Nov 19, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-bandwidth DDR DIMM, memory system, and operation method thereof
- Patent number 12,147,713
- Issue date Nov 19, 2024
- INNOSILICON MICROELECTRONICS (ZHUHAI) CO., LTD.
- Liang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing fault isolation in dram
- Patent number 12,142,339
- Issue date Nov 12, 2024
- Microsoft Technology Licensing, LLC
- Todd Alan Merritt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and refresh method
- Patent number 12,136,451
- Issue date Nov 5, 2024
- Kioxia Corporation
- Rei Kasedo
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, methods and media of optimization of temporary read errors...
- Patent number 12,136,453
- Issue date Nov 5, 2024
- Yangtze Memory Technologies Co., Ltd.
- Jianquan Jia
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 12,136,452
- Issue date Nov 5, 2024
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multinary bit cells for memory devices and network applications and...
- Patent number 12,136,457
- Issue date Nov 5, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Katherine H. Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Word line booster circuit and method
- Patent number 12,131,770
- Issue date Oct 29, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,131,773
- Issue date Oct 29, 2024
- Unisantis Electronics Singapore Pte. Ltd.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module with reduced read/write turnaround overhead
- Patent number 12,130,757
- Issue date Oct 29, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three dimension memory device capable of improving sensing accuracy...
- Patent number 12,131,772
- Issue date Oct 29, 2024
- Macronix International Co., Ltd.
- Teng-Hao Yeh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module, memory system, and operation method of memory contro...
- Patent number 12,132,501
- Issue date Oct 29, 2024
- Samsung Electronics Co., Ltd.
- Wonjae Shin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor apparatus and semiconductor memory apparatus
- Patent number 12,125,516
- Issue date Oct 22, 2024
- SK hynix Inc.
- Dong Keun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 12,127,391
- Issue date Oct 22, 2024
- Kioxia Corporation
- Teruhisa Sonohara
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-rail power transition
- Patent number 12,125,517
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and methods for controlling row hammer
- Patent number 12,119,044
- Issue date Oct 15, 2024
- Samsung Electronics Co., Ltd.
- Seongjin Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array layers with alternating sense amplifier layers
- Patent number 12,119,045
- Issue date Oct 15, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Hongwen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device having multi-stack memory block and metho...
- Patent number 12,119,046
- Issue date Oct 15, 2024
- Samsung Electronics Co., Ltd.
- Jaeduk Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices and electronic devices including the s...
- Patent number 12,119,048
- Issue date Oct 15, 2024
- Samsung Electronics Co., Ltd.
- Seunghan Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Drive circuit, method for driving drive circuit, and memory
- Patent number 12,119,083
- Issue date Oct 15, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Shuhao Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal synchronization adjustment method and signal synchronization...
- Patent number 12,119,041
- Issue date Oct 15, 2024
- Integrated Silicon Solution Inc.
- Sang Min Jun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller performing data training, system-on-chip includin...
- Patent number 12,119,049
- Issue date Oct 15, 2024
- Samsung Electronics Co., Ltd.
- Daero Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device using semiconductor element
- Patent number 12,120,864
- Issue date Oct 15, 2024
- Unisantis Electronics Singapore Pte. Ltd.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit and word line driver
- Patent number 12,112,796
- Issue date Oct 8, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Zhi-Hao Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical transistor fuse latches
- Patent number 12,113,015
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Fatma Arzum Simsek-Ege
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for input buffer enable clock synchronization
- Patent number 12,112,789
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Takayuki Miyamoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device for wafer-on-wafer formed memory and logic
- Patent number 12,112,792
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 12,112,794
- Issue date Oct 8, 2024
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal routing between memory die and logic die for mode based oper...
- Patent number 12,112,793
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device through use of semiconductor device
- Patent number 12,108,589
- Issue date Oct 1, 2024
- Unisantis Electronics Singapore Pte. Ltd.
- Koji Sakui
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Data Storage Device and Method for Optimized Refresh
- Publication number 20240386934
- Publication date Nov 21, 2024
- Western Digital Technologies, Inc.
- Eyal Hamo
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MODULE FOR PERFORMING ERROR CORRECTION OPERATION
- Publication number 20240386985
- Publication date Nov 21, 2024
- SK HYNIX INC.
- Mun Seon JANG
- G11 - INFORMATION STORAGE
Information Patent Application
SCALED 2T DRAM
- Publication number 20240386943
- Publication date Nov 21, 2024
- International Business Machines Corporation
- Min Gyu Sung
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING SEMICONDUCTOR ELEMENTS
- Publication number 20240386944
- Publication date Nov 21, 2024
- Unisantis Electronics Singapore PTE Ltd.
- Koji SAKUI
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-STAGE VOLTAGE CALIBRATION UPON POWER-UP OF MEMORY DEVICE
- Publication number 20240386936
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Proactive Usage-Based Disturbance Mitigation based on Resource Avai...
- Publication number 20240379147
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF PERFORMING INTERNAL PROCESSING OPERATION OF MEMORY DEVICE
- Publication number 20240379150
- Publication date Nov 14, 2024
- Samsung Electronics Co., Ltd.
- Pavan Kumar Kasibhatla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240381606
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE SENSE AMPLIFIER AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20240379151
- Publication date Nov 14, 2024
- Samsung Electronics Co., Ltd.
- Seongjin Cho
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC BUFFER LIMIT FOR AT-RISK DATA
- Publication number 20240379153
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G11 - INFORMATION STORAGE
Information Patent Application
Bank-Shared Usage-Based Disturbance Circuitry
- Publication number 20240371426
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Yunyoung Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES
- Publication number 20240371417
- Publication date Nov 7, 2024
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUIT AND WORD LINE DRIVER
- Publication number 20240371435
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- ZHI-HAO CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE, ELECTRONIC DEVICE AND METHOD FOR SETTI...
- Publication number 20240361823
- Publication date Oct 31, 2024
- Samsung Electronics Co., Ltd.
- Ki-Seok OH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR COMPUTE ENABLED CACHE
- Publication number 20240354254
- Publication date Oct 24, 2024
- Lodestar Licensing Group LLC
- Richard C. Murphy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE FOR SELF-SEARCHING FOR BOUNDARY WORD LINE, METHOD FOR...
- Publication number 20240355377
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Byoung Sung YOU
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage Range for Training Physical Memory
- Publication number 20240355379
- Publication date Oct 24, 2024
- ADVANCED MICRO DEVICES, INC.
- Anwar Parvez Kashem
- G11 - INFORMATION STORAGE
Information Patent Application
RAPID TAG INVALIDATION CIRCUIT
- Publication number 20240355380
- Publication date Oct 24, 2024
- ADVANCED MICRO DEVICES, INC.
- Russell Schreiber
- G11 - INFORMATION STORAGE
Information Patent Application
BANK CONFIGURABLE POWER MODES
- Publication number 20240353914
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Usage-Based Disturbance Counter Clearance
- Publication number 20240347096
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING SEMICONDUCTOR ELEMENT
- Publication number 20240349482
- Publication date Oct 17, 2024
- Unisantis Electronics Singapore PTE Ltd.
- Masakazu KAKUMU
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Comprising an Electrically Floating Body Transistor a...
- Publication number 20240347634
- Publication date Oct 17, 2024
- Zeno Semiconductor, Inc.
- Jin-Woo Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE IN MEMORY (CIM) MEMORY ARRAY
- Publication number 20240347101
- Publication date Oct 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yen-An Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD THEREOF
- Publication number 20240347103
- Publication date Oct 17, 2024
- WINBOND ELECTRONICS CORP.
- Ying-Te Tu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT
- Publication number 20240349481
- Publication date Oct 17, 2024
- Unisantis Electronics Singapore PTE Ltd.
- Nozomu HARADA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING
- Publication number 20240345971
- Publication date Oct 17, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Filling Out The Space Of RAID Format Changes During Drive Capacity...
- Publication number 20240338141
- Publication date Oct 10, 2024
- PURE STORAGE, INC.
- ANDREW BERNAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Sense Amplifier Circuit with a Hybrid Architecture
- Publication number 20240339152
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT
- Publication number 20240339154
- Publication date Oct 10, 2024
- Unisantis Electronics Singapore PTE Ltd.
- Nozomu HARADA
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED SEMICONDUCTOR DEVICE
- Publication number 20240339438
- Publication date Oct 10, 2024
- SK HYNIX INC.
- Jae Hyung PARK
- G11 - INFORMATION STORAGE

Input/output (I/O) data management or control circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method of operating an integrated circuit and integrated circuit

High-bandwidth DDR DIMM, memory system, and operation method thereof

Implementing fault isolation in dram

Memory system and refresh method

Systems, methods and media of optimization of temporary read errors...

Method and apparatus for calibrating write timing in a memory system

Multinary bit cells for memory devices and network applications and...

Word line booster circuit and method

Memory device

Memory module with reduced read/write turnaround overhead

Three dimension memory device capable of improving sensing accuracy...

Memory module, memory system, and operation method of memory contro...

Semiconductor apparatus and semiconductor memory apparatus

Semiconductor memory device

Multi-rail power transition

Memory devices and methods for controlling row hammer

Memory array layers with alternating sense amplifier layers

Nonvolatile memory device having multi-stack memory block and metho...

Semiconductor memory devices and electronic devices including the s...

Drive circuit, method for driving drive circuit, and memory

Signal synchronization adjustment method and signal synchronization...

Memory controller performing data training, system-on-chip includin...

Memory device using semiconductor element

Memory circuit and word line driver

Vertical transistor fuse latches

Apparatuses and methods for input buffer enable clock synchronization

Memory device for wafer-on-wafer formed memory and logic

Memory device having variable impedance memory cells and time-to-tr...

Signal routing between memory die and logic die for mode based oper...

Memory device through use of semiconductor device

Patents Applicationslast 30 patents

Data Storage Device and Method for Optimized Refresh

SEMICONDUCTOR MODULE FOR PERFORMING ERROR CORRECTION OPERATION

SCALED 2T DRAM

MEMORY DEVICE USING SEMICONDUCTOR ELEMENTS

TWO-STAGE VOLTAGE CALIBRATION UPON POWER-UP OF MEMORY DEVICE

Proactive Usage-Based Disturbance Mitigation based on Resource Avai...

METHOD OF PERFORMING INTERNAL PROCESSING OPERATION OF MEMORY DEVICE

SEMICONDUCTOR DEVICE

BIT LINE SENSE AMPLIFIER AND MEMORY DEVICE INCLUDING THE SAME

DYNAMIC BUFFER LIMIT FOR AT-RISK DATA

Bank-Shared Usage-Based Disturbance Circuitry

SEMICONDUCTOR MEMORY DEVICES

MEMORY CIRCUIT AND WORD LINE DRIVER

SEMICONDUCTOR MEMORY DEVICE, ELECTRONIC DEVICE AND METHOD FOR SETTI...

APPARATUSES AND METHODS FOR COMPUTE ENABLED CACHE

MEMORY DEVICE FOR SELF-SEARCHING FOR BOUNDARY WORD LINE, METHOD FOR...

Voltage Range for Training Physical Memory

RAPID TAG INVALIDATION CIRCUIT

BANK CONFIGURABLE POWER MODES

Usage-Based Disturbance Counter Clearance

MEMORY DEVICE USING SEMICONDUCTOR ELEMENT

Memory Device Comprising an Electrically Floating Body Transistor a...

COMPUTE IN MEMORY (CIM) MEMORY ARRAY

SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD THEREOF

SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT

SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING

Filling Out The Space Of RAID Format Changes During Drive Capacity...

Data Sense Amplifier Circuit with a Hybrid Architecture

SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT

STACKED SEMICONDUCTOR DEVICE