Interconnect testing

Industry

CPC
G01R31/31717

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Parent Industries

GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/31717Interconnect testing

Industries

Patents Grantslast 30 patents

Information Patent Grant
Array of unit cells having pad structures
- Patent number 12,123,909
- Issue date Oct 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Ching Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Board adapter device, test method, system, apparatus, and device, a...
- Patent number 11,933,842
- Issue date Mar 19, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Maosong Ma
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device having micro-bumps and test method thereof
- Patent number 11,568,950
- Issue date Jan 31, 2023
- SK hynix Inc.
- Youngjun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Side-channel signature based PCB authentication using JTAG architec...
- Patent number 11,480,614
- Issue date Oct 25, 2022
- University of Florida Research Foundation, Inc.
- Swarup Bhunia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked semiconductor device and test method thereof
- Patent number 11,456,283
- Issue date Sep 27, 2022
- SK Hynix Inc.
- Sangmuk Oh
- G01 - MEASURING TESTING
Information Patent Grant
Test coverage rate improvement system for pins of tested circuit bo...
- Patent number 11,435,400
- Issue date Sep 6, 2022
- INVENTEC (PUDONG) TECHNOLOGY CORPORATION
- Qiu-Yue Duan
- G01 - MEASURING TESTING
Information Patent Grant
Memory device, memory system including the same and methods of oper...
- Patent number 11,387,154
- Issue date Jul 12, 2022
- SK hynix Inc.
- Sung Lae Oh
- G01 - MEASURING TESTING
Information Patent Grant
High density routing for heterogeneous package integration
- Patent number 11,282,776
- Issue date Mar 22, 2022
- Xilinx, Inc.
- Jaspreet Singh Gandhi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plurality of edge through-silicon vias and related systems, methods...
- Patent number 11,275,111
- Issue date Mar 15, 2022
- Micron Technology, Inc.
- Naohisa Nishioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Thermal abnormality detection system and method
- Patent number 11,118,850
- Issue date Sep 14, 2021
- Delta Electronics, Inc.
- Lei-Chung Hsing
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Grant
Isolation enable test coverage for multiple power domains
- Patent number 11,119,153
- Issue date Sep 14, 2021
- STMICROELECTRONICS INTERNATIONAL N.V.
- Venkata Narayanan Srinivasan
- G01 - MEASURING TESTING
Information Patent Grant
Monitoring accesses to a region of an integrated circuit chip
- Patent number 10,866,279
- Issue date Dec 15, 2020
- UltraSoc Technologies Limited
- Gajinder Singh Panesar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 10,855,413
- Issue date Dec 1, 2020
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for determining performance characteristics of electronic...
- Patent number 10,782,344
- Issue date Sep 22, 2020
- RAMBUS INC.
- Haw-Jyh Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Automatic device detection and connection verification
- Patent number 10,782,348
- Issue date Sep 22, 2020
- KEITHLEY INSTRUMENTS, LLC
- Gregory Sobolewski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Failure detection for wire bonding in semiconductors
- Patent number 10,656,204
- Issue date May 19, 2020
- PDF Solutions, Inc.
- Brian Stine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying lane errors using a pseudo-random binary sequence
- Patent number 10,605,860
- Issue date Mar 31, 2020
- CREDO TECHNOLOGY GROUP LIMITED
- Zhongnan Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Inspection circuit, semiconductor storage element, semiconductor de...
- Patent number 10,574,238
- Issue date Feb 25, 2020
- Lapis Semiconductor Co., Ltd.
- Michiaki Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Test network for a network on a chip and a configuration network
- Patent number 10,502,785
- Issue date Dec 10, 2019
- Xilinx, Inc.
- Rafael C. Camarota
- G01 - MEASURING TESTING
Information Patent Grant
Method for testing inter-layer connections
- Patent number 10,267,840
- Issue date Apr 23, 2019
- Semiconductor Manufacturing International (Beijing) Corporation
- Zhenghao Gan
- G01 - MEASURING TESTING
Information Patent Grant
Method for detecting the topology of electrical wiring
- Patent number 10,224,930
- Issue date Mar 5, 2019
- dspace digital signal processing and control engineering GmbH
- Dominik Lubeley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device
- Patent number 10,175,293
- Issue date Jan 8, 2019
- SK Hynix Inc.
- Byung-Deuk Jeon
- G11 - INFORMATION STORAGE
Information Patent Grant
Through-substrate via (TSV) testing
- Patent number 9,929,064
- Issue date Mar 27, 2018
- Micron Technology, Inc.
- Venkatraghavan Bringivijayaraghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for determining a condition of pin connection of the integra...
- Patent number 9,857,420
- Issue date Jan 2, 2018
- AU Optronics Corp.
- Chun-Kuei Wen
- G01 - MEASURING TESTING
Information Patent Grant
Method for testing through silicon vias in 3D integrated circuits
- Patent number 9,784,790
- Issue date Oct 10, 2017
- International Business Machines Corporation
- Raphael P. Robertazzi
- G01 - MEASURING TESTING
Information Patent Grant
Method and circuit of pulse-vanishing test
- Patent number 9,720,038
- Issue date Aug 1, 2017
- Mentor Graphics, A Siemens Business
- Shi-Yu Huang
- G01 - MEASURING TESTING
Information Patent Grant
Test circuit and method for semiconductor device
- Patent number 9,702,931
- Issue date Jul 11, 2017
- SK Hynix Inc.
- Dong-Uk Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed interconnect circuit test method and apparatus
- Patent number 9,684,032
- Issue date Jun 20, 2017
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for interconnect test
- Patent number 9,625,523
- Issue date Apr 18, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Sandeep Kumar Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing through silicon vias in 3D integrated circuits
- Patent number 9,588,174
- Issue date Mar 7, 2017
- International Business Machines Corporation
- Raphael Peter Robertazzi
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
ARRAY OF UNIT CELLS HAVING PAD STRUCTURES
- Publication number 20240369626
- Publication date Nov 7, 2024
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Yu-Ching CHIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT TESTING
- Publication number 20240175919
- Publication date May 30, 2024
- TouchNetix AS
- Steinar MYREN
- G01 - MEASURING TESTING
Information Patent Application
TEST AND REPAIR OF INTERCONNECTS BETWEEN CHIPS
- Publication number 20240027516
- Publication date Jan 25, 2024
- Sreejit Chakravarty
- G01 - MEASURING TESTING
Information Patent Application
Array of Unit Cells Having Pad Structures
- Publication number 20230333158
- Publication date Oct 19, 2023
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Yu-Ching Chiu
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FAILURE ANALYSIS FOR SEMICONDUCT...
- Publication number 20230243888
- Publication date Aug 3, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Wei PENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOARD ADAPTER DEVICE, TEST METHOD, SYSTEM, APPARATUS, AND DEVICE, A...
- Publication number 20230134661
- Publication date May 4, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Maosong MA
- G01 - MEASURING TESTING
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND METHODS OF OPER...
- Publication number 20210257266
- Publication date Aug 19, 2021
- SK hynix Inc.
- Sung Lae OH
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE HAVING MICRO-BUMPS AND TEST METHOD THEREOF
- Publication number 20210231732
- Publication date Jul 29, 2021
- SK HYNIX INC.
- Youngjun PARK
- G01 - MEASURING TESTING
Information Patent Application
STACKED SEMICONDUCTOR DEVICE AND TEST METHOD THEREOF
- Publication number 20210193623
- Publication date Jun 24, 2021
- SK hynix Inc.
- Sangmuk OH
- G01 - MEASURING TESTING
Information Patent Application
SIDE-CHANNEL SIGNATURE BASED PCB AUTHENTICATION USING JTAG ARCHITEC...
- Publication number 20210148977
- Publication date May 20, 2021
- University of Florida Research Foundation, Inc.
- SWARUP BHUNIA
- G01 - MEASURING TESTING
Information Patent Application
PLURALITY OF EDGE THROUGH-SILICON VIAS AND RELATED SYSTEMS, METHODS...
- Publication number 20210088586
- Publication date Mar 25, 2021
- Micron Technology, Inc.
- Naohisa Nishioka
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR WAFER
- Publication number 20200174074
- Publication date Jun 4, 2020
- Hamamatsu Photonics K.K.
- Motohiro SUYAMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MONITORING ACCESSES TO A REGION OF AN INTEGRATED CIRCUIT CHIP
- Publication number 20190277912
- Publication date Sep 12, 2019
- UltraSoC Technologies Limited
- Gajinder Singh Panesar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH DENSITY ROUTING FOR HETEROGENEOUS PACKAGE INTEGRATION
- Publication number 20190259695
- Publication date Aug 22, 2019
- Xilinx, Inc.
- Jaspreet Singh Gandhi
- G01 - MEASURING TESTING
Information Patent Application
FAILURE DETECTION FOR WIRE BONDING IN SEMICONDUCTORS
- Publication number 20190146032
- Publication date May 16, 2019
- PDF Solutions, Inc.
- Brian Stine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for Determining Performance Characteristics Of Electronic...
- Publication number 20180335477
- Publication date Nov 22, 2018
- RAMBUS INC.
- Haw-Jyh Liaw
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD FOR DETECTING THE TOPOLOGY OF ELECTRICAL WIRING
- Publication number 20180323784
- Publication date Nov 8, 2018
- dSpace digital signal processing and control engineering GmbH
- Dominik Lubeley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Automatic Device Detection and Connection Verification
- Publication number 20180259579
- Publication date Sep 13, 2018
- KEITHLEY INSTRUMENTS, LLC
- Gregory Sobolewski
- G01 - MEASURING TESTING
Information Patent Application
TEST DEVICE
- Publication number 20170343604
- Publication date Nov 30, 2017
- FU TAI HUA INDUSTRY (SHENZHEN) CO., LTD.
- KANG-XIAN YANG
- G01 - MEASURING TESTING
Information Patent Application
HIGH SPEED INTERCONNECT CIRCUIT TEST METHOD AND APPARATUS
- Publication number 20170074933
- Publication date Mar 16, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR INTERCONNECT TEST
- Publication number 20160259006
- Publication date Sep 8, 2016
- Taiwan Semiconductor Manufacturing Co., LTD
- Sandeep Kumar Goel
- G01 - MEASURING TESTING
Information Patent Application
TEST CIRCUIT AND METHOD FOR SEMICONDUCTOR DEVICE
- Publication number 20140368224
- Publication date Dec 18, 2014
- SK HYNIX INC.
- Dong-Uk LEE
- G01 - MEASURING TESTING
Information Patent Application
Method and Circuit Of Pulse-Vanishing Test
- Publication number 20140347088
- Publication date Nov 27, 2014
- Mentor Graphics Corporation
- Shi-Yu Huang
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR INTERCONNECT TEST
- Publication number 20140281773
- Publication date Sep 18, 2014
- Taiwan Semiconductor Manufacturing Co., LTD
- Sandeep Kumar Goel
- G01 - MEASURING TESTING
Information Patent Application
DAISY CHAIN CONNECTION FOR TESTING CONTINUITY IN A SEMICONDUCTOR DIE
- Publication number 20140264331
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Hongjun Yao
- G01 - MEASURING TESTING
Information Patent Application
PRBS TEST MEMORY INTERFACE CONSIDERING DDR BURST OPERATION
- Publication number 20140122955
- Publication date May 1, 2014
- FutureWei Technologies, Inc.
- Zhiyuan Wang
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF TESTING A SEMICONDUCTOR STRUCTURE
- Publication number 20140091819
- Publication date Apr 3, 2014
- Xilinx, Inc.
- Yuqing Gong
- G01 - MEASURING TESTING
Information Patent Application
Technique for Determining Performance Characteristics Of Electronic...
- Publication number 20140070819
- Publication date Mar 13, 2014
- Haw-Jyh Liaw
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT TEST SYSTEM AND CIRCUIT TEST METHOD THEREOF
- Publication number 20140046616
- Publication date Feb 13, 2014
- NANYA TECHNOLOGY CORPORATION
- Wen-Chang Cheng
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR TESTING I/O BOUNDARY SCAN CHAIN FOR SOC'S...
- Publication number 20130346816
- Publication date Dec 26, 2013
- Sankaran M. Menon
- G01 - MEASURING TESTING

Interconnect testing

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Array of unit cells having pad structures

Board adapter device, test method, system, apparatus, and device, a...

Semiconductor device having micro-bumps and test method thereof

Side-channel signature based PCB authentication using JTAG architec...

Stacked semiconductor device and test method thereof

Test coverage rate improvement system for pins of tested circuit bo...

Memory device, memory system including the same and methods of oper...

High density routing for heterogeneous package integration

Plurality of edge through-silicon vias and related systems, methods...

Thermal abnormality detection system and method

Isolation enable test coverage for multiple power domains

Monitoring accesses to a region of an integrated circuit chip

Method and apparatus for evaluating and optimizing a signaling system

Technique for determining performance characteristics of electronic...

Automatic device detection and connection verification

Failure detection for wire bonding in semiconductors

Identifying lane errors using a pseudo-random binary sequence

Inspection circuit, semiconductor storage element, semiconductor de...

Test network for a network on a chip and a configuration network

Method for testing inter-layer connections

Method for detecting the topology of electrical wiring

Semiconductor device

Through-substrate via (TSV) testing

Method for determining a condition of pin connection of the integra...

Method for testing through silicon vias in 3D integrated circuits

Method and circuit of pulse-vanishing test

Test circuit and method for semiconductor device

High speed interconnect circuit test method and apparatus

Method and apparatus for interconnect test

Method for testing through silicon vias in 3D integrated circuits

Patents Applicationslast 30 patents

ARRAY OF UNIT CELLS HAVING PAD STRUCTURES

INTEGRATED CIRCUIT TESTING

TEST AND REPAIR OF INTERCONNECTS BETWEEN CHIPS

Array of Unit Cells Having Pad Structures

SEMICONDUCTOR DEVICE AND METHOD OF FAILURE ANALYSIS FOR SEMICONDUCT...

BOARD ADAPTER DEVICE, TEST METHOD, SYSTEM, APPARATUS, AND DEVICE, A...

MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND METHODS OF OPER...

SEMICONDUCTOR DEVICE HAVING MICRO-BUMPS AND TEST METHOD THEREOF

STACKED SEMICONDUCTOR DEVICE AND TEST METHOD THEREOF

SIDE-CHANNEL SIGNATURE BASED PCB AUTHENTICATION USING JTAG ARCHITEC...

PLURALITY OF EDGE THROUGH-SILICON VIAS AND RELATED SYSTEMS, METHODS...

SEMICONDUCTOR WAFER

MONITORING ACCESSES TO A REGION OF AN INTEGRATED CIRCUIT CHIP

HIGH DENSITY ROUTING FOR HETEROGENEOUS PACKAGE INTEGRATION

FAILURE DETECTION FOR WIRE BONDING IN SEMICONDUCTORS

Technique for Determining Performance Characteristics Of Electronic...

METHOD FOR DETECTING THE TOPOLOGY OF ELECTRICAL WIRING

Automatic Device Detection and Connection Verification

TEST DEVICE

HIGH SPEED INTERCONNECT CIRCUIT TEST METHOD AND APPARATUS

METHOD AND APPARATUS FOR INTERCONNECT TEST

TEST CIRCUIT AND METHOD FOR SEMICONDUCTOR DEVICE

Method and Circuit Of Pulse-Vanishing Test

METHOD AND APPARATUS FOR INTERCONNECT TEST

DAISY CHAIN CONNECTION FOR TESTING CONTINUITY IN A SEMICONDUCTOR DIE

PRBS TEST MEMORY INTERFACE CONSIDERING DDR BURST OPERATION

METHOD OF TESTING A SEMICONDUCTOR STRUCTURE

Technique for Determining Performance Characteristics Of Electronic...

CIRCUIT TEST SYSTEM AND CIRCUIT TEST METHOD THEREOF

METHOD AND APPARATUS FOR TESTING I/O BOUNDARY SCAN CHAIN FOR SOC'S...