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Y10S706/921

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S706/00Data processing: artificial intelligence

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Patents Grantslast 30 patents

Information Patent Grant
Camera layout determination support device
- Patent number 8,817,102
- Issue date Aug 26, 2014
- Hitachi, Ltd.
- Takashi Saeki
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method for solving the binary minimization problem and a variant th...
- Patent number 7,337,154
- Issue date Feb 26, 2008
- Raytheon Company
- Steven J Manson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip management system
- Patent number 7,024,636
- Issue date Apr 4, 2006
- LSI Logic Corporation
- Dan Weed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automation of the development, testing, and release of a flow frame...
- Patent number 7,020,852
- Issue date Mar 28, 2006
- LSI Logic Corporation
- Bret Alan Oeltjen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of interactive optimization in circuit design
- Patent number 6,968,517
- Issue date Nov 22, 2005
- Synopsys Inc.
- Trent Lorne McConaghy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for control of cryptography implementations in third part...
- Patent number 6,751,735
- Issue date Jun 15, 2004
- Novell, Inc.
- Roger R. Schell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for automatic synthesis, placement and routing...
- Patent number 6,424,959
- Issue date Jul 23, 2002
- Forrest H. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simulation tool input file generator for interface circuitry
- Patent number 6,292,766
- Issue date Sep 18, 2001
- VLSI Technology, Inc.
- Derwin Mattos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for demonstrating compliance with standards
- Patent number 6,283,759
- Issue date Sep 4, 2001
- James R. Price
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
LSI design automation system
- Patent number 5,892,678
- Issue date Apr 6, 1999
- Matsushita Electric Industrial Co., Ltd.
- Seiji Tokunoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for making electronic circuit design data and CAD system usi...
- Patent number 5,856,925
- Issue date Jan 5, 1999
- Fujitsu Limited
- Sumiko Maeda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with neighborhood system dri...
- Patent number 5,812,740
- Issue date Sep 22, 1998
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Expert system development support system and expert system environm...
- Patent number 5,506,938
- Issue date Apr 9, 1996
- Hitachi, Ltd.
- Chihiro Fukui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic interface layout generator for database systems
- Patent number 5,495,567
- Issue date Feb 27, 1996
- Ricoh Company Ltd.
- Atsushi Iizawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit design support system and circuit producing method
- Patent number 5,416,718
- Issue date May 16, 1995
- Fujitsu Limited
- Masami Yamazaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Expert system development support system and expert system environm...
- Patent number 5,359,701
- Issue date Oct 25, 1994
- Hitachi, Ltd.
- Chihiro Fukui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic interface layout generator for database systems
- Patent number 5,353,401
- Issue date Oct 4, 1994
- Ricoh Company, Ltd.
- Atsushi Iizawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Utility layout design system
- Patent number 5,329,464
- Issue date Jul 12, 1994
- Puget Sound Power and Light Company
- Zarko Sumic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rule based floorplanner
- Patent number 5,311,443
- Issue date May 10, 1994
- Motorola Inc.
- Steven L. Crain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for designing configuration with design elements characteriz...
- Patent number 5,267,146
- Issue date Nov 30, 1993
- Nissan Motor Co., Ltd.
- Yoji Shimizu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Expert system development support system and expert system environm...
- Patent number 5,228,117
- Issue date Jul 13, 1993
- Hitachi, Ltd.
- Chihiro Fukui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for implementing a PC computer configuration system for asse...
- Patent number 5,225,987
- Issue date Jul 6, 1993
- Westinghouse Electric Corp.
- Timothy F. Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Procedure and data structure for synthesis and transformation of lo...
- Patent number 5,212,650
- Issue date May 18, 1993
- Digital Equipment Corporation
- Donald F. Hooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rule base processing system and rule evaluation control method therein
- Patent number 5,204,939
- Issue date Apr 20, 1993
- Fujitsu Limited
- Masami Yamazaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placement optimizing method/apparatus and apparatus for designing s...
- Patent number 5,200,908
- Issue date Apr 6, 1993
- Hitachi, Ltd.
- Hiroshi Date
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of resolution for rule conflict in a knowledge based system
- Patent number 5,197,116
- Issue date Mar 23, 1993
- Hitachi, Ltd.
- Naoki Katoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rule structure in a procedure for synthesis of logic circuits
- Patent number 5,175,696
- Issue date Dec 29, 1992
- Digital Equipment Corporation
- Donald F. Hooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of minimizing sum-of-product cases in a heterogeneous data b...
- Patent number 5,151,867
- Issue date Sep 29, 1992
- Digital Equipment Corporation
- Donald F. Hooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parameter and rule creation and modification mechanism for use by a...
- Patent number 5,150,308
- Issue date Sep 22, 1992
- Digital Equipment Corporation
- Donald F. Hooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic design system for creating circuit configuration by generatin...
- Patent number 5,146,583
- Issue date Sep 8, 1992
- Matsushita Electric Industrial Co., Ltd.
- Masahiko Matsunaka
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CAMERA LAYOUT DETERMINATION SUPPORT DEVICE
- Publication number 20110317016
- Publication date Dec 29, 2011
- Takashi SAEKI
- G05 - CONTROLLING REGULATING
Information Patent Application
Method for solving the binary minimization problem and a variant th...
- Publication number 20040249772
- Publication date Dec 9, 2004
- Raytheon Company
- Steven J. Manson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automation of the development, testing, and release of a flow frame...
- Publication number 20040225972
- Publication date Nov 11, 2004
- LSI Logic Corporation
- Bret Alan Oeltjen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rapid chip management system
- Publication number 20040098689
- Publication date May 20, 2004
- Dan Weed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of interactive optimization in circuit design
- Publication number 20030093763
- Publication date May 15, 2003
- Analog Design Automation Inc.
- Trent Lorne McConaghy
- G06 - COMPUTING CALCULATING COUNTING

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Camera layout determination support device

Method for solving the binary minimization problem and a variant th...

Chip management system

Automation of the development, testing, and release of a flow frame...

Method of interactive optimization in circuit design

Apparatus for control of cryptography implementations in third part...

Method and apparatus for automatic synthesis, placement and routing...

Simulation tool input file generator for interface circuitry

System for demonstrating compliance with standards

LSI design automation system

Method for making electronic circuit design data and CAD system usi...

Advanced modular cell placement system with neighborhood system dri...

Expert system development support system and expert system environm...

Automatic interface layout generator for database systems

Circuit design support system and circuit producing method

Expert system development support system and expert system environm...

Automatic interface layout generator for database systems

Utility layout design system

Rule based floorplanner

System for designing configuration with design elements characteriz...

Expert system development support system and expert system environm...

System for implementing a PC computer configuration system for asse...

Procedure and data structure for synthesis and transformation of lo...

Rule base processing system and rule evaluation control method therein

Placement optimizing method/apparatus and apparatus for designing s...

Method of resolution for rule conflict in a knowledge based system

Rule structure in a procedure for synthesis of logic circuits

Method of minimizing sum-of-product cases in a heterogeneous data b...

Parameter and rule creation and modification mechanism for use by a...

Logic design system for creating circuit configuration by generatin...

Patents Applicationslast 30 patents

CAMERA LAYOUT DETERMINATION SUPPORT DEVICE

Method for solving the binary minimization problem and a variant th...

Automation of the development, testing, and release of a flow frame...

Rapid chip management system

Method of interactive optimization in circuit design