Marginal testing

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CPC
G11C29/50

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/50Marginal testing

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Memory and its erase verification method, operation method, and a m...
- Patent number 12,272,411
- Issue date Apr 8, 2025
- Yangtze Memory Technologies Co., Ltd.
- Chong Jing
- G11 - INFORMATION STORAGE
Information Patent Grant
Performing select gate integrity checks to identify and invalidate...
- Patent number 12,272,418
- Issue date Apr 8, 2025
- Micron Technology, Inc.
- Zhongguang Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Row access strobe (RAS) clobber and row hammer failures using a det...
- Patent number 12,265,630
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test board
- Patent number 12,266,416
- Issue date Apr 1, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Huipeng Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Power supply circuit, memory, testing device, memory system, and el...
- Patent number 12,254,917
- Issue date Mar 18, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yu Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Control method, semiconductor memory, and electronic device
- Patent number 12,254,942
- Issue date Mar 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yoonjoo Eom
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal detection system for duty cycle testing and memory detection...
- Patent number 12,254,943
- Issue date Mar 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jianyong Qin
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-zone temperature testing system
- Patent number 12,249,387
- Issue date Mar 11, 2025
- Dell Products L.P.
- Robert Proulx
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device and operating method of controller
- Patent number 12,248,683
- Issue date Mar 11, 2025
- SK Hynix Inc.
- Sang Ho Yun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and memory device with increased read and write margin
- Patent number 12,243,608
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hung-Chang Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory octo mode program and erase operation method wi...
- Patent number 12,243,609
- Issue date Mar 4, 2025
- SK keyfoundry Inc.
- Weon-Hwa Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and retention test method
- Patent number 12,237,035
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Myeongjin Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 12,237,021
- Issue date Feb 25, 2025
- Kioxia Corporation
- Takashi Nakagawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Imprint management for memory
- Patent number 12,230,349
- Issue date Feb 18, 2025
- Micron Technology, Inc.
- Shashank Bangalore Lakshman
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point memory read technique to mitigate drift errors
- Patent number 12,230,346
- Issue date Feb 18, 2025
- Intel Corporation
- Hemant P. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor chip and sequence checking circuit
- Patent number 12,224,028
- Issue date Feb 11, 2025
- Global Unichip Corporation
- Shih-Cheng Kao
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with leakage current verifying circuit for minimizing...
- Patent number 12,224,021
- Issue date Feb 11, 2025
- Winbond Electronics Corp.
- Koying Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
TSV check circuit with replica path
- Patent number 12,224,275
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Harutaka Makabe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array test structure and method of forming the same
- Patent number 12,217,826
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Meng-Han Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Determine optimized read voltage via identification of distribution...
- Patent number 12,217,803
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- AbdelHakim S. Alhussien
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory system, and operation method of memory device
- Patent number 12,211,581
- Issue date Jan 28, 2025
- Samsung Electronics Co., Ltd.
- Donghun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for testing inaccessible interface circuits i...
- Patent number 12,196,805
- Issue date Jan 14, 2025
- RAMBUS INC.
- Frederick A. Ware
- G01 - MEASURING TESTING
Information Patent Grant
Read window management in a memory system
- Patent number 12,198,777
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Li-Te Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Imprint recovery for memory arrays
- Patent number 12,190,947
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Jonathan J. Strand
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device performing sensing operation and method of operating...
- Patent number 12,190,973
- Issue date Jan 7, 2025
- SK Hynix Inc.
- Se Chun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM retention test method for dynamic error correction
- Patent number 12,190,974
- Issue date Jan 7, 2025
- RAMBUS INC.
- Ely Tsern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory apparatus and testing method thereof
- Patent number 12,190,980
- Issue date Jan 7, 2025
- Winbond Electronics Corp.
- Shao-Ching Liao
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for identifying memory devices of a semicon...
- Patent number 12,184,280
- Issue date Dec 31, 2024
- Dean Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wordline system architecture supporting erase operation and I-V cha...
- Patent number 12,176,053
- Issue date Dec 24, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Ramesh Raghavan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
READ WINDOW MANAGEMENT IN A MEMORY SYSTEM
- Publication number 20250111886
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Li-Te Chang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING...
- Publication number 20250104751
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- Byongmo MOON
- G11 - INFORMATION STORAGE
Information Patent Application
SCAN-BASED VOLTAGE FREQUENCY SCALING
- Publication number 20250104794
- Publication date Mar 27, 2025
- Micron Technology, Inc.
- Leon Zlotnik
- G11 - INFORMATION STORAGE
Information Patent Application
TEST APPARATUS AND TEST METHOD
- Publication number 20250095763
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Michiru HOGYOKU
- G11 - INFORMATION STORAGE
Information Patent Application
OPTIMIZING VOLTAGE TUNING USING PRIOR VOLTAGE TUNING RESULTS
- Publication number 20250086062
- Publication date Mar 13, 2025
- PURE STORAGE, INC.
- Hari Kannan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...
- Publication number 20250070782
- Publication date Feb 27, 2025
- Lodestar Licensing Group LLC
- Dean Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPRINT RECOVERY FOR MEMORY CELLS
- Publication number 20250054560
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Jonathan D. Harms
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING-DRIFT CALIBRATION
- Publication number 20250054561
- Publication date Feb 13, 2025
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION FOR PROGRAMMING SINGLE LEVEL CELLS
- Publication number 20250044953
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G01 - MEASURING TESTING
Information Patent Application
DEVICE AND METHOD FOR TESTING MEMORY
- Publication number 20250022531
- Publication date Jan 16, 2025
- HPROBE
- Quentin STAINER
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250022504
- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- YOON-JOO EOM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE MEMORY DEVICE, AND TEST...
- Publication number 20250014669
- Publication date Jan 9, 2025
- SK HYNIX INC.
- Jun Hyuk LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR PERFORMING BAD BLOCK CHECK, METHOD OF OPERATING M...
- Publication number 20250014668
- Publication date Jan 9, 2025
- SK HYNIX INC.
- Sung Hwa HONG
- G11 - INFORMATION STORAGE
Information Patent Application
HOST APPARATUS AND EXTENSION DEVICE
- Publication number 20240428843
- Publication date Dec 26, 2024
- KIOXIA Corporation
- Akihisa FUJIMOTO
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY
- Publication number 20240420794
- Publication date Dec 19, 2024
- Samsung Electronics Co., Ltd.
- Youhwan Kim
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH ADJUSTABLE RAMP RATE
- Publication number 20240412804
- Publication date Dec 12, 2024
- Western Digital Technologies, Inc.
- Sai Gautham Thoppa
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Comprising Electrically Floating Body Transistor
- Publication number 20240404585
- Publication date Dec 5, 2024
- Zeno Semiconductor, Inc.
- Jin-Woo Han
- G11 - INFORMATION STORAGE
Information Patent Application
DATA CLUSTERING SYSTEM AND READ VOLTAGE DETERMINATION APPARATUS FOR...
- Publication number 20240404618
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Jae Yong SON
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLIER BASED DEVICE DEGRADATION READOUT CIRCUIT
- Publication number 20240386941
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Zhi Qi Huang
- G11 - INFORMATION STORAGE
Information Patent Application
READ VOLTAGE CALIBRATION METHOD, MEMORY STORAGE DEVICE AND MEMORY C...
- Publication number 20240377972
- Publication date Nov 14, 2024
- PHISON ELECTRONICS CORP.
- Szu-Wei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHARGE LOSS TRACKING THROUGH TARGETED BIT COUNT
- Publication number 20240363188
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Steven Michael Kientz
- G11 - INFORMATION STORAGE
Information Patent Application
READ PASS VOLTAGE ADJUSTMENT AMONG MULTIPLE ERASE BLOCKS COUPLED TO...
- Publication number 20240347126
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE DOMAIN BASED ERROR MANAGEMENT
- Publication number 20240321380
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Leon Zlotnik
- G11 - INFORMATION STORAGE
Information Patent Application
VARYING-POLARITY READ OPERATIONS FOR POLARITY-WRITTEN MEMORY CELLS
- Publication number 20240312518
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-VOLTAGE RAM USED TO CROSS CLOCK AND VOLTAGE DOMAINS
- Publication number 20240296875
- Publication date Sep 5, 2024
- NVIDIA Corporation
- Jason Golbus
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH DUAL INTERFACE, TEST METHOD AND TEST SYSTEM THEREOF
- Publication number 20240296900
- Publication date Sep 5, 2024
- SILICON MOTION, INC.
- Hsu-Ping OU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Calibration and Margin Check
- Publication number 20240295976
- Publication date Sep 5, 2024
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICES PROVIDING TEST MODE RELATED TO RELIABILITY
- Publication number 20240282350
- Publication date Aug 22, 2024
- SK HYNIX INC.
- Yun Suk HONG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY APPARATUS AND TESTING METHOD THEREOF
- Publication number 20240282397
- Publication date Aug 22, 2024
- WINBOND ELECTRONICS CORP.
- Shao-Ching Liao
- G11 - INFORMATION STORAGE
Information Patent Application
Method And System For Estimating And Compensating For Leakage Curre...
- Publication number 20240282398
- Publication date Aug 22, 2024
- Meta Platforms Technologies, LLC
- Umanath Ramachandra Kamath
- G11 - INFORMATION STORAGE

Marginal testing

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory and its erase verification method, operation method, and a m...

Performing select gate integrity checks to identify and invalidate...

Row access strobe (RAS) clobber and row hammer failures using a det...

Test board

Power supply circuit, memory, testing device, memory system, and el...

Control method, semiconductor memory, and electronic device

Signal detection system for duty cycle testing and memory detection...

Multi-zone temperature testing system

Storage device and operating method of controller

Method and memory device with increased read and write margin

Non-volatile memory octo mode program and erase operation method wi...

Semiconductor device and retention test method

Memory system

Imprint management for memory

Cross-point memory read technique to mitigate drift errors

Semiconductor chip and sequence checking circuit

Memory device with leakage current verifying circuit for minimizing...

TSV check circuit with replica path

Memory device for supporting command bus training mode and method o...

Memory array test structure and method of forming the same

Determine optimized read voltage via identification of distribution...

Memory device, memory system, and operation method of memory device

Methods and apparatus for testing inaccessible interface circuits i...

Read window management in a memory system

Imprint recovery for memory arrays

Memory device performing sensing operation and method of operating...

DRAM retention test method for dynamic error correction

Semiconductor memory apparatus and testing method thereof

Apparatuses and methods for identifying memory devices of a semicon...

Wordline system architecture supporting erase operation and I-V cha...

Patents Applicationslast 30 patents

READ WINDOW MANAGEMENT IN A MEMORY SYSTEM

MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING...

SCAN-BASED VOLTAGE FREQUENCY SCALING

TEST APPARATUS AND TEST METHOD

OPTIMIZING VOLTAGE TUNING USING PRIOR VOLTAGE TUNING RESULTS

APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...

IMPRINT RECOVERY FOR MEMORY CELLS

TIMING-DRIFT CALIBRATION

ERROR DETECTION FOR PROGRAMMING SINGLE LEVEL CELLS

DEVICE AND METHOD FOR TESTING MEMORY

MEMORY DEVICE AND OPERATION METHOD THEREOF

MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE MEMORY DEVICE, AND TEST...

MEMORY DEVICE FOR PERFORMING BAD BLOCK CHECK, METHOD OF OPERATING M...

HOST APPARATUS AND EXTENSION DEVICE

NON-VOLATILE MEMORY

NON-VOLATILE MEMORY WITH ADJUSTABLE RAMP RATE

Memory Device Comprising Electrically Floating Body Transistor

DATA CLUSTERING SYSTEM AND READ VOLTAGE DETERMINATION APPARATUS FOR...

MULTIPLIER BASED DEVICE DEGRADATION READOUT CIRCUIT

READ VOLTAGE CALIBRATION METHOD, MEMORY STORAGE DEVICE AND MEMORY C...

CHARGE LOSS TRACKING THROUGH TARGETED BIT COUNT

READ PASS VOLTAGE ADJUSTMENT AMONG MULTIPLE ERASE BLOCKS COUPLED TO...

VOLTAGE DOMAIN BASED ERROR MANAGEMENT

VARYING-POLARITY READ OPERATIONS FOR POLARITY-WRITTEN MEMORY CELLS

MULTI-VOLTAGE RAM USED TO CROSS CLOCK AND VOLTAGE DOMAINS

MEMORY DEVICE WITH DUAL INTERFACE, TEST METHOD AND TEST SYSTEM THEREOF

Memory Calibration and Margin Check

SEMICONDUCTOR DEVICES PROVIDING TEST MODE RELATED TO RELIABILITY

SEMICONDUCTOR MEMORY APPARATUS AND TESTING METHOD THEREOF

Method And System For Estimating And Compensating For Leakage Curre...