Multilevel memory cell with more than one control gate

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CPC
G11C2211/5611

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C2211/5611Multilevel memory cell with more than one control gate

Industries

Patents Grantslast 30 patents

Information Patent Grant
Memory apparatus with gated phase-change memory cells
- Patent number 9,087,574
- Issue date Jul 21, 2015
- International Business Machines Corporation
- Gael Close
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory apparatus with gated phase-change memory cells
- Patent number 9,076,517
- Issue date Jul 7, 2015
- International Business Machines Corporation
- Gael Close
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device, and its manufacturing method
- Patent number 7,307,879
- Issue date Dec 11, 2007
- Spansion LLC
- Atsushi Yokoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile register and semiconductor device
- Patent number 7,050,332
- Issue date May 23, 2006
- Seiko Epson Corporation
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of manufacturing a multi-level flash EEPROM cell
- Patent number 6,821,850
- Issue date Nov 23, 2004
- Hyundai Electronics Industries Co., Ltd.
- Sang-Hoan Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Multigate semiconductor device with vertical channel current and me...
- Patent number 6,677,204
- Issue date Jan 13, 2004
- Matrix Semiconductor, Inc.
- James M. Cleeves
- G11 - INFORMATION STORAGE
Information Patent Grant
Preventing dielectric thickening over a floating gate area of a tra...
- Patent number 6,630,381
- Issue date Oct 7, 2003
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level flash EEPROM cell and method of manufacture thereof
- Patent number 6,630,709
- Issue date Oct 7, 2003
- Hyundai Electronics Industries Co., Ltd.
- Sang-Hoan Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Multigate semiconductor device with vertical channel current and me...
- Patent number 6,580,124
- Issue date Jun 17, 2003
- Matrix Semiconductor Inc.
- James M. Cleeves
- G11 - INFORMATION STORAGE
Information Patent Grant
Preventing dielectric thickening over a channel area of a split-gat...
- Patent number 6,136,652
- Issue date Oct 24, 2000
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory
- Patent number 5,999,453
- Issue date Dec 7, 1999
- NEC Corporation
- Masato Kawata
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device
- Patent number 5,859,454
- Issue date Jan 12, 1999
- Lg Semicon Co., Ltd.
- Woong Lim Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor circuit
- Patent number 5,784,018
- Issue date Jul 21, 1998
- Ohmi; Tadahiro
- Tadahiro Ohmi
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-valued ROM circuit #7
- Patent number 5,719,520
- Issue date Feb 17, 1998
- Shibata; Tadashi
- Rita Wai-Chi Au
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with isolatable expandable bit lines
- Patent number 5,677,867
- Issue date Oct 14, 1997
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor devices utilizing neuron MOS transistors
- Patent number 5,587,668
- Issue date Dec 24, 1996
- Tadashi Shibata
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
EEPROM cell structure and architecture with increased capacitance a...
- Patent number 5,332,914
- Issue date Jul 26, 1994
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for EEPROM cell structure and architecture with increased c...
- Patent number 5,304,505
- Issue date Apr 19, 1994
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
EEPROM cell structure and architecture with increased capacitance a...
- Patent number 5,303,185
- Issue date Apr 12, 1994
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory circuits and architecture
- Patent number 5,278,785
- Issue date Jan 11, 1994
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
E.sup.2 PROM cell array including single charge emitting means per row
- Patent number 5,247,346
- Issue date Sep 21, 1993
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
EEPROM cell structure and architecture with increased capacitance a...
- Patent number 5,166,904
- Issue date Nov 24, 1992
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for trench-isolated self-aligned split-gate EEPROM transist...
- Patent number 5,162,247
- Issue date Nov 10, 1992
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
EEPROM cell structure and architecture with programming and erase t...
- Patent number 5,099,297
- Issue date Mar 24, 1992
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for EEPROM cell structure and architecture with shared prog...
- Patent number 5,087,583
- Issue date Feb 11, 1992
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
E.sup.2 PROM cell including isolated control diffusion
- Patent number 5,047,814
- Issue date Sep 10, 1991
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
Trench-isolated self-aligned split-gate EEPROM transistor and memor...
- Patent number 5,040,036
- Issue date Aug 13, 1991
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Grant
E.sup.2 prom cell including isolated control diffusion
- Patent number 4,845,538
- Issue date Jul 4, 1989
- Emanuel Hazani
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY APPARATUS WITH GATED PHASE-CHANGE MEMORY CELLS
- Publication number 20130322168
- Publication date Dec 5, 2013
- Gael Close
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY APPARATUS WITH GATED PHASE-CHANGE MEMORY CELLS
- Publication number 20130322166
- Publication date Dec 5, 2013
- International Business Machines Corporation
- Gael Close
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL-GATE MEMORY DEVICE WITH CHANNEL CRYSTALLIZATION FOR MULTIPLE L...
- Publication number 20090191680
- Publication date Jul 30, 2009
- Andrew J. Walker
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL-GATE MEMORY DEVICE WITH CHANNEL CRYSTALLIZATION FOR MULTIPLE L...
- Publication number 20090090913
- Publication date Apr 9, 2009
- Andrew J. Walker
- G11 - INFORMATION STORAGE
Information Patent Application
Nonvolatile memory device, and its manufacturing method
- Publication number 20060114722
- Publication date Jun 1, 2006
- Spansion LLC
- Atsushi Yokoi
- G11 - INFORMATION STORAGE
Information Patent Application
Preventing dielectric thickening over a gate area of a transistor
- Publication number 20040132250
- Publication date Jul 8, 2004
- Emanuel Hazani
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-level flash EEPROM cell and method of manufacture thereof
- Publication number 20040071020
- Publication date Apr 15, 2004
- HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. a corporation of Republic of Korea
- Sang-Hoan Chang
- G11 - INFORMATION STORAGE
Information Patent Application
Nonvolatile register and semiconductor device
- Publication number 20030174558
- Publication date Sep 18, 2003
- SEIKO EPSON CORPORATION
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Application
Multigate semiconductor device with vertical channel current and me...
- Publication number 20030139011
- Publication date Jul 24, 2003
- MATRIX SEMICONDUCTOR, INC.
- James M. Cleeves
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-level flash EEPROM cell and method of manufacture thereof
- Publication number 20010026480
- Publication date Oct 4, 2001
- Sang-Hoan Chang
- G11 - INFORMATION STORAGE

Multilevel memory cell with more than one control gate

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory apparatus with gated phase-change memory cells

Memory apparatus with gated phase-change memory cells

Nonvolatile memory device, and its manufacturing method

Nonvolatile register and semiconductor device

Method of manufacturing a multi-level flash EEPROM cell

Multigate semiconductor device with vertical channel current and me...

Preventing dielectric thickening over a floating gate area of a tra...

Multi-level flash EEPROM cell and method of manufacture thereof

Multigate semiconductor device with vertical channel current and me...

Preventing dielectric thickening over a channel area of a split-gat...

Nonvolatile semiconductor memory

Nonvolatile memory device

Semiconductor circuit

Multi-valued ROM circuit #7

Memory with isolatable expandable bit lines

Semiconductor devices utilizing neuron MOS transistors

EEPROM cell structure and architecture with increased capacitance a...

Process for EEPROM cell structure and architecture with increased c...

EEPROM cell structure and architecture with increased capacitance a...

Non-volatile memory circuits and architecture

E.sup.2 PROM cell array including single charge emitting means per row

EEPROM cell structure and architecture with increased capacitance a...

Process for trench-isolated self-aligned split-gate EEPROM transist...

EEPROM cell structure and architecture with programming and erase t...

Process for EEPROM cell structure and architecture with shared prog...

E.sup.2 PROM cell including isolated control diffusion

Trench-isolated self-aligned split-gate EEPROM transistor and memor...

E.sup.2 prom cell including isolated control diffusion

Patents Applicationslast 30 patents

MEMORY APPARATUS WITH GATED PHASE-CHANGE MEMORY CELLS

MEMORY APPARATUS WITH GATED PHASE-CHANGE MEMORY CELLS

DUAL-GATE MEMORY DEVICE WITH CHANNEL CRYSTALLIZATION FOR MULTIPLE L...

DUAL-GATE MEMORY DEVICE WITH CHANNEL CRYSTALLIZATION FOR MULTIPLE L...

Nonvolatile memory device, and its manufacturing method

Preventing dielectric thickening over a gate area of a transistor

Multi-level flash EEPROM cell and method of manufacture thereof

Nonvolatile register and semiconductor device

Multigate semiconductor device with vertical channel current and me...

Multi-level flash EEPROM cell and method of manufacture thereof