Multiplexers

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G06F2207/4812

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

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G06F2207/4812Multiplexers

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Patents Grantslast 30 patents

Information Patent Grant
Arithmetic device and neural network device
- Patent number 12,093,809
- Issue date Sep 17, 2024
- Kabushiki Kaisha Toshiba
- Takao Marukame
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder circuitry for very large integers
- Patent number 11,662,979
- Issue date May 30, 2023
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefix network-directed addition
- Patent number 11,334,318
- Issue date May 17, 2022
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High radix subset code multiplier architecture
- Patent number 11,010,134
- Issue date May 18, 2021
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software-driven design optimization for fixed-point multiply-accumu...
- Patent number 10,943,039
- Issue date Mar 9, 2021
- Xilinx, Inc.
- Ashish Sirasao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder circuitry for very large integers
- Patent number 10,873,332
- Issue date Dec 22, 2020
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits with specialized processing blocks for performi...
- Patent number 10,649,731
- Issue date May 12, 2020
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data format suitable for fast massively parallel general matrix mul...
- Patent number 10,515,135
- Issue date Dec 24, 2019
- Xilinx, Inc.
- Jindrich Zejda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Radix-4 multiplier partial product generation with improved area an...
- Patent number 10,466,968
- Issue date Nov 5, 2019
- NVIDIA Corp.
- Ilyas Elkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits with specialized processing blocks for performi...
- Patent number 10,140,091
- Issue date Nov 27, 2018
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable multiply accumulate (MAC) circuit
- Patent number 8,433,744
- Issue date Apr 30, 2013
- Altera Corporation
- Aidan Harding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible adder circuits with fast carry chain circuitry
- Patent number 7,746,100
- Issue date Jun 29, 2010
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carry generator based on XOR, and conditional select adder using th...
- Patent number 7,386,583
- Issue date Jun 10, 2008
- Samsung Electronics Co., Ltd.
- Ki-seon Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carry save adders
- Patent number 7,111,033
- Issue date Sep 19, 2006
- STMicroelectronics S.A.
- Sebastien Ferroussat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic structure and circuit for fast carry
- Patent number 6,288,570
- Issue date Sep 11, 2001
- Xilinx, Inc.
- Bernard J. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Look-ahead carry structure with homogeneous CLB structure and pitch...
- Patent number 6,154,053
- Issue date Nov 28, 2000
- Xilinx, Inc.
- Bernard J. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for providing fast conditional sum in a field...
- Patent number 5,898,319
- Issue date Apr 27, 1999
- Xilinx, Inc.
- Bernard J. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Small, fast CMOS 4-2 carry-save adder cell
- Patent number 5,818,747
- Issue date Oct 6, 1998
- Sun Microsystems, Inc.
- Ming G. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic block structure optimized for sum generation
- Patent number 5,724,276
- Issue date Mar 3, 1998
- Xilinx, Inc.
- Jonathan S. Rose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for providing fast propagation of a carry sign...
- Patent number 5,629,886
- Issue date May 13, 1997
- Xilinx, Inc.
- Bernard J. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Absolute value calculation method and circuit
- Patent number 5,546,335
- Issue date Aug 13, 1996
- Goldstar Electron Co., Ltd.
- Yong H. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast carry structure with synchronous input
- Patent number 5,546,018
- Issue date Aug 13, 1996
- Xilinx, Inc.
- Bernard I. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
1-bit adder and multiplier containing a 1-bit adder
- Patent number 5,515,309
- Issue date May 7, 1996
- Thomson Consumer Electronics S.A.
- Joseph C. Y. Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder-based base cell for field programmable gate arrays
- Patent number 5,488,315
- Issue date Jan 30, 1996
- Texas Instruments Incorporated
- Shivaling S. Mahant-Shetti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for fast carry and logic
- Patent number 5,481,206
- Issue date Jan 2, 1996
- Xilinx, Inc.
- Bernard J. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary operator using block select look ahead system which serves a...
- Patent number 5,434,810
- Issue date Jul 18, 1995
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic structure and circuit for fast carry
- Patent number 5,349,250
- Issue date Sep 20, 1994
- Xilinx, Inc.
- Bernard J. New
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application specific exclusive of based logic module architecture f...
- Patent number 5,338,983
- Issue date Aug 16, 1994
- Texas Instruments Incorporated
- Manisha Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexer for use in a full adder having different gate delays
- Patent number 5,233,233
- Issue date Aug 3, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Yoshitsugu Inoue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High order carry multiplexed adder
- Patent number 5,229,959
- Issue date Jul 20, 1993
- The United States of America as represented by the Secretary of the Air Force
- Michael W. Scriber
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLY-ACCUMULATE SUCCESSIVE APPROXIMATION DEVICES AND METHODS
- Publication number 20240223207
- Publication date Jul 4, 2024
- ROBERT BOSCH GmbH
- Kenneth Edward WOJCIECHOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Processing Device Having A Logic Circuit for Calculating a Mod...
- Publication number 20220236948
- Publication date Jul 28, 2022
- eXternSoft GmbH
- Andreas Gieriet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDER CIRCUITRY FOR VERY LARGE INTEGERS
- Publication number 20210075425
- Publication date Mar 11, 2021
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS WITH SPECIALIZED PROCESSING BLOCKS FOR PERFORMI...
- Publication number 20190121614
- Publication date Apr 25, 2019
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Prefix Network-Directed Addition
- Publication number 20190042194
- Publication date Feb 7, 2019
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH RADIX SUBSET CODE MULTIPLIER ARCHITECTURE
- Publication number 20180364981
- Publication date Dec 20, 2018
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS WITH SPECIALIZED PROCESSING BLOCKS FOR PERFORMI...
- Publication number 20180088906
- Publication date Mar 29, 2018
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE ADDER CIRCUITS WITH FAST CARRY CHAIN CIRCUITRY
- Publication number 20090267643
- Publication date Oct 29, 2009
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Carry generator based on XOR, and conditional select adder using th...
- Publication number 20030154229
- Publication date Aug 14, 2003
- SAMSUNG ELECTRONICS CO., LTD.
- Ki-Seon Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Carry save adders
- Publication number 20020038327
- Publication date Mar 28, 2002
- Sebastien Ferroussat
- G06 - COMPUTING CALCULATING COUNTING

Multiplexers

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Arithmetic device and neural network device

Adder circuitry for very large integers

Prefix network-directed addition

High radix subset code multiplier architecture

Software-driven design optimization for fixed-point multiply-accumu...

Adder circuitry for very large integers

Integrated circuits with specialized processing blocks for performi...

Data format suitable for fast massively parallel general matrix mul...

Radix-4 multiplier partial product generation with improved area an...

Integrated circuits with specialized processing blocks for performi...

Programmable multiply accumulate (MAC) circuit

Flexible adder circuits with fast carry chain circuitry

Carry generator based on XOR, and conditional select adder using th...

Carry save adders

Logic structure and circuit for fast carry

Look-ahead carry structure with homogeneous CLB structure and pitch...

Method and structure for providing fast conditional sum in a field...

Small, fast CMOS 4-2 carry-save adder cell

Logic block structure optimized for sum generation

Method and structure for providing fast propagation of a carry sign...

Absolute value calculation method and circuit

Fast carry structure with synchronous input

1-bit adder and multiplier containing a 1-bit adder

Adder-based base cell for field programmable gate arrays

Circuit for fast carry and logic

Binary operator using block select look ahead system which serves a...

Logic structure and circuit for fast carry

Application specific exclusive of based logic module architecture f...

Multiplexer for use in a full adder having different gate delays

High order carry multiplexed adder

Patents Applicationslast 30 patents

MULTIPLY-ACCUMULATE SUCCESSIVE APPROXIMATION DEVICES AND METHODS

Data Processing Device Having A Logic Circuit for Calculating a Mod...

ADDER CIRCUITRY FOR VERY LARGE INTEGERS

INTEGRATED CIRCUITS WITH SPECIALIZED PROCESSING BLOCKS FOR PERFORMI...

Prefix Network-Directed Addition

HIGH RADIX SUBSET CODE MULTIPLIER ARCHITECTURE

INTEGRATED CIRCUITS WITH SPECIALIZED PROCESSING BLOCKS FOR PERFORMI...

FLEXIBLE ADDER CIRCUITS WITH FAST CARRY CHAIN CIRCUITRY

Carry generator based on XOR, and conditional select adder using th...

Carry save adders