Parity-check or generator matrices with non-binary elements

Industry

CPC
H03M13/1171

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Parent Industries

HELECTRICITY H03Electronic circuits H03MCODING DECODING CODE CONVERSION IN GENERAL H03M13/00Coding, decoding or code conversion, for error detection or error correction Coding theory basic assumptions Coding bounds Error probability evaluation methods Channel models Simulation or testing of codes

Current Industry

H03M13/1171Parity-check or generator matrices with non-binary elements

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Iterative error correction in memory systems
- Patent number 12,244,324
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Marco Sforzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic self-correction of message reliability in LDPC codes
- Patent number 12,169,435
- Issue date Dec 17, 2024
- Intel Corporation
- Debarnab Mitra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing device and data processing method
- Patent number 12,126,359
- Issue date Oct 22, 2024
- Saturn Licensing LLC
- Ryoji Ikegaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Iterative error correction in memory systems
- Patent number 11,949,428
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Marco Sforzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data processing device and data processing method
- Patent number 11,711,097
- Issue date Jul 25, 2023
- Saturn Licensing LLC
- Ryoji Ikegaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forward error correction using non-binary low density parity check...
- Patent number 11,632,133
- Issue date Apr 18, 2023
- Cohere Technologies, Inc.
- Vamadevan Namboodiri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Offset value determination in a check node processing unit for mess...
- Patent number 11,545,998
- Issue date Jan 3, 2023
- UNIVERSITE DE BRETAGNE SUD
- Hassan Harb
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transformation of data to non-binary data for storage in non-volati...
- Patent number 11,545,999
- Issue date Jan 3, 2023
- Western Digital Technologies, Inc.
- Richard Leo Galbraith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
LDPC encoding for memory cells with arbitrary number of levels
- Patent number 11,487,611
- Issue date Nov 1, 2022
- Western Digital Technologies, Inc.
- Iouri Oboukhov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable node processing methods and devices for message-passing de...
- Patent number 11,476,870
- Issue date Oct 18, 2022
- Universite de Bretagne Sud
- Emmanuel Boutillon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Vertical layered finite alphabet iterative decoding
- Patent number 11,381,255
- Issue date Jul 5, 2022
- Codelucida, Inc.
- Benedict J. Reynwar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data processing device and data processing method
- Patent number 11,342,936
- Issue date May 24, 2022
- Saturn Licensing LLC
- Ryoji Ikegaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simplified check node processing in non-binary LDPC decoder
- Patent number 11,290,128
- Issue date Mar 29, 2022
- Universite de Bretagne Sud
- Cédric Marchand
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Check node processing methods and devices with insertion sort
- Patent number 11,245,421
- Issue date Feb 8, 2022
- Universite de Bretagne Sud
- Emmanuel Boutillon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and device of selecting base graph of low-density parity-che...
- Patent number 11,190,211
- Issue date Nov 30, 2021
- Datang Mobile Communications Equipment Co., Ltd.
- Di Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Forward error correction using non-binary low density parity check...
- Patent number 11,152,957
- Issue date Oct 19, 2021
- Cohere Technologies, Inc.
- Vamadevan Namboodiri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Simplified, presorted, syndrome-based, extended min-sum (EMS) decod...
- Patent number 11,133,827
- Issue date Sep 28, 2021
- Universite de Bretagne Sud
- Emmanuel Boutillon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hybrid architectures for check node processing of extended min-sum...
- Patent number 11,095,308
- Issue date Aug 17, 2021
- Universite de Bretagne Sud
- Cédric Marchand
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correction decoder and memory system having the same
- Patent number 11,031,952
- Issue date Jun 8, 2021
- SK hynix Inc.
- Dae Sung Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transformation of binary data to non-binary data for storage in non...
- Patent number 10,965,321
- Issue date Mar 30, 2021
- Western Digital Technologies, Inc.
- Richard Leo Galbraith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction device, operating method thereof and electronic de...
- Patent number 10,892,779
- Issue date Jan 12, 2021
- SK Hynix Inc.
- Dae Sung Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction circuit and operating method thereof
- Patent number 10,826,531
- Issue date Nov 3, 2020
- SK hynix Inc.
- Dae Sung Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Coset probability based majority-logic decoding for non-binary LDPC...
- Patent number 10,790,854
- Issue date Sep 29, 2020
- NandEXT Srl
- Emanuele Viterbo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parity check matrix generator, operating method thereof and error c...
- Patent number 10,693,498
- Issue date Jun 23, 2020
- SK Hynix Inc.
- Dae Sung Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing device and data processing method
- Patent number 10,680,650
- Issue date Jun 9, 2020
- Saturn Licensing LLC
- Ryoji Ikegaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting multiple page lengths with unique error correction codin...
- Patent number 10,649,841
- Issue date May 12, 2020
- Alibaba Group Holding Limited
- Shu Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and devices for error correcting codes decoding
- Patent number 10,637,510
- Issue date Apr 28, 2020
- Universite de Bretagne Sud
- Cédric Marchand
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system and method of controlling nonvolatile memory
- Patent number 10,560,122
- Issue date Feb 11, 2020
- TOSHIBA MEMORY CORPORATION
- Yuta Kumano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Elementary check node processing for syndrome computation for non-b...
- Patent number 10,560,120
- Issue date Feb 11, 2020
- Universite de Bretagne Sud
- Cédric Marchand
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correction device and electronic device including the same
- Patent number 10,554,228
- Issue date Feb 4, 2020
- SK Hynix Inc.
- Dae Sung Kim
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
- Publication number 20240413840
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Marco SFORZIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
- Publication number 20230412193
- Publication date Dec 21, 2023
- Saturn Licensing LLC
- Ryoji IKEGAYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
- Publication number 20230231573
- Publication date Jul 20, 2023
- Micron Technology, Inc.
- Marco SFORZIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
- Publication number 20220271775
- Publication date Aug 25, 2022
- Saturn Licensing LLC
- Ryoji IKEGAYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LDPC Encoding For Memory Cells With Arbitrary Number Of Levels
- Publication number 20220107865
- Publication date Apr 7, 2022
- Western Digital Technologies, Inc.
- Iouri OBOUKHOV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FORWARD ERROR CORRECTION USING NON-BINARY LOW DENSITY PARITY CHECK...
- Publication number 20220069844
- Publication date Mar 3, 2022
- COHERE TECHNOLOGIES, INC.
- Vamadevan Namboodiri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OFFSET VALUE DETERMINATION IN A CHECK NODE PROCESSING UNIT FOR MESS...
- Publication number 20220038116
- Publication date Feb 3, 2022
- UNIVERSITE DE BRETAGNE SUD
- Hassan HARB
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CHECK NODE PROCESSING METHODS AND DEVICES WITH INSERTION SORT
- Publication number 20210250047
- Publication date Aug 12, 2021
- UNIVERSITE DE BRETAGNE SUD
- Emmanuel BOUTILLON
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Transformation of Data to Non-Binary Data For Storage in Non-Volati...
- Publication number 20210175903
- Publication date Jun 10, 2021
- Western Digital Technologies, Inc.
- Richard Leo GALBRAITH
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
DYNAMIC SELF-CORRECTION OF MESSAGE RELIABILITY IN LDPC CODES
- Publication number 20210165712
- Publication date Jun 3, 2021
- Intel Corporation
- Debarnab Mitra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE NODE PROCESSING METHODS AND DEVICES FOR MESSAGE-PASSING DE...
- Publication number 20210167799
- Publication date Jun 3, 2021
- UNIVERSITE DE BRETAGNE SUD
- Emmanuel BOUTILLON
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIMPLIFIED CHECK NODE PROCESSING IN NON-BINARY LDPC DECODER
- Publication number 20210143838
- Publication date May 13, 2021
- UNIVERSITE DE BRETAGNE SUD
- Cédric MARCHAND
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CORRECTION DECODER AND MEMORY SYSTEM HAVING THE SAME
- Publication number 20200389186
- Publication date Dec 10, 2020
- SK HYNIX INC.
- Dae Sung Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FORWARD ERROR CORRECTION USING NON-BINARY LOW DENSITY PARITY CHECK...
- Publication number 20200313695
- Publication date Oct 1, 2020
- COHERE TECHNOLOGIES
- Vamadevan Namboodiri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
- Publication number 20200252083
- Publication date Aug 6, 2020
- Saturn Licensing LLC
- Ryoji IKEGAYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COSET PROBABILITY BASED MAJORITY-LOGIC DECODING FOR NON-BINARY LDPC...
- Publication number 20200235753
- Publication date Jul 23, 2020
- NandEXT S.r.l.
- Emanuele Viterbo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HYBRID ARCHITECTURES FOR CHECK NODE PROCESSING OF EXTENDED MIN-SUM...
- Publication number 20200177203
- Publication date Jun 4, 2020
- UNIVERSITE DE BRETAGNE SUD
- Cédric MARCHAND
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIMPLIFIED, PRESORTED, SYNDROME-BASED, EXTENDED MIN-SUM (EMS) DECOD...
- Publication number 20200127683
- Publication date Apr 23, 2020
- UNIVERSITE DE BRETAGNE SUD
- Emmanuel BOUTILLON
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CORRECTION DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME
- Publication number 20200067538
- Publication date Feb 27, 2020
- SK HYNIX INC.
- Dae Sung KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CORRECTION DEVICE, OPERATING METHOD THEREOF AND ELECTRONIC DE...
- Publication number 20200059244
- Publication date Feb 20, 2020
- SK HYNIX INC.
- Dae Sung KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION CIRCUIT AND OPERATING METHOD THEREOF
- Publication number 20200052716
- Publication date Feb 13, 2020
- SK HYNIX INC.
- Dae Sung Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PARITY CHECK MATRIX GENERATOR, OPERATING METHOD THEREOF AND ERROR C...
- Publication number 20190372592
- Publication date Dec 5, 2019
- SK HYNIX INC.
- Dae Sung KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
- Publication number 20190149172
- Publication date May 16, 2019
- Saturn Licensing LLC
- Ryoji IKEGAYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY
- Publication number 20190089377
- Publication date Mar 21, 2019
- Toshiba Memory Corporation
- Yuta KUMANO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ITERATION-ADAPTIVE DECODING FOR NON-BINARY LDPC CODES
- Publication number 20180351577
- Publication date Dec 6, 2018
- Western Digital Technologies, Inc.
- Minghai QIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR CONTROLLING A CHECK NODE OF A NB-LDPC DECODER AND CORRES...
- Publication number 20180131395
- Publication date May 10, 2018
- Emmanuel BOUTILLON
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ELEMENTARY CHECK NODE PROCESSING FOR SYNDROME COMPUTATION FOR NON-B...
- Publication number 20180076830
- Publication date Mar 15, 2018
- UNIVERSITE DE BRETAGNE SUD
- Cédric MARCHAND
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND DEVICES FOR GENERATING OPTIMIZED CODED MODULATIONS
- Publication number 20180069570
- Publication date Mar 8, 2018
- UNIVERSITE DE BRETAGNE SUD
- Emmanuel BOUTILLON
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY CONTROLLER, SEMICONDUCTOR MEMORY SYSTEM AND OPERATING METHOD...
- Publication number 20180048329
- Publication date Feb 15, 2018
- SK HYNIX INC.
- Jeong-Seok HA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-BINARY ENCODING FOR NON-VOLATILE MEMORY
- Publication number 20180034479
- Publication date Feb 1, 2018
- Western Digital Technologies, Inc.
- Richard Leo GALBRAITH
- G06 - COMPUTING CALCULATING COUNTING

Parity-check or generator matrices with non-binary elements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Iterative error correction in memory systems

Dynamic self-correction of message reliability in LDPC codes

Data processing device and data processing method

Iterative error correction in memory systems

Data processing device and data processing method

Forward error correction using non-binary low density parity check...

Offset value determination in a check node processing unit for mess...

Transformation of data to non-binary data for storage in non-volati...

LDPC encoding for memory cells with arbitrary number of levels

Variable node processing methods and devices for message-passing de...

Vertical layered finite alphabet iterative decoding

Data processing device and data processing method

Simplified check node processing in non-binary LDPC decoder

Check node processing methods and devices with insertion sort

Method and device of selecting base graph of low-density parity-che...

Forward error correction using non-binary low density parity check...

Simplified, presorted, syndrome-based, extended min-sum (EMS) decod...

Hybrid architectures for check node processing of extended min-sum...

Error correction decoder and memory system having the same

Transformation of binary data to non-binary data for storage in non...

Error correction device, operating method thereof and electronic de...

Error correction circuit and operating method thereof

Coset probability based majority-logic decoding for non-binary LDPC...

Parity check matrix generator, operating method thereof and error c...

Data processing device and data processing method

Supporting multiple page lengths with unique error correction codin...

Methods and devices for error correcting codes decoding

Memory system and method of controlling nonvolatile memory

Elementary check node processing for syndrome computation for non-b...

Error correction device and electronic device including the same

Patents Applicationslast 30 patents

ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

LDPC Encoding For Memory Cells With Arbitrary Number Of Levels

FORWARD ERROR CORRECTION USING NON-BINARY LOW DENSITY PARITY CHECK...

OFFSET VALUE DETERMINATION IN A CHECK NODE PROCESSING UNIT FOR MESS...

CHECK NODE PROCESSING METHODS AND DEVICES WITH INSERTION SORT

Transformation of Data to Non-Binary Data For Storage in Non-Volati...

DYNAMIC SELF-CORRECTION OF MESSAGE RELIABILITY IN LDPC CODES

VARIABLE NODE PROCESSING METHODS AND DEVICES FOR MESSAGE-PASSING DE...

SIMPLIFIED CHECK NODE PROCESSING IN NON-BINARY LDPC DECODER

ERROR CORRECTION DECODER AND MEMORY SYSTEM HAVING THE SAME

FORWARD ERROR CORRECTION USING NON-BINARY LOW DENSITY PARITY CHECK...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

COSET PROBABILITY BASED MAJORITY-LOGIC DECODING FOR NON-BINARY LDPC...

HYBRID ARCHITECTURES FOR CHECK NODE PROCESSING OF EXTENDED MIN-SUM...

SIMPLIFIED, PRESORTED, SYNDROME-BASED, EXTENDED MIN-SUM (EMS) DECOD...

ERROR CORRECTION DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

ERROR CORRECTION DEVICE, OPERATING METHOD THEREOF AND ELECTRONIC DE...

ERROR CORRECTION CIRCUIT AND OPERATING METHOD THEREOF

PARITY CHECK MATRIX GENERATOR, OPERATING METHOD THEREOF AND ERROR C...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY

ITERATION-ADAPTIVE DECODING FOR NON-BINARY LDPC CODES

METHOD FOR CONTROLLING A CHECK NODE OF A NB-LDPC DECODER AND CORRES...

ELEMENTARY CHECK NODE PROCESSING FOR SYNDROME COMPUTATION FOR NON-B...

METHODS AND DEVICES FOR GENERATING OPTIMIZED CODED MODULATIONS

MEMORY CONTROLLER, SEMICONDUCTOR MEMORY SYSTEM AND OPERATING METHOD...

NON-BINARY ENCODING FOR NON-VOLATILE MEMORY