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H01L2224/8293

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/8293Reshaping

Industries

Patents Grantslast 30 patents

Information Patent Grant
Method of manufacturing semiconductor devices having conductive plu...
- Patent number 10,304,818
- Issue date May 28, 2019
- Taiwan Semiconductor Manufacturing Company
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of mounting semiconductor chips, semiconductor device obtain...
- Patent number 9,795,033
- Issue date Oct 17, 2017
- Panasonic Corporation
- Shingo Yoshioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacturing electronic devices
- Patent number 9,640,506
- Issue date May 2, 2017
- STMicroelectronics S.r.l.
- Federico Giovanni Ziglioli
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Three-dimensional structure for wiring formation
- Patent number 9,082,438
- Issue date Jul 14, 2015
- Panasonic Corporation
- Shingo Yoshioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional structure in which wiring is provided on its surface
- Patent number 9,070,393
- Issue date Jun 30, 2015
- Panasonic Corporation
- Shingo Yoshioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of mounting semiconductor chips, semiconductor device obtain...
- Patent number 8,901,728
- Issue date Dec 2, 2014
- Panasonic Corporation
- Shingo Yoshioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of mounting semiconductor chips, semiconductor device obtain...
- Patent number 8,759,148
- Issue date Jun 24, 2014
- Panasonic Corporation
- Shingo Yoshioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of mounting semiconductor chips, semiconductor device obtain...
- Patent number 8,482,137
- Issue date Jul 9, 2013
- Panasonic Corporation
- Shingo Yoshioka
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Seamless Interconnect Thresholds using Dielectric Fluid Channels
- Publication number 20220238401
- Publication date Jul 28, 2022
- SCIPERIO, INC.
- Jason Benoit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE THEREOF
- Publication number 20220208749
- Publication date Jun 30, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20210202452
- Publication date Jul 1, 2021
- SAMSUNG DISPLAY CO., LTD.
- Tae Gyun KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Devices and Methods of Manufacture Thereof
- Publication number 20190279974
- Publication date Sep 12, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Devices and Methods of Manufacture Thereof
- Publication number 20180102351
- Publication date Apr 12, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shu-Ting Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICE
- Publication number 20160260682
- Publication date Sep 8, 2016
- DECA TECHNOLOGIES INC
- Christopher M. Scanlan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING ELECTRONIC DEVICES
- Publication number 20140291850
- Publication date Oct 2, 2014
- STMicroelectronics S.r. I.
- Federico Giovanni ZIGLIOLI
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
THREE-DIMENSIONAL STRUCTURE IN WHICH WIRING IS PROVIDED ON ITS SURFACE
- Publication number 20140183751
- Publication date Jul 3, 2014
- PANASONIC CORPORATION
- Shingo YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL STRUCTURE FOR WIRING FORMATION
- Publication number 20140182887
- Publication date Jul 3, 2014
- PANASONIC CORPORATION
- Shingo YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...
- Publication number 20140097004
- Publication date Apr 10, 2014
- PANASONIC CORPORATION
- Shingo YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...
- Publication number 20140090876
- Publication date Apr 3, 2014
- PANASONIC CORPORATION
- Shingo YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...
- Publication number 20130200522
- Publication date Aug 8, 2013
- PANASONIC CORPORATION
- Shingo YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...
- Publication number 20110281138
- Publication date Nov 17, 2011
- Panasonic Electric Works Co., Ltd.
- Shingo Yoshioka
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method of manufacturing semiconductor devices having conductive plu...

Method of mounting semiconductor chips, semiconductor device obtain...

Method for manufacturing electronic devices

Three-dimensional structure for wiring formation

Three-dimensional structure in which wiring is provided on its surface

Method of mounting semiconductor chips, semiconductor device obtain...

Method of mounting semiconductor chips, semiconductor device obtain...

Method of mounting semiconductor chips, semiconductor device obtain...

Patents Applicationslast 30 patents

Seamless Interconnect Thresholds using Dielectric Fluid Channels

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE THEREOF

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

Semiconductor Devices and Methods of Manufacture Thereof

Semiconductor Devices and Methods of Manufacture Thereof

FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICE

METHOD FOR MANUFACTURING ELECTRONIC DEVICES

THREE-DIMENSIONAL STRUCTURE IN WHICH WIRING IS PROVIDED ON ITS SURFACE

THREE-DIMENSIONAL STRUCTURE FOR WIRING FORMATION

METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...

METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...

METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...

METHOD OF MOUNTING SEMICONDUCTOR CHIPS, SEMICONDUCTOR DEVICE OBTAIN...