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CPC
G01R31/31719

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/31719Security aspects

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Classifying comparators based on comparator offsets
- Patent number 12,134,713
- Issue date Nov 5, 2024
- Microchip Technology Incorporated
- Zhi-Yuan Zou
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Grant
Electronic component testing system and time certification method
- Patent number 12,135,350
- Issue date Nov 5, 2024
- CHROMA ATE INC.
- Tzu-Ching Yang
- G01 - MEASURING TESTING
Information Patent Grant
Protection of the content of a fuse memory
- Patent number 12,117,487
- Issue date Oct 15, 2024
- STMicroelectronics (Grenoble 2) SAS
- Mark Trimmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Invisible scan architecture for secure testing of digital designs
- Patent number 11,953,548
- Issue date Apr 9, 2024
- University of Florida Research Foundation, Incorporated
- Swarup Bhunia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FPGA chip with protected JTAG interface
- Patent number 11,941,133
- Issue date Mar 26, 2024
- Hewlett Packard Enterprise Development LP
- Siung Siew Liew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on chip for performing scan test and method of designing the...
- Patent number 11,940,494
- Issue date Mar 26, 2024
- Samsung Electronics Co., Ltd.
- Woohyun Son
- G01 - MEASURING TESTING
Information Patent Grant
Baseboard management controller (BMC) test system and method
- Patent number 11,907,384
- Issue date Feb 20, 2024
- Dell Products, L.P.
- Timothy M. Lambert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quantitative digital sensor
- Patent number 11,893,112
- Issue date Feb 6, 2024
- SECURE-IC SAS
- Sylvain Guilley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for detecting perturbations in a logic circuit and logic cir...
- Patent number 11,879,938
- Issue date Jan 23, 2024
- Nagravision SARL
- Jean-Marie Martin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for intellectual property-secured, remote debug...
- Patent number 11,754,623
- Issue date Sep 12, 2023
- Intel Corporation
- Tsvika Kurts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using embedded time-varying code generator to provide secure access...
- Patent number 11,693,052
- Issue date Jul 4, 2023
- Silicon Aid Solutions, Inc.
- James M. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trigger activation by repeated maximal clique sampling
- Patent number 11,568,046
- Issue date Jan 31, 2023
- University of Florida Research Foundation, Inc.
- Prabhat Kumar Mishra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for detecting at least one glitch in an electrical signal an...
- Patent number 11,422,183
- Issue date Aug 23, 2022
- Nagravision S.A.
- Jean-Marie Martin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using embedded time-varying code generator to provide secure access...
- Patent number 11,333,706
- Issue date May 17, 2022
- Silicon Aid Solutions, Inc.
- James M. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip having secure debug mode
- Patent number 11,280,829
- Issue date Mar 22, 2022
- XLNX, INC.
- Ramakrishna G. Poolla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for managing a return of a product for analysis and correspo...
- Patent number 11,143,701
- Issue date Oct 12, 2021
- STMicroelectronics (Rousset) SAS
- Lionel Sinegre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure debug system for electronic devices
- Patent number 11,105,850
- Issue date Aug 31, 2021
- Seagate Technology LLC
- Jon Trantham
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for intellectual property-secured, remote debug...
- Patent number 11,085,964
- Issue date Aug 10, 2021
- Intel Corporation
- Tsvika Kurts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing resistance of a circuit to a side channel analysis
- Patent number 11,036,891
- Issue date Jun 15, 2021
- Eshard
- Benoît Feix
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secured system for testing and maintenance of bulk electrical syste...
- Patent number 11,032,310
- Issue date Jun 8, 2021
- Doble Engineering Company
- Jason Alexander Allison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of pulse width tampering of signals
- Patent number 11,022,637
- Issue date Jun 1, 2021
- ARM Limited
- Subbayya Chowdary Yanamadala
- G01 - MEASURING TESTING
Information Patent Grant
Secure coprocessor assisted hardware debugging
- Patent number 10,895,597
- Issue date Jan 19, 2021
- Advanced Micro Devices, Inc.
- Tan Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure device state apparatus and method and lifecycle management
- Patent number 10,872,154
- Issue date Dec 22, 2020
- Google LLC
- Marius Schilder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to secure FPGA card debug ports
- Patent number 10,852,352
- Issue date Dec 1, 2020
- Dell Products, L.P.
- Johan Rahardjo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip monitor circuit and semiconductor chip
- Patent number 10,776,484
- Issue date Sep 15, 2020
- National University Corporation Kobe University
- Makoto Nagata
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for managing a return of a product for analysis and correspo...
- Patent number 10,705,141
- Issue date Jul 7, 2020
- STMicroelectronics (Rousset) SAS
- Lionel Sinegre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using embedded time-varying code generator to provide secure access...
- Patent number 10,690,718
- Issue date Jun 23, 2020
- SiliconAid Solutions, Inc.
- James M. Johnson
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for detecting points of failures
- Patent number 10,691,855
- Issue date Jun 23, 2020
- SECURE-IC SAS
- Sylvain Guilley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secured method for testing and maintenance of bulk electrical syste...
- Patent number 10,623,437
- Issue date Apr 14, 2020
- Doble Engineering Company
- Jason Alexander Allison
- G01 - MEASURING TESTING
Information Patent Grant
Method of protecting a circuit against a side-channel analysis
- Patent number 10,505,711
- Issue date Dec 10, 2019
- Eshard
- Hugues Thiebeauld De La Crouee
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...
- Publication number 20240418774
- Publication date Dec 19, 2024
- HCL America Inc.
- MANICKAM MUTHIAH
- G01 - MEASURING TESTING
Information Patent Application
SCAN CHAIN SECURITY CIRCUIT AND DRIVING METHOD THEREOF
- Publication number 20240280633
- Publication date Aug 22, 2024
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- Sungho KANG
- G01 - MEASURING TESTING
Information Patent Application
TEST MODE CONTROL CIRCUIT, SEMICONDUCTOR APPARATUS AND SYSTEM, AND...
- Publication number 20240159828
- Publication date May 16, 2024
- SK HYNIX INC.
- Jin Suk OH
- G01 - MEASURING TESTING
Information Patent Application
Secure Remote Debugging
- Publication number 20240110975
- Publication date Apr 4, 2024
- Intel Corporation
- Tsvika Kurts
- G01 - MEASURING TESTING
Information Patent Application
MEMORY, MEMORY SYSTEM AND METHOD OF CONTROLLING STORAGE DEVICE
- Publication number 20240094286
- Publication date Mar 21, 2024
- KIOXIA Corporation
- Atsushi YAMAZAKI
- G01 - MEASURING TESTING
Information Patent Application
CONTAINERIZED ORCHESTRATION OF SECURE SOCKET LAYER VIRTUAL PRIVATE...
- Publication number 20240036112
- Publication date Feb 1, 2024
- AT&T INTELLECTUAL PROPERTY I, L.P.
- Elmer Cruz
- G01 - MEASURING TESTING
Information Patent Application
INVISIBLE SCAN ARCHITECTURE FOR SECURE TESTING OF DIGITAL DESIGNS
- Publication number 20230228815
- Publication date Jul 20, 2023
- University of Florida Research Foundation, Incorporated
- Swarup BHUNIA
- G01 - MEASURING TESTING
Information Patent Application
CHIP WITH POWER-GLITCH DETECTION AND POWER-GLITCH SELF-TESTING
- Publication number 20230213579
- Publication date Jul 6, 2023
- MEDIATEK INC.
- Pin-Wen CHEN
- G01 - MEASURING TESTING
Information Patent Application
AUTHENTICATING ELECTRONIC DEVICES VIA MULTI TONE ANALYSIS
- Publication number 20230176119
- Publication date Jun 8, 2023
- Government of the United States as Represented by the Secretary of the Air Force
- Carl Bohman
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM ON CHIP FOR PERFORMING SCAN TEST AND METHOD OF DESIGNING THE...
- Publication number 20230141786
- Publication date May 11, 2023
- Samsung Electronics Co., Ltd.
- WOOHYUN SON
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICOND...
- Publication number 20230096746
- Publication date Mar 30, 2023
- Samsung Electronics Co., Ltd.
- Hyungil WOO
- G01 - MEASURING TESTING
Information Patent Application
FPGA CHIP WITH PROTECTED JTAG INTERFACE
- Publication number 20230090760
- Publication date Mar 23, 2023
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Siung Siew Liew
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR DETECTING PERTURBATIONS IN A LOGIC CIRCUIT AND LOGIC CIR...
- Publication number 20230027416
- Publication date Jan 26, 2023
- NAGRAVISION SARL
- Jean-Marie MARTIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR CONTROLLING DROP TEST EQUIPMENT
- Publication number 20220397606
- Publication date Dec 15, 2022
- Konepaja-Heinä Oy
- Ilkka HEINÄ
- G01 - MEASURING TESTING
Information Patent Application
BASEBOARD MANAGEMENT CONTROLLER (BMC) TEST SYSTEM AND METHOD
- Publication number 20220390517
- Publication date Dec 8, 2022
- DELL PRODUCTS, L.P.
- Timothy M. Lambert
- G01 - MEASURING TESTING
Information Patent Application
A METHOD AND APPARATUS FOR DETECTION OF COUNTERFEIT PARTS, COMPROMI...
- Publication number 20220341990
- Publication date Oct 27, 2022
- PALITRONICA INC.
- CARLOS MORENO
- G01 - MEASURING TESTING
Information Patent Application
SECURED DEBUG
- Publication number 20220317184
- Publication date Oct 6, 2022
- STMicroelectronics (Alps) SAS
- Franck Albesa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using Embedded Time-Varying Code Generator to Provide Secure Access...
- Publication number 20220244311
- Publication date Aug 4, 2022
- SiliconAid Solutions, Inc.
- James M. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT APPLICABLE TO PERFORMING SYSTEM PROTECTION THROU...
- Publication number 20220222385
- Publication date Jul 14, 2022
- Realtek Semiconductor Corp.
- Chang-Hsien Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR INTELLECTUAL PROPERTY-SECURED, REMOTE DEBUG...
- Publication number 20210364571
- Publication date Nov 25, 2021
- Intel Corporation
- Tsvika Kurts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC COMPONENT TESTING SYSTEM AND TIME CERTIFICATION METHOD
- Publication number 20210349146
- Publication date Nov 11, 2021
- Tzu-Ching YANG
- G01 - MEASURING TESTING
Information Patent Application
QUANTITATIVE DIGITAL SENSOR
- Publication number 20210004461
- Publication date Jan 7, 2021
- SECURE-IC SAS
- Sylvain GUILLEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR INTELLECTUAL PROPERTY-SECURED, REMOTE DEBUG...
- Publication number 20200348361
- Publication date Nov 5, 2020
- Tsvika Kurts
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR MANAGING A RETURN OF A PRODUCT FOR ANALYSIS AND CORRESPO...
- Publication number 20200319247
- Publication date Oct 8, 2020
- STMicroelectronics (Rousset) SAS
- Lionel Sinegre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURED SYSTEM FOR TESTING AND MAINTENANCE OF BULK ELECTRICAL SYSTE...
- Publication number 20200244697
- Publication date Jul 30, 2020
- Doble Engineering Company
- Jason Alexander Allison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLASSIFYING COMPARATORS BASED ON COMPARATOR OFFSETS
- Publication number 20200213139
- Publication date Jul 2, 2020
- MICROCHIP TECHNOLOGY INCORPORATED
- Zhi-Yuan Zou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD FOR DETECTING AT LEAST ONE GLITCH IN AN ELECTRICAL SIGNAL AN...
- Publication number 20200209309
- Publication date Jul 2, 2020
- Nagravision S.A.
- Jean-Marie MARTIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE COPROCESSOR ASSISTED HARDWARE DEBUGGING
- Publication number 20200158778
- Publication date May 21, 2020
- ADVANCED MICRO DEVICES, INC.
- Tan Peng
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD TO SECURE FPGA CARD DEBUG PORTS
- Publication number 20200132761
- Publication date Apr 30, 2020
- DELL PRODUCTS, L.P.
- Johan Rahardjo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE DEBUG SYSTEM FOR ELECTRONIC DEVICES
- Publication number 20190361073
- Publication date Nov 28, 2019
- SEAGATE TECHNOLOGY LLC
- Jon TRANTHAM
- G01 - MEASURING TESTING

Security aspects

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Classifying comparators based on comparator offsets

Electronic component testing system and time certification method

Protection of the content of a fuse memory

Invisible scan architecture for secure testing of digital designs

FPGA chip with protected JTAG interface

System on chip for performing scan test and method of designing the...

Baseboard management controller (BMC) test system and method

Quantitative digital sensor

Method for detecting perturbations in a logic circuit and logic cir...

Systems and methods for intellectual property-secured, remote debug...

Using embedded time-varying code generator to provide secure access...

Trigger activation by repeated maximal clique sampling

Method for detecting at least one glitch in an electrical signal an...

Using embedded time-varying code generator to provide secure access...

System-on-chip having secure debug mode

Method for managing a return of a product for analysis and correspo...

Secure debug system for electronic devices

Systems and methods for intellectual property-secured, remote debug...

Testing resistance of a circuit to a side channel analysis

Secured system for testing and maintenance of bulk electrical syste...

Detection of pulse width tampering of signals

Secure coprocessor assisted hardware debugging

Secure device state apparatus and method and lifecycle management

System and method to secure FPGA card debug ports

On-chip monitor circuit and semiconductor chip

Method for managing a return of a product for analysis and correspo...

Using embedded time-varying code generator to provide secure access...

Device and method for detecting points of failures

Secured method for testing and maintenance of bulk electrical syste...

Method of protecting a circuit against a side-channel analysis

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...

SCAN CHAIN SECURITY CIRCUIT AND DRIVING METHOD THEREOF

TEST MODE CONTROL CIRCUIT, SEMICONDUCTOR APPARATUS AND SYSTEM, AND...

Secure Remote Debugging

MEMORY, MEMORY SYSTEM AND METHOD OF CONTROLLING STORAGE DEVICE

CONTAINERIZED ORCHESTRATION OF SECURE SOCKET LAYER VIRTUAL PRIVATE...

INVISIBLE SCAN ARCHITECTURE FOR SECURE TESTING OF DIGITAL DESIGNS

CHIP WITH POWER-GLITCH DETECTION AND POWER-GLITCH SELF-TESTING

AUTHENTICATING ELECTRONIC DEVICES VIA MULTI TONE ANALYSIS

SYSTEM ON CHIP FOR PERFORMING SCAN TEST AND METHOD OF DESIGNING THE...

SEMICONDUCTOR INTEGRATED CIRCUIT, A METHOD FOR TESTING THE SEMICOND...

FPGA CHIP WITH PROTECTED JTAG INTERFACE

METHOD FOR DETECTING PERTURBATIONS IN A LOGIC CIRCUIT AND LOGIC CIR...

METHOD FOR CONTROLLING DROP TEST EQUIPMENT

BASEBOARD MANAGEMENT CONTROLLER (BMC) TEST SYSTEM AND METHOD

A METHOD AND APPARATUS FOR DETECTION OF COUNTERFEIT PARTS, COMPROMI...

SECURED DEBUG

Using Embedded Time-Varying Code Generator to Provide Secure Access...

INTEGRATED CIRCUIT APPLICABLE TO PERFORMING SYSTEM PROTECTION THROU...

SYSTEMS AND METHODS FOR INTELLECTUAL PROPERTY-SECURED, REMOTE DEBUG...

ELECTRONIC COMPONENT TESTING SYSTEM AND TIME CERTIFICATION METHOD

QUANTITATIVE DIGITAL SENSOR

SYSTEMS AND METHODS FOR INTELLECTUAL PROPERTY-SECURED, REMOTE DEBUG...

METHOD FOR MANAGING A RETURN OF A PRODUCT FOR ANALYSIS AND CORRESPO...

SECURED SYSTEM FOR TESTING AND MAINTENANCE OF BULK ELECTRICAL SYSTE...

CLASSIFYING COMPARATORS BASED ON COMPARATOR OFFSETS

METHOD FOR DETECTING AT LEAST ONE GLITCH IN AN ELECTRICAL SIGNAL AN...

SECURE COPROCESSOR ASSISTED HARDWARE DEBUGGING

SYSTEM AND METHOD TO SECURE FPGA CARD DEBUG PORTS

SECURE DEBUG SYSTEM FOR ELECTRONIC DEVICES