Solid-liquid interdiffusion

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CPC
H01L2224/81825

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Parent Industries

HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/81825Solid-liquid interdiffusion

Industries

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor package and manufacturing method thereof
- Patent number 12,113,044
- Issue date Oct 8, 2024
- Advanced Semiconductor Engineering, Inc.
- Shan-Bo Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced device assembly structures and methods
- Patent number 11,999,001
- Issue date Jun 4, 2024
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Cyprian Emeka Uzoh
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multiple plated via arrays of different wire heights on a same subs...
- Patent number RE49987
- Issue date May 28, 2024
- Invensas LLC
- Cyprian Emeka Uzoh
Information Patent Grant
Connector structure and method of forming same
- Patent number 11,824,026
- Issue date Nov 21, 2023
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chen-Shien Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffusion soldering preform with varying surface profile
- Patent number 11,764,185
- Issue date Sep 19, 2023
- Infineon Technologies Austria AG
- Kirill Trunov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages with an intermetallic layer
- Patent number 11,049,833
- Issue date Jun 29, 2021
- Semiconductor Components Industries, LLC
- Michael J. Seddon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Connector structure and method of forming same
- Patent number 10,861,811
- Issue date Dec 8, 2020
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chen-Shien Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die encapsulation in oxide bonded wafer stack
- Patent number 10,784,234
- Issue date Sep 22, 2020
- Raytheon Company
- John J. Drab
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density multi-component packages
- Patent number 10,707,145
- Issue date Jul 7, 2020
- KEMET Electronics Corporation
- John Bultitude
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple plated via arrays of different wire heights on same substrate
- Patent number 10,629,567
- Issue date Apr 21, 2020
- Invensas Corporation
- Cyprian Emeka Uzoh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Connector structure and method of forming same
- Patent number 10,388,620
- Issue date Aug 20, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Shien Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer stacking for integrated circuit manufacturing
- Patent number 10,361,140
- Issue date Jul 23, 2019
- International Business Machines Corporation
- Qianwen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tooling for coupling multiple electronic chips
- Patent number 10,340,239
- Issue date Jul 2, 2019
- Cufer Asset Ltd. L.L.C.
- Roger Dugas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple bond via arrays of different wire heights on a same substrate
- Patent number 10,290,613
- Issue date May 14, 2019
- Invensas Corporation
- Cyprian Emeka Uzoh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Three-dimensional chip stack and method of forming the same
- Patent number 10,276,532
- Issue date Apr 30, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei-Ming Chen
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Die encapsulation in oxide bonded wafer stack
- Patent number 10,242,967
- Issue date Mar 26, 2019
- Raytheon Company
- John J. Drab
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Junction structure for an electronic device and electronic device
- Patent number 10,205,250
- Issue date Feb 12, 2019
- TDK Corporation
- Kenichi Yoshida
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Materials for use with interconnects of electrical devices and rela...
- Patent number 10,123,430
- Issue date Nov 6, 2018
- Alpha Assembly Solutions Inc.
- Michael T. Marczi
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 10,049,998
- Issue date Aug 14, 2018
- Invensas Corporation
- Rajesh Katkar
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of bonding with silver paste
- Patent number 9,972,597
- Issue date May 15, 2018
- Hyundai Motor Company
- Kyoung-Kook Hong
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of manufacturing a chip package
- Patent number 9,893,043
- Issue date Feb 13, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-Liang Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die stacks with one or more bond via arrays of wire bond wires and...
- Patent number 9,852,969
- Issue date Dec 26, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip chip bonding alloys
- Patent number 9,847,310
- Issue date Dec 19, 2017
- Semiconductor Components Industries, LLC
- Michael J. Seddon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tooling for coupling multiple electronic chips
- Patent number 9,754,907
- Issue date Sep 5, 2017
- Cufer Asset Ltd. L.L.C.
- Roger Dugas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple bond via arrays of different wire heights on a same substrate
- Patent number 9,728,527
- Issue date Aug 8, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional chip stack and method of forming the same
- Patent number 9,698,115
- Issue date Jul 4, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei-Ming Chen
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multiple bond via arrays of different wire heights on a same substrate
- Patent number 9,583,456
- Issue date Feb 28, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming semiconductor packages with an intermetallic lay...
- Patent number 9,564,409
- Issue date Feb 7, 2017
- Semiconductor Components Industries, LLC
- Michael J. Seddon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 9,437,566
- Issue date Sep 6, 2016
- Invensas Corporation
- Rajesh Katkar
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Die stacks with one or more bond via arrays of wire bond wires and...
- Patent number 9,379,074
- Issue date Jun 28, 2016
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
- Publication number 20230268314
- Publication date Aug 24, 2023
- Advanced Semiconductor Engineering, Inc.
- Shan-Bo WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION SOLDERING PREFORM WITH VARYING SURFACE PROFILE
- Publication number 20230065738
- Publication date Mar 2, 2023
- Kirill Trunov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Advanced Device Assembly Structures And Methods
- Publication number 20220097166
- Publication date Mar 31, 2022
- Invensas Corporation
- Cyprian Emeka Uzoh
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
HYBRID BONDING STRUCTURES, SEMICONDUCTOR DEVICES HAVING THE SAME, A...
- Publication number 20220093549
- Publication date Mar 24, 2022
- Samsung Electronics Co., Ltd.
- Kunmo CHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Connector Structure and Method of Forming Same
- Publication number 20210118833
- Publication date Apr 22, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Shien Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER STACKING FOR INTEGRATED CIRCUIT MANUFACTURING
- Publication number 20190326190
- Publication date Oct 24, 2019
- International Business Machines Corporation
- Qianwen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Connector Structure and Method of Forming Same
- Publication number 20190279953
- Publication date Sep 12, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Shien Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE ENCAPSULATION IN OXIDE BONDED WAFER STACK
- Publication number 20190221547
- Publication date Jul 18, 2019
- Raytheon Company
- John J. Drab
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE PLATED VIA ARRAYS OF DIFFERENT WIRE HEIGHTS ON SAME SUBSTRATE
- Publication number 20190148344
- Publication date May 16, 2019
- Invensas Corporation
- Cyprian Emeka UZOH
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Multiple bond via arrays of different wire heights on a same substrate
- Publication number 20180301436
- Publication date Oct 18, 2018
- Invensas Corporation
- Cyprian Emeka UZOH
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
TOOLING FOR COUPLING MULTIPLE ELECTRONIC CHIPS
- Publication number 20180033754
- Publication date Feb 1, 2018
- Cufer Asset Ltd. L.L.C.
- Roger Dugas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF BONDING A FIRST SUBSTRATE AND A SECOND SUBSTRATE
- Publication number 20170309584
- Publication date Oct 26, 2017
- Agency for Science, Technology and Research
- Ling Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-Dimensional Chip Stack and Method of Forming the Same
- Publication number 20170301641
- Publication date Oct 19, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei-Ming Chen
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
TOOLING FOR COUPLING MULTIPLE ELECTRONIC CHIPS
- Publication number 20160322320
- Publication date Nov 3, 2016
- Cufer Asset Ltd. L.L.C.
- Roger Dugas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...
- Publication number 20150325543
- Publication date Nov 12, 2015
- Invensas Corporation
- Rajesh Katkar
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
JUNCTION STRUCTURE FOR AN ELECTRONIC DEVICE AND ELECTRONIC DEVICE
- Publication number 20140291021
- Publication date Oct 2, 2014
- TDK Corporation
- Kenichi YOSHIDA
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
MOUNTING STRUCTURE AND MANUFACTURING METHOD FOR SAME
- Publication number 20140217595
- Publication date Aug 7, 2014
- PANASONIC CORPORATION
- Daisuke Sakurai
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
ADVANCED DEVICE ASSEMBLY STRUCTURES AND METHODS
- Publication number 20140153210
- Publication date Jun 5, 2014
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING TWO SUBSTRATES CONNECTED BY AT LEAST ONE MEC...
- Publication number 20130313704
- Publication date Nov 28, 2013
- Jean-Charles Souriau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOUNTING STRUCTURE OF ELECTRONIC COMPONENT AND METHOD OF MANUFACTUR...
- Publication number 20130307146
- Publication date Nov 21, 2013
- PANASONIC CORPORATION
- Takatoshi OSUMI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package Structure and Substrate Bonding Method
- Publication number 20130285248
- Publication date Oct 31, 2013
- ASIA PACIFIC MICROSYSTEMS, INC.
- Hung-Lin Yin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
METHOD AND SYSTEM FOR ULTRA MINIATURIZED PACKAGES FOR TRANSIENT VOL...
- Publication number 20130240903
- Publication date Sep 19, 2013
- Avinash Srikrishnan Kashyap
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
PATTERNED CONTACT
- Publication number 20110275178
- Publication date Nov 10, 2011
- John Trezza
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Manufacturing method for electronic devices
- Publication number 20110253767
- Publication date Oct 20, 2011
- RENESAS ELECTRONICS CORPORATION
- Yoichiro Kurita
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
INVERSE CHIP CONNECTOR
- Publication number 20110250722
- Publication date Oct 13, 2011
- John Trezza
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
- Publication number 20110233767
- Publication date Sep 29, 2011
- PANASONIC CORPORATION
- Daisuke SAKURAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PIN-TYPE CHIP TOOLING
- Publication number 20110223717
- Publication date Sep 15, 2011
- John Trezza
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RIGID-BACKED, MEMBRANE-BASED CHIP TOOLING
- Publication number 20110212573
- Publication date Sep 1, 2011
- John Trezza
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT-BASED ENCAPSULATION
- Publication number 20110147932
- Publication date Jun 23, 2011
- John Trezza
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Manufacturing method for electronic devices
- Publication number 20100291732
- Publication date Nov 18, 2010
- NEC Electronics Corporation
- Yoichiro Kurita
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR

Solid-liquid interdiffusion

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor package and manufacturing method thereof

Advanced device assembly structures and methods

Multiple plated via arrays of different wire heights on a same subs...

Connector structure and method of forming same

Diffusion soldering preform with varying surface profile

Semiconductor packages with an intermetallic layer

Connector structure and method of forming same

Die encapsulation in oxide bonded wafer stack

High density multi-component packages

Multiple plated via arrays of different wire heights on same substrate

Connector structure and method of forming same

Wafer stacking for integrated circuit manufacturing

Tooling for coupling multiple electronic chips

Multiple bond via arrays of different wire heights on a same substrate

Three-dimensional chip stack and method of forming the same

Die encapsulation in oxide bonded wafer stack

Junction structure for an electronic device and electronic device

Materials for use with interconnects of electrical devices and rela...

Conductive connections, structures with such connections, and metho...

Method of bonding with silver paste

Method of manufacturing a chip package

Die stacks with one or more bond via arrays of wire bond wires and...

Flip chip bonding alloys

Tooling for coupling multiple electronic chips

Multiple bond via arrays of different wire heights on a same substrate

Three-dimensional chip stack and method of forming the same

Multiple bond via arrays of different wire heights on a same substrate

Methods of forming semiconductor packages with an intermetallic lay...

Conductive connections, structures with such connections, and metho...

Die stacks with one or more bond via arrays of wire bond wires and...

Patents Applicationslast 30 patents

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

DIFFUSION SOLDERING PREFORM WITH VARYING SURFACE PROFILE

Advanced Device Assembly Structures And Methods

HYBRID BONDING STRUCTURES, SEMICONDUCTOR DEVICES HAVING THE SAME, A...

Connector Structure and Method of Forming Same

WAFER STACKING FOR INTEGRATED CIRCUIT MANUFACTURING

Connector Structure and Method of Forming Same

DIE ENCAPSULATION IN OXIDE BONDED WAFER STACK

MULTIPLE PLATED VIA ARRAYS OF DIFFERENT WIRE HEIGHTS ON SAME SUBSTRATE

Multiple bond via arrays of different wire heights on a same substrate

TOOLING FOR COUPLING MULTIPLE ELECTRONIC CHIPS

METHOD OF BONDING A FIRST SUBSTRATE AND A SECOND SUBSTRATE

Three-Dimensional Chip Stack and Method of Forming the Same

TOOLING FOR COUPLING MULTIPLE ELECTRONIC CHIPS

CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...

JUNCTION STRUCTURE FOR AN ELECTRONIC DEVICE AND ELECTRONIC DEVICE

MOUNTING STRUCTURE AND MANUFACTURING METHOD FOR SAME

ADVANCED DEVICE ASSEMBLY STRUCTURES AND METHODS

METHOD FOR FABRICATING TWO SUBSTRATES CONNECTED BY AT LEAST ONE MEC...

MOUNTING STRUCTURE OF ELECTRONIC COMPONENT AND METHOD OF MANUFACTUR...

Package Structure and Substrate Bonding Method

METHOD AND SYSTEM FOR ULTRA MINIATURIZED PACKAGES FOR TRANSIENT VOL...

PATTERNED CONTACT

Manufacturing method for electronic devices

INVERSE CHIP CONNECTOR

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

PIN-TYPE CHIP TOOLING

RIGID-BACKED, MEMBRANE-BASED CHIP TOOLING

CONTACT-BASED ENCAPSULATION

Manufacturing method for electronic devices