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Y10S148/156

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

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Y10S148/156Sonos

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Patents Grantslast 30 patents

Information Patent Grant
Etch stop useful in avoiding substrate pitting with poly buffered l...
- Patent number 5,358,892
- Issue date Oct 25, 1994
- Micron Semiconductor, Inc.
- J. Brett Rolfson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor device utilizing self-alig...
- Patent number 4,830,971
- Issue date May 16, 1989
- Tokyo Shibaura Denki Kabushiki Kaisha
- Tadashi Shibata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor device utilizing self-alig...
- Patent number 4,622,735
- Issue date Nov 18, 1986
- Tokyo Shibaura Denki Kabushiki Kaisha
- Tadashi Shibata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor device with a stacked-gate-...
- Patent number 4,616,402
- Issue date Oct 14, 1986
- Kabushiki Kaisha Toshiba
- Seiichi Mori
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for high density VLSI circuits, having self-aligned gates a...
- Patent number 4,587,711
- Issue date May 13, 1986
- Rockwell International Corporation
- Gordon C. Godejahn
- H01 - BASIC ELECTRIC ELEMENTS