Test algorithms

Industry

CPC
G11C29/10

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/10Test algorithms

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Interface level-shifter dual-rail memory architecture
- Patent number 12,340,864
- Issue date Jun 24, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory module testing method and associated memory controller...
- Patent number 12,334,168
- Issue date Jun 17, 2025
- Silicon Motion, Inc.
- Chiu-Han Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with error checking and correcting unit
- Patent number 12,327,600
- Issue date Jun 10, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Weibing Shang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with scan chain testing of column redundancy logic and multi...
- Patent number 12,327,599
- Issue date Jun 10, 2025
- QUALCOMM Incorporated
- Rahul Sahu
- G11 - INFORMATION STORAGE
Information Patent Grant
Media scan in memory systems
- Patent number 12,300,336
- Issue date May 13, 2025
- Yangtze Memory Technologies Co., Ltd.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory queue operations to increase throughput in an ATE system
- Patent number 12,293,802
- Issue date May 6, 2025
- Advantest Corporation
- Edmundo de la Puente
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test burst patterns based on architecture of memory
- Patent number 12,293,803
- Issue date May 6, 2025
- Micron Technology, Inc.
- William Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller performing training to improve communication and...
- Patent number 12,272,425
- Issue date Apr 8, 2025
- SK Hynix Inc.
- Nam Hyeok Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for testing memory device
- Patent number 12,272,415
- Issue date Apr 8, 2025
- NANYA TECHNOLOGY CORPORATION
- Yaochang Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of configurable phase range to detect DDR read and write bursts
- Patent number 12,254,935
- Issue date Mar 18, 2025
- Rohde & Schwarz GmbH & Co. KG
- Kevin Guo
- G11 - INFORMATION STORAGE
Information Patent Grant
At-speed test of functional memory interface logic in devices
- Patent number 12,243,603
- Issue date Mar 4, 2025
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Scannable memory array and a method for scanning memory
- Patent number 12,243,604
- Issue date Mar 4, 2025
- SambaNova Systems, Inc.
- Thomas Ziaja
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing method and testing system
- Patent number 12,237,029
- Issue date Feb 25, 2025
- NANYA TECHNOLOGY CORPORATION
- Bo Jung Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout of driving circuit, semiconductor structure and semiconducto...
- Patent number 12,237,030
- Issue date Feb 25, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Huijuan Sun
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit and method for reading data from a memory device durin...
- Patent number 12,211,570
- Issue date Jan 28, 2025
- Realtek Semiconductor Corp.
- Li-Wei Deng
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing of analog neural memory cells in an artificial neural network
- Patent number 12,205,655
- Issue date Jan 21, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable memory timing
- Patent number 12,176,061
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data writing method, test method, writing apparatus, medium, and el...
- Patent number 12,159,680
- Issue date Dec 3, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yuanyuan Sun
- G11 - INFORMATION STORAGE
Information Patent Grant
Predetermined pattern program operations
- Patent number 12,154,640
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Kitae Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in memory tests for aircraft processing systems
- Patent number 12,154,642
- Issue date Nov 26, 2024
- Hamilton Sundstrand Corporation
- Christopher Brian Noll
- G11 - INFORMATION STORAGE
Information Patent Grant
Test device and test method thereof
- Patent number 12,154,644
- Issue date Nov 26, 2024
- NANYA TECHNOLOGY CORPORATION
- Yao-Chang Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and memory operation
- Patent number 12,148,488
- Issue date Nov 19, 2024
- SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Midori Aizawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system scan
- Patent number 12,148,484
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller and operating method thereof
- Patent number 12,142,331
- Issue date Nov 12, 2024
- SK hynix Inc.
- Seung Yeol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Error check functionality verification using known errors
- Patent number 12,119,071
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Francesco Lupo
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection of the content of a fuse memory
- Patent number 12,117,487
- Issue date Oct 15, 2024
- STMicroelectronics (Grenoble 2) SAS
- Mark Trimmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Diagnosing faults in memory periphery circuitry
- Patent number 12,094,548
- Issue date Sep 17, 2024
- Synopsys, Inc.
- Grigor Tshagharyan
- G11 - INFORMATION STORAGE
Information Patent Grant
NPU capable of testing component including memory during runtime
- Patent number 12,040,040
- Issue date Jul 16, 2024
- DEEPX CO., LTD.
- Lok Won Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NPU capable of testing component therein during runtime, the testin...
- Patent number 12,033,713
- Issue date Jul 9, 2024
- DEEPX CO., LTD.
- Lok Won Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for continuous wordline monitoring
- Patent number 12,009,047
- Issue date Jun 11, 2024
- Advanced Micro Devices, Inc.
- Patrick James Shyvers
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...
- Publication number 20250210079
- Publication date Jun 26, 2025
- SK HYNIX INC.
- Nam Hyeok JEONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INCLUDING DAMAGE DETECTION CIRCUIT AND TEST SYSTEM IN...
- Publication number 20250201324
- Publication date Jun 19, 2025
- Samsung Electronics Co., Ltd.
- Eunji Kim
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR TESTING MEMORY DEVICE
- Publication number 20250201327
- Publication date Jun 19, 2025
- NANYA TECHNOLOGY CORPORATION
- Yaochang CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
Memory apparatus having at-speed test mechanism and memory test met...
- Publication number 20250174291
- Publication date May 29, 2025
- REALTEK SEMICONDUCTOR CORPORATION
- YU-CHENG LO
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING METHOD AND MEMORY MODULE UNDER TEST
- Publication number 20250157557
- Publication date May 15, 2025
- NANYA TECHNOLOGY CORPORATION
- Bo Jung PENG
- G01 - MEASURING TESTING
Information Patent Application
DETERMINISTIC TEST PROGRAM GENERATION FOR EVALUATING CACHE COHERENCY
- Publication number 20250149103
- Publication date May 8, 2025
- International Business Machines Corporation
- Nandhini RAJAIAH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INCLUDING ERROR CORRECTION CIRCUIT
- Publication number 20250118387
- Publication date Apr 10, 2025
- SK HYNIX INC.
- Mun Seon JANG
- G11 - INFORMATION STORAGE
Information Patent Application
FAILURE ANALYSIS DEVICE AND FAILURE ANALYSIS METHOD
- Publication number 20250111882
- Publication date Apr 3, 2025
- RENESAS ELECTRONICS CORPORATION
- Toru OGUSHI
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING OF ANALOG NON-VOLATILE MEMORY CELL IN NEURAL NETWORK
- Publication number 20250104783
- Publication date Mar 27, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMAGE DISPLAY DEVICE
- Publication number 20250078944
- Publication date Mar 6, 2025
- LG ELECTRONICS INC.
- Wonsang JEONG
- G11 - INFORMATION STORAGE
Information Patent Application
PREDETERMINED PATTERN PROGRAM OPERATIONS
- Publication number 20250046389
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Kitae Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CHECK FUNCTIONALITY VERIFICATION USING KNOWN ERRORS
- Publication number 20250014663
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Francesco Lupo
- G11 - INFORMATION STORAGE
Information Patent Application
NON-LINEAR MEMORY FAILURE ANALYSIS METHOD AND MEMORY TEST APPARATUS
- Publication number 20250006286
- Publication date Jan 2, 2025
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- Sungho KANG
- G11 - INFORMATION STORAGE
Information Patent Application
PROTECTION OF THE CONTENT OF A FUSE MEMORY
- Publication number 20250004051
- Publication date Jan 2, 2025
- STMicroelectronics (Grenoble 2) SAS
- Mark Trimmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR TESTING MEMORY DEVICE
- Publication number 20240420788
- Publication date Dec 19, 2024
- NANYA TECHNOLOGY CORPORATION
- Yaochang CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION
- Publication number 20240412794
- Publication date Dec 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yoshisato Yokoyama
- G11 - INFORMATION STORAGE
Information Patent Application
RUNTIME ALERT SIGNAL ACTIVATION TEST MODE
- Publication number 20240404617
- Publication date Dec 5, 2024
- Intel Corporation
- Kuljit S. Bains
- G11 - INFORMATION STORAGE
Information Patent Application
DATA CORRECTING DEVICE AND DATA CORRECTING METHOD THEREOF
- Publication number 20240395346
- Publication date Nov 28, 2024
- SK HYNIX INC.
- Jae Il LIM
- G11 - INFORMATION STORAGE
Information Patent Application
MEDIA SCAN IN MEMORY SYSTEMS
- Publication number 20240371458
- Publication date Nov 7, 2024
- Yangtze Memory Technologies Co., Ltd.
- Hua Tan
- G11 - INFORMATION STORAGE
Information Patent Application
Use of Configurable Phase Range to Detect DDR Read and Write Bursts
- Publication number 20240347121
- Publication date Oct 17, 2024
- Rohde& Schwarz GmbH & Co. KG
- Kevin Guo
- G11 - INFORMATION STORAGE
Information Patent Application
XOR DATA RECOVERY SCHEMES NONVOLATILE MEMORY DEVICES
- Publication number 20240347122
- Publication date Oct 17, 2024
- SanDisk Technologies LLC
- Xiang Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE SAME, AND M...
- Publication number 20240331774
- Publication date Oct 3, 2024
- Samsung Electronics Co., Ltd.
- Gangmin Lee
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF MEASURING REFRACTIVE INDEX OF SEMICONDUCTOR MEMORY DEVICE...
- Publication number 20240331788
- Publication date Oct 3, 2024
- SK HYNIX INC.
- Nam Cheol JEON
- G11 - INFORMATION STORAGE
Information Patent Application
NPU WITH CAPABILITY OF BUILT-IN SELF-TEST
- Publication number 20240321384
- Publication date Sep 26, 2024
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...
- Publication number 20240274216
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
NPU CAPABLE OF PERFORMING RUNTIME TEST
- Publication number 20240274224
- Publication date Aug 15, 2024
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PERFORMING AGING TEST ON SEMICONDUCTOR USED FOR NEURAL N...
- Publication number 20240274225
- Publication date Aug 15, 2024
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, MEMORY SYSTEM AND METHOD O...
- Publication number 20240274217
- Publication date Aug 15, 2024
- SK HYNIX INC.
- Jin Sub KIM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20240249788
- Publication date Jul 25, 2024
- Samsung Electronics Co., Ltd.
- Jungmin Bak
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Mode Memory Module with Data Handlers
- Publication number 20240221852
- Publication date Jul 4, 2024
- Netlist, Inc.
- Hyun Lee
- G11 - INFORMATION STORAGE

Test algorithms

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Interface level-shifter dual-rail memory architecture

Flash memory module testing method and associated memory controller...

Memory with error checking and correcting unit

Memory with scan chain testing of column redundancy logic and multi...

Media scan in memory systems

Memory queue operations to increase throughput in an ATE system

Built-in self-test burst patterns based on architecture of memory

Memory controller performing training to improve communication and...

System and method for testing memory device

Use of configurable phase range to detect DDR read and write bursts

At-speed test of functional memory interface logic in devices

Scannable memory array and a method for scanning memory

Testing method and testing system

Layout of driving circuit, semiconductor structure and semiconducto...

Test circuit and method for reading data from a memory device durin...

Testing of analog neural memory cells in an artificial neural network

Programmable memory timing

Data writing method, test method, writing apparatus, medium, and el...

Predetermined pattern program operations

Built-in memory tests for aircraft processing systems

Test device and test method thereof

Memory system and memory operation

Memory sub-system scan

Memory controller and operating method thereof

Error check functionality verification using known errors

Protection of the content of a fuse memory

Diagnosing faults in memory periphery circuitry

NPU capable of testing component including memory during runtime

NPU capable of testing component therein during runtime, the testin...

Systems and methods for continuous wordline monitoring

Patents Applicationslast 30 patents

MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...

MEMORY DEVICE INCLUDING DAMAGE DETECTION CIRCUIT AND TEST SYSTEM IN...

SYSTEM AND METHOD FOR TESTING MEMORY DEVICE

Memory apparatus having at-speed test mechanism and memory test met...

TESTING METHOD AND MEMORY MODULE UNDER TEST

DETERMINISTIC TEST PROGRAM GENERATION FOR EVALUATING CACHE COHERENCY

MEMORY INCLUDING ERROR CORRECTION CIRCUIT

FAILURE ANALYSIS DEVICE AND FAILURE ANALYSIS METHOD

PROGRAMMING OF ANALOG NON-VOLATILE MEMORY CELL IN NEURAL NETWORK

IMAGE DISPLAY DEVICE

PREDETERMINED PATTERN PROGRAM OPERATIONS

ERROR CHECK FUNCTIONALITY VERIFICATION USING KNOWN ERRORS

NON-LINEAR MEMORY FAILURE ANALYSIS METHOD AND MEMORY TEST APPARATUS

PROTECTION OF THE CONTENT OF A FUSE MEMORY

SYSTEM AND METHOD FOR TESTING MEMORY DEVICE

SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION

RUNTIME ALERT SIGNAL ACTIVATION TEST MODE

DATA CORRECTING DEVICE AND DATA CORRECTING METHOD THEREOF

MEDIA SCAN IN MEMORY SYSTEMS

Use of Configurable Phase Range to Detect DDR Read and Write Bursts

XOR DATA RECOVERY SCHEMES NONVOLATILE MEMORY DEVICES

NONVOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE SAME, AND M...

METHOD OF MEASURING REFRACTIVE INDEX OF SEMICONDUCTOR MEMORY DEVICE...

NPU WITH CAPABILITY OF BUILT-IN SELF-TEST

ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...

NPU CAPABLE OF PERFORMING RUNTIME TEST

METHOD FOR PERFORMING AGING TEST ON SEMICONDUCTOR USED FOR NEURAL N...

SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, MEMORY SYSTEM AND METHOD O...

MEMORY DEVICE

Multi-Mode Memory Module with Data Handlers