Test algorithms

Industry

CPC
G11C29/10

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/10Test algorithms

Industries

Patents Grantslast 30 patents

Information Patent Grant
Memory system and memory operation
- Patent number 12,148,488
- Issue date Nov 19, 2024
- SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Midori Aizawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system scan
- Patent number 12,148,484
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller and operating method thereof
- Patent number 12,142,331
- Issue date Nov 12, 2024
- SK hynix Inc.
- Seung Yeol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Error check functionality verification using known errors
- Patent number 12,119,071
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Francesco Lupo
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection of the content of a fuse memory
- Patent number 12,117,487
- Issue date Oct 15, 2024
- STMicroelectronics (Grenoble 2) SAS
- Mark Trimmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Diagnosing faults in memory periphery circuitry
- Patent number 12,094,548
- Issue date Sep 17, 2024
- Synopsys, Inc.
- Grigor Tshagharyan
- G11 - INFORMATION STORAGE
Information Patent Grant
NPU capable of testing component including memory during runtime
- Patent number 12,040,040
- Issue date Jul 16, 2024
- DEEPX CO., LTD.
- Lok Won Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NPU capable of testing component therein during runtime, the testin...
- Patent number 12,033,713
- Issue date Jul 9, 2024
- DEEPX CO., LTD.
- Lok Won Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for continuous wordline monitoring
- Patent number 12,009,047
- Issue date Jun 11, 2024
- Advanced Micro Devices, Inc.
- Patrick James Shyvers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing a refresh operation in a memory sub-system
- Patent number 12,009,042
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural processing unit capable of testing component therein during...
- Patent number 11,990,203
- Issue date May 21, 2024
- DEEPX CO., LTD.
- Lok Won Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device and test system including the same
- Patent number 11,989,459
- Issue date May 21, 2024
- Samsung Electronics Co., Ltd.
- Hongjun Jin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling or disabling on-die error-correcting code for a memory bui...
- Patent number 11,984,180
- Issue date May 14, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Error-detection schemes for analog content-addressable memories
- Patent number 11,978,523
- Issue date May 7, 2024
- Hewlett Packard Enterprise Development LP
- Ron M. Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device, controller, memory system and method o...
- Patent number 11,972,824
- Issue date Apr 30, 2024
- SK Hynix Inc.
- Jin Sub Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing circuit, testing device and testing method thereof
- Patent number 11,948,650
- Issue date Apr 2, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Liang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for processing data stored in a memory unit
- Patent number 11,947,807
- Issue date Apr 2, 2024
- Robert Bosch GmbH
- Manuel Jauss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counter management for memory systems
- Patent number 11,948,656
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device protection using interleaved multibit symbols
- Patent number 11,942,175
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Paolo Amato
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with scan chain testing of column redundancy logic and multi...
- Patent number 11,935,606
- Issue date Mar 19, 2024
- QUALCOMM Incorporated
- Rahul Sahu
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for booting from NAND flash using squashfs to m...
- Patent number 11,934,680
- Issue date Mar 19, 2024
- ARRIS ENTERPRISES LLC
- Walter H. Anderes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test method and apparatus of communication chip, device and medium
- Patent number 11,927,631
- Issue date Mar 12, 2024
- MORNINGCORE TECHNOLOGY CO., CHINA
- Shanzhi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device and operating method for controller
- Patent number 11,923,022
- Issue date Mar 5, 2024
- SK Hynix Inc.
- Chol Su Chae
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of reducing reliability degradation of nonvolatile memory de...
- Patent number 11,915,770
- Issue date Feb 27, 2024
- Samsung Electronics Co., Ltd.
- Minseok Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective margin testing to determine whether to signal train a mem...
- Patent number 11,894,084
- Issue date Feb 6, 2024
- Intel Corporation
- Dujian Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable memory timing
- Patent number 11,894,099
- Issue date Feb 6, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with error checking and correcting unit
- Patent number 11,894,089
- Issue date Feb 6, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Weibing Shang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system for performing row hammering tracking operation
- Patent number 11,875,040
- Issue date Jan 16, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device aware test for memory units
- Patent number 11,869,612
- Issue date Jan 9, 2024
- Technische Universiteit Delft
- Mottaqiallah Taouil
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi mode memory module with data handlers
- Patent number 11,862,267
- Issue date Jan 2, 2024
- Netlist, Inc.
- Hyun Lee
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEDIA SCAN IN MEMORY SYSTEMS
- Publication number 20240371458
- Publication date Nov 7, 2024
- Yangtze Memory Technologies Co., Ltd.
- Hua Tan
- G11 - INFORMATION STORAGE
Information Patent Application
Use of Configurable Phase Range to Detect DDR Read and Write Bursts
- Publication number 20240347121
- Publication date Oct 17, 2024
- Rohde& Schwarz GmbH & Co. KG
- Kevin Guo
- G11 - INFORMATION STORAGE
Information Patent Application
XOR DATA RECOVERY SCHEMES NONVOLATILE MEMORY DEVICES
- Publication number 20240347122
- Publication date Oct 17, 2024
- SanDisk Technologies LLC
- Xiang Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE SAME, AND M...
- Publication number 20240331774
- Publication date Oct 3, 2024
- Samsung Electronics Co., Ltd.
- Gangmin Lee
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF MEASURING REFRACTIVE INDEX OF SEMICONDUCTOR MEMORY DEVICE...
- Publication number 20240331788
- Publication date Oct 3, 2024
- SK HYNIX INC.
- Nam Cheol JEON
- G11 - INFORMATION STORAGE
Information Patent Application
NPU WITH CAPABILITY OF BUILT-IN SELF-TEST
- Publication number 20240321384
- Publication date Sep 26, 2024
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...
- Publication number 20240274216
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
NPU CAPABLE OF PERFORMING RUNTIME TEST
- Publication number 20240274224
- Publication date Aug 15, 2024
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PERFORMING AGING TEST ON SEMICONDUCTOR USED FOR NEURAL N...
- Publication number 20240274225
- Publication date Aug 15, 2024
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, MEMORY SYSTEM AND METHOD O...
- Publication number 20240274217
- Publication date Aug 15, 2024
- SK HYNIX INC.
- Jin Sub KIM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20240249788
- Publication date Jul 25, 2024
- Samsung Electronics Co., Ltd.
- Jungmin Bak
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Mode Memory Module with Data Handlers
- Publication number 20240221852
- Publication date Jul 4, 2024
- Netlist, Inc.
- Hyun Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Memory with Scan Chain Testing of Column Redundancy Logic and Multi...
- Publication number 20240221853
- Publication date Jul 4, 2024
- QUALCOMM Incorporated
- Rahul SAHU
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY MODULE TESTING METHOD AND ASSOCIATED MEMORY CONTROLLER...
- Publication number 20240194282
- Publication date Jun 13, 2024
- SILICON MOTION, INC.
- Chiu-Han Chang
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR OPERATING A MEMORY DEVICE AND MEMORY DEVICE THEREOF
- Publication number 20240170086
- Publication date May 23, 2024
- PUFsecurity Corporation
- CHI-YI SHAO
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR-DETECTION SCHEMES FOR ANALOG CONTENT-ADDRESSABLE MEMORIES
- Publication number 20240170082
- Publication date May 23, 2024
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- Ron M. Roth
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS, SYSTEMS, AND METHODS FOR DYNAMICALLY RECONFIGURED SEMICO...
- Publication number 20240161848
- Publication date May 16, 2024
- Intelligent Memory Limited
- Mike Hossein Amidi
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING METHOD AND TESTING SYSTEM
- Publication number 20240161847
- Publication date May 16, 2024
- NANYA TECHNOLOGY CORPORATION
- Bo Jung PENG
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable Memory Timing
- Publication number 20240161796
- Publication date May 16, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH ERROR CHECKING AND CORRECTING UNIT
- Publication number 20240145022
- Publication date May 2, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Weibing SHANG
- G11 - INFORMATION STORAGE
Information Patent Application
TEST DEVICE AND TEST METHOD THEREOF
- Publication number 20240145024
- Publication date May 2, 2024
- NANYA TECHNOLOGY CORPORATION
- Yao-Chang Chiu
- G11 - INFORMATION STORAGE
Information Patent Application
AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES
- Publication number 20240120016
- Publication date Apr 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL INTERFERENCE TESTING USING RELIABLE READ WRITE INTERFACE
- Publication number 20240112747
- Publication date Apr 4, 2024
- ADVANCED MICRO DEVICES, INC.
- Tahsin Askar
- G11 - INFORMATION STORAGE
Information Patent Application
COUNTER MANAGEMENT FOR MEMORY SYSTEMS
- Publication number 20240096436
- Publication date Mar 21, 2024
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY QUEUE OPERATIONS TO INCREASE THROUGHPUT IN AN ATE SYSTEM
- Publication number 20240096432
- Publication date Mar 21, 2024
- Advantest Corporation
- Edmundo de la Puente
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST BURST PATTERNS BASED ON ARCHITECTURE OF MEMORY
- Publication number 20240087664
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- William Yu
- G11 - INFORMATION STORAGE
Information Patent Application
VIRTUAL AND PHYSICAL EXTENDED MEMORY ARRAY
- Publication number 20240086319
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Donald M. Morgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS TO DETECT CELL-INTERNAL DEFECTS
- Publication number 20240087668
- Publication date Mar 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ankita Patidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR PACKAGE FOR PERFORMING TRAINING OPERATION
- Publication number 20240047003
- Publication date Feb 8, 2024
- SK HYNIX INC.
- Seong Ju LEE
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN-SELF-TEST LOGIC, MEMORY DEVICE WITH SAME, AND MEMORY MODUL...
- Publication number 20240021261
- Publication date Jan 18, 2024
- Samsung Electronics Co., Ltd.
- EUNHYE OH
- G11 - INFORMATION STORAGE

Test algorithms

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory system and memory operation

Memory sub-system scan

Memory controller and operating method thereof

Error check functionality verification using known errors

Protection of the content of a fuse memory

Diagnosing faults in memory periphery circuitry

NPU capable of testing component including memory during runtime

NPU capable of testing component therein during runtime, the testin...

Systems and methods for continuous wordline monitoring

Executing a refresh operation in a memory sub-system

Neural processing unit capable of testing component therein during...

Semiconductor memory device and test system including the same

Enabling or disabling on-die error-correcting code for a memory bui...

Error-detection schemes for analog content-addressable memories

Semiconductor memory device, controller, memory system and method o...

Testing circuit, testing device and testing method thereof

Method and device for processing data stored in a memory unit

Counter management for memory systems

Memory device protection using interleaved multibit symbols

Memory with scan chain testing of column redundancy logic and multi...

Systems and methods for booting from NAND flash using squashfs to m...

Test method and apparatus of communication chip, device and medium

Storage device and operating method for controller

Method of reducing reliability degradation of nonvolatile memory de...

Selective margin testing to determine whether to signal train a mem...

Programmable memory timing

Memory with error checking and correcting unit

Semiconductor system for performing row hammering tracking operation

Device aware test for memory units

Multi mode memory module with data handlers

Patents Applicationslast 30 patents

MEDIA SCAN IN MEMORY SYSTEMS

Use of Configurable Phase Range to Detect DDR Read and Write Bursts

XOR DATA RECOVERY SCHEMES NONVOLATILE MEMORY DEVICES

NONVOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE SAME, AND M...

METHOD OF MEASURING REFRACTIVE INDEX OF SEMICONDUCTOR MEMORY DEVICE...

NPU WITH CAPABILITY OF BUILT-IN SELF-TEST

ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...

NPU CAPABLE OF PERFORMING RUNTIME TEST

METHOD FOR PERFORMING AGING TEST ON SEMICONDUCTOR USED FOR NEURAL N...

SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, MEMORY SYSTEM AND METHOD O...

MEMORY DEVICE

Multi-Mode Memory Module with Data Handlers

Memory with Scan Chain Testing of Column Redundancy Logic and Multi...

FLASH MEMORY MODULE TESTING METHOD AND ASSOCIATED MEMORY CONTROLLER...

METHOD FOR OPERATING A MEMORY DEVICE AND MEMORY DEVICE THEREOF

ERROR-DETECTION SCHEMES FOR ANALOG CONTENT-ADDRESSABLE MEMORIES

APPARATUS, SYSTEMS, AND METHODS FOR DYNAMICALLY RECONFIGURED SEMICO...

TESTING METHOD AND TESTING SYSTEM

Programmable Memory Timing

MEMORY WITH ERROR CHECKING AND CORRECTING UNIT

TEST DEVICE AND TEST METHOD THEREOF

AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES

SIGNAL INTERFERENCE TESTING USING RELIABLE READ WRITE INTERFACE

COUNTER MANAGEMENT FOR MEMORY SYSTEMS

MEMORY QUEUE OPERATIONS TO INCREASE THROUGHPUT IN AN ATE SYSTEM

BUILT-IN SELF-TEST BURST PATTERNS BASED ON ARCHITECTURE OF MEMORY

VIRTUAL AND PHYSICAL EXTENDED MEMORY ARRAY

SYSTEMS AND METHODS TO DETECT CELL-INTERNAL DEFECTS

SEMICONDUCTOR PACKAGE FOR PERFORMING TRAINING OPERATION

BUILT-IN-SELF-TEST LOGIC, MEMORY DEVICE WITH SAME, AND MEMORY MODUL...