Test of flip-flops or latches

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CPC
G01R31/318525

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

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G01R31/318525Test of flip-flops or latches

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Error protection analysis of an integrated circuit
- Patent number 12,188,979
- Issue date Jan 7, 2025
- International Business Machines Corporation
- Benjamin Neil Trombley
- G01 - MEASURING TESTING
Information Patent Grant
Bi-directional scan flip-flop circuit and method
- Patent number 12,166,487
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Huaixin Xian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Registers
- Patent number 12,158,499
- Issue date Dec 3, 2024
- Nordic Semiconductor ASA
- Matti Samuli Leinonen
- G01 - MEASURING TESTING
Information Patent Grant
Electronic circuit and method of error correction
- Patent number 12,153,088
- Issue date Nov 26, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chia-Chun Liao
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit with timing correction circuitry
- Patent number 12,123,911
- Issue date Oct 22, 2024
- NXP USA, INC.
- Shilpa Gupta
- G01 - MEASURING TESTING
Information Patent Grant
Multiplexer for SDFQ having differently-sized scan and data transis...
- Patent number 12,099,090
- Issue date Sep 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Huaixin Xian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan flip-flops with pre-setting combinational logic
- Patent number 12,066,489
- Issue date Aug 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Johnny Chiahao Li
- G01 - MEASURING TESTING
Information Patent Grant
Integrated test circuit, test assembly and method for testing an in...
- Patent number 12,055,587
- Issue date Aug 6, 2024
- Infineon Technologies AG
- Tobias Kilian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flops and scan chain circuits including the same
- Patent number 12,044,733
- Issue date Jul 23, 2024
- Samsung Electronics Co., Ltd.
- Byounggon Kang
- G01 - MEASURING TESTING
Information Patent Grant
On-die clock period jitter and duty cycle analyzer
- Patent number 11,879,936
- Issue date Jan 23, 2024
- Ampere Computing LLC
- Yeshwant Kolla
- G01 - MEASURING TESTING
Information Patent Grant
Core and interface scan testing architecture and methodology
- Patent number 11,879,942
- Issue date Jan 23, 2024
- Micron Technology, Inc.
- Banadappa Shivaray
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit with reference sub-system for testing and replac...
- Patent number 11,852,676
- Issue date Dec 26, 2023
- STMicroelectronics S.r.l.
- Carlo Caimi
- G01 - MEASURING TESTING
Information Patent Grant
Redundancy circuit
- Patent number 11,848,672
- Issue date Dec 19, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Sandeep Jain
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiplexer for SDFQ having differently-sized scan and data transis...
- Patent number 11,821,947
- Issue date Nov 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Huaixin Xian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-random binary sequences (PRBS) generator for performing on-c...
- Patent number 11,774,496
- Issue date Oct 3, 2023
- INDIAN INSTITUTE OF TECHNOLOGY
- Mahendra Sakare
- G01 - MEASURING TESTING
Information Patent Grant
Computer-readable recording medium storing analysis program, analys...
- Patent number 11,693,054
- Issue date Jul 4, 2023
- Fujitsu Limited
- Daisuke Maruyama
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for monitoring data and timing signals in integra...
- Patent number 11,635,465
- Issue date Apr 25, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Rohit Goel
- G01 - MEASURING TESTING
Information Patent Grant
Clock control system for scan chains
- Patent number 11,604,223
- Issue date Mar 14, 2023
- NXP USA, INC.
- Himanshu Mangal
- G01 - MEASURING TESTING
Information Patent Grant
High speed debug-delay compensation in external tool
- Patent number 11,360,143
- Issue date Jun 14, 2022
- STMICROELECTRONICS INTERNATIONAL N.V.
- Avneep Kumar Goyal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Safety mechanism for digital reset state
- Patent number 11,128,282
- Issue date Sep 21, 2021
- ALLEGRO MICROSYSTEMS, LLC
- Sergio Nicolás Deligiannis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing an integrated circuit having conservative reversible logic
- Patent number 11,112,458
- Issue date Sep 7, 2021
- NXP B.V.
- Jan-Peter Schat
- G01 - MEASURING TESTING
Information Patent Grant
Double edge triggered Mux-D scan flip-flop
- Patent number 11,054,470
- Issue date Jul 6, 2021
- Intel Corporation
- Amit Agarwal
- G01 - MEASURING TESTING
Information Patent Grant
Frequency doubler pulse limiter and methods for limiting pulse widt...
- Patent number 10,958,255
- Issue date Mar 23, 2021
- Intel Corporation
- Gil Asa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit control latch protection
- Patent number 10,890,622
- Issue date Jan 12, 2021
- International Business Machines Corporation
- Stefan Payer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device, electronic control system and method for eval...
- Patent number 10,288,683
- Issue date May 14, 2019
- Renesas Electronics Corporation
- Yoichi Maeda
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for functional safety verification
- Patent number 10,267,857
- Issue date Apr 23, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Sandeep Kumar Goel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, method, and system for testing IC chip
- Patent number 10,228,419
- Issue date Mar 12, 2019
- INNOTIO INC.
- Jaehoon Song
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor power and performance optimization
- Patent number 10,215,804
- Issue date Feb 26, 2019
- International Business Machines Corporation
- Sean M. Carey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip sequence profiler
- Patent number 10,156,610
- Issue date Dec 18, 2018
- International Business Machines Corporation
- Benedikt Geukes
- G01 - MEASURING TESTING
Information Patent Grant
Built-in self test controller for a random number generator core
- Patent number 9,983,262
- Issue date May 29, 2018
- Amazon Technologies, Inc.
- Dan Trock
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
ERROR PROTECTION ANALYSIS OF AN INTEGRATED CIRCUIT
- Publication number 20240402246
- Publication date Dec 5, 2024
- International Business Machines Corporation
- BENJAMIN NEIL TROMBLEY
- G01 - MEASURING TESTING
Information Patent Application
ELECTRONIC CIRCUIT AND METHOD OF ERROR CORRECTION
- Publication number 20240385242
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIA-CHUN LIAO
- G01 - MEASURING TESTING
Information Patent Application
MULTIPLEXER FOR SDFQ HAVING DIFFERENTLY-SIZED SCAN AND DATA TRANSIS...
- Publication number 20240369629
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Huaixin XIAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scan Flip-Flops With Pre-Setting Combinational Logic
- Publication number 20240361383
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Johnny Chiahao Li
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT WITH TIMING CORRECTION CIRCUITRY
- Publication number 20240345163
- Publication date Oct 17, 2024
- NXP USA, Inc.
- Shilpa Gupta
- G01 - MEASURING TESTING
Information Patent Application
DATA INTEGRITY CHECKING
- Publication number 20240319272
- Publication date Sep 26, 2024
- Imagination Technologies Limited
- Ross Martin Torkington
- G01 - MEASURING TESTING
Information Patent Application
AUTOMATED TEST PATTERN GENERATION FOR TESTING DESIGN REDACTING RECO...
- Publication number 20240201257
- Publication date Jun 20, 2024
- University of Florida Research Foundation, Incorporated
- Greg M. Stitt
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR CHIP AND SEQUENCE CHECKING CIRCUIT
- Publication number 20240110978
- Publication date Apr 4, 2024
- Global Unichip Corporation
- Hung-Yi CHANG
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR SCAN CHAIN INTERFACE FOR NON-VOLATILE STORA...
- Publication number 20240112713
- Publication date Apr 4, 2024
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. ALAM
- G01 - MEASURING TESTING
Information Patent Application
BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD
- Publication number 20240097661
- Publication date Mar 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Huaixin XIAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Scan Flip-Flops With Pre-Setting Combinational Logic
- Publication number 20240077534
- Publication date Mar 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Johnny Chiahao Li
- G01 - MEASURING TESTING
Information Patent Application
FLIP-FLOPS AND SCAN CHAIN CIRCUITS INCLUDING THE SAME
- Publication number 20240061039
- Publication date Feb 22, 2024
- Samsung Electronics Co., Ltd.
- Byounggon Kang
- G01 - MEASURING TESTING
Information Patent Application
COMPUTER-READABLE RECORDING MEDIUM STORING TEST PATTERN GENERATION...
- Publication number 20240019492
- Publication date Jan 18, 2024
- Fujitsu Limited
- Daisuke Maruyama
- G01 - MEASURING TESTING
Information Patent Application
REGISTERS
- Publication number 20240003971
- Publication date Jan 4, 2024
- NORDIC SEMICONDUCTOR ASA
- Matti Samuli Leinonen
- G01 - MEASURING TESTING
Information Patent Application
ON-DIE CLOCK PERIOD JITTER AND DUTY CYCLE ANALYZER
- Publication number 20240003969
- Publication date Jan 4, 2024
- Ampere Computing LLC
- Yeshwant KOLLA
- G01 - MEASURING TESTING
Information Patent Application
MULTIPLEXER FOR SDFQ HAVING DIFFERENTLY-SIZED SCAN AND DATA TRANSIS...
- Publication number 20230408582
- Publication date Dec 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Huaixin XIAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC CIRCUIT AND METHOD OF ERROR CORRECTION
- Publication number 20230384373
- Publication date Nov 30, 2023
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIA-CHUN LIAO
- G01 - MEASURING TESTING
Information Patent Application
REDUNDANCY CIRCUIT
- Publication number 20230327674
- Publication date Oct 12, 2023
- STMicroelectronics International N.V.
- Sandeep Jain
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT WITH RESILIENT SYSTEM
- Publication number 20230258709
- Publication date Aug 17, 2023
- STMicroelectronics S.r.l.
- Carlo CAIMI
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FAILURE ANALYSIS FOR SEMICONDUCT...
- Publication number 20230243888
- Publication date Aug 3, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Wei PENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED TEST CIRCUIT, TEST ASSEMBLY AND METHOD FOR TESTING AN IN...
- Publication number 20230138651
- Publication date May 4, 2023
- INFINEON TECHNOLOGIES AG
- Tobias Kilian
- G01 - MEASURING TESTING
Information Patent Application
COMPUTER-READABLE RECORDING MEDIUM STORING ANALYSIS PROGRAM, ANALYS...
- Publication number 20220390516
- Publication date Dec 8, 2022
- Fujitsu Limited
- Daisuke Maruyama
- G01 - MEASURING TESTING
Information Patent Application
HIGH SPEED DEBUG-DELAY COMPENSATION IN EXTERNAL TOOL
- Publication number 20220137128
- Publication date May 5, 2022
- STMicroelectronics International N.V.
- Avneep Kumar GOYAL
- G01 - MEASURING TESTING
Information Patent Application
DEVICE AND METHOD FOR MONITORING DATA AND TIMING SIGNALS IN INTEGRA...
- Publication number 20220137133
- Publication date May 5, 2022
- STMicroelectronics International N.V.
- Rohit GOEL
- G01 - MEASURING TESTING
Information Patent Application
SAFETY MECHANISM FOR DIGITAL RESET STATE
- Publication number 20210239758
- Publication date Aug 5, 2021
- ALLEGRO MICROSYSTEMS, LLC
- Sergio Nicolás Deligiannis
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE, METHOD FOR DIAGNOSING SEMICONDUCTOR DEVICE, A...
- Publication number 20200300915
- Publication date Sep 24, 2020
- Kabushiki Kaisha Toshiba
- Tomohiro TACHIKAWA
- G01 - MEASURING TESTING
Information Patent Application
OBFUSCATED SHIFT REGISTERS FOR INTEGRATED CIRCUITS
- Publication number 20200285719
- Publication date Sep 10, 2020
- Bryan J. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP SEQUENCE PROFILER
- Publication number 20180321314
- Publication date Nov 8, 2018
- International Business Machines Corporation
- Benedikt Geukes
- G01 - MEASURING TESTING
Information Patent Application
ON-CHIP SEQUENCE PROFILER
- Publication number 20180321315
- Publication date Nov 8, 2018
- International Business Machines Corporation
- Benedikt Geukes
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR FUNCTIONAL SAFETY VERIFICATION
- Publication number 20180149698
- Publication date May 31, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Sandeep Kumar GOEL
- G01 - MEASURING TESTING

Test of flip-flops or latches

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Error protection analysis of an integrated circuit

Bi-directional scan flip-flop circuit and method

Registers

Electronic circuit and method of error correction

Integrated circuit with timing correction circuitry

Multiplexer for SDFQ having differently-sized scan and data transis...

Scan flip-flops with pre-setting combinational logic

Integrated test circuit, test assembly and method for testing an in...

Flip-flops and scan chain circuits including the same

On-die clock period jitter and duty cycle analyzer

Core and interface scan testing architecture and methodology

Integrated circuit with reference sub-system for testing and replac...

Redundancy circuit

Multiplexer for SDFQ having differently-sized scan and data transis...

Pseudo-random binary sequences (PRBS) generator for performing on-c...

Computer-readable recording medium storing analysis program, analys...

Device and method for monitoring data and timing signals in integra...

Clock control system for scan chains

High speed debug-delay compensation in external tool

Safety mechanism for digital reset state

Testing an integrated circuit having conservative reversible logic

Double edge triggered Mux-D scan flip-flop

Frequency doubler pulse limiter and methods for limiting pulse widt...

Integrated circuit control latch protection

Semiconductor device, electronic control system and method for eval...

Method and system for functional safety verification

Apparatus, method, and system for testing IC chip

Semiconductor power and performance optimization

On-chip sequence profiler

Built-in self test controller for a random number generator core

Patents Applicationslast 30 patents

ERROR PROTECTION ANALYSIS OF AN INTEGRATED CIRCUIT

ELECTRONIC CIRCUIT AND METHOD OF ERROR CORRECTION

MULTIPLEXER FOR SDFQ HAVING DIFFERENTLY-SIZED SCAN AND DATA TRANSIS...

Scan Flip-Flops With Pre-Setting Combinational Logic

INTEGRATED CIRCUIT WITH TIMING CORRECTION CIRCUITRY

DATA INTEGRITY CHECKING

AUTOMATED TEST PATTERN GENERATION FOR TESTING DESIGN REDACTING RECO...

SEMICONDUCTOR CHIP AND SEQUENCE CHECKING CIRCUIT

SYSTEMS AND METHODS FOR SCAN CHAIN INTERFACE FOR NON-VOLATILE STORA...

BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD

Scan Flip-Flops With Pre-Setting Combinational Logic

FLIP-FLOPS AND SCAN CHAIN CIRCUITS INCLUDING THE SAME

COMPUTER-READABLE RECORDING MEDIUM STORING TEST PATTERN GENERATION...

REGISTERS

ON-DIE CLOCK PERIOD JITTER AND DUTY CYCLE ANALYZER

MULTIPLEXER FOR SDFQ HAVING DIFFERENTLY-SIZED SCAN AND DATA TRANSIS...

ELECTRONIC CIRCUIT AND METHOD OF ERROR CORRECTION

REDUNDANCY CIRCUIT

INTEGRATED CIRCUIT WITH RESILIENT SYSTEM

SEMICONDUCTOR DEVICE AND METHOD OF FAILURE ANALYSIS FOR SEMICONDUCT...

INTEGRATED TEST CIRCUIT, TEST ASSEMBLY AND METHOD FOR TESTING AN IN...

COMPUTER-READABLE RECORDING MEDIUM STORING ANALYSIS PROGRAM, ANALYS...

HIGH SPEED DEBUG-DELAY COMPENSATION IN EXTERNAL TOOL

DEVICE AND METHOD FOR MONITORING DATA AND TIMING SIGNALS IN INTEGRA...

SAFETY MECHANISM FOR DIGITAL RESET STATE

SEMICONDUCTOR DEVICE, METHOD FOR DIAGNOSING SEMICONDUCTOR DEVICE, A...

OBFUSCATED SHIFT REGISTERS FOR INTEGRATED CIRCUITS

ON-CHIP SEQUENCE PROFILER

ON-CHIP SEQUENCE PROFILER

METHOD AND SYSTEM FOR FUNCTIONAL SAFETY VERIFICATION