Test of programmable logic devices [PLDs]

Industry

CPC
G01R31/318516

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Parent Industries

GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/318516Test of programmable logic devices [PLDs]

Industries

Patents Grantslast 30 patents

Information Patent Grant
Root monitoring on an FPGA using satellite ADCs
- Patent number 11,709,275
- Issue date Jul 25, 2023
- Xilinx, Inc.
- Brendan Farley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-die aging measurements for dynamic timing modeling
- Patent number 11,609,262
- Issue date Mar 21, 2023
- Intel Corporation
- Dheeraj Subbareddy
- G01 - MEASURING TESTING
Information Patent Grant
Field programmable gate array (FPGA) for improving reliability of k...
- Patent number 11,604,696
- Issue date Mar 14, 2023
- WUXI ESIONTECH CO., LTD.
- Yueer Shan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for real-time firmware configuration and debugging apparatus
- Patent number 11,585,850
- Issue date Feb 21, 2023
- Realtek Semiconductor Corp.
- Yue-Feng Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for adaptively utilizing programmable logic devices
- Patent number 11,385,287
- Issue date Jul 12, 2022
- Xilinx, Inc.
- Andreas L. Astuti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable integrated circuit with internal diagnostic hardware
- Patent number 11,092,647
- Issue date Aug 17, 2021
- Hewlett Packard Enterprise Development LP
- John E. Tilleman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electronic controller and control method thereof, and electronic co...
- Patent number 11,080,156
- Issue date Aug 3, 2021
- HITACHI AUTOMOTIVE SYSTEMS, LTD.
- Taisuke Ueta
- G01 - MEASURING TESTING
Information Patent Grant
Scan chain latch design that improves testability of integrated cir...
- Patent number 10,571,520
- Issue date Feb 25, 2020
- Internatioanl Business Machines Corporation
- Dzmitry S. Maliuk
- G01 - MEASURING TESTING
Information Patent Grant
Data analytics and computational analytics for semiconductor proces...
- Patent number 10,481,199
- Issue date Nov 19, 2019
- Applied Materials, Inc.
- Raman K. Nurani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable load transient circuit
- Patent number 10,481,193
- Issue date Nov 19, 2019
- Texas Instruments Incorporated
- Daniel Alexander Katz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Timing optimizations in circuit designs using opposite clock edge t...
- Patent number 10,416,232
- Issue date Sep 17, 2019
- Xilinx, Inc.
- Guenter Stenz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable shift register with programmable load location
- Patent number 10,320,389
- Issue date Jun 11, 2019
- Synopsys, Inc.
- Vijay A. Nebhrajani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device and scan test method including writing and rea...
- Patent number 10,295,597
- Issue date May 21, 2019
- Renesas Electronics Corporation
- Yoichi Maeda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing robust readback capture in a programmable integrated c...
- Patent number 10,169,264
- Issue date Jan 1, 2019
- Xilinx, Inc.
- Michelle E. Zeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable semiconductor device
- Patent number 9,972,536
- Issue date May 15, 2018
- Taiyo Yuden Co., Ltd.
- Hideaki Yoshida
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip IR drop detectors for functional and test mode scenarios, c...
- Patent number 9,823,282
- Issue date Nov 21, 2017
- Texas Instruments Incorporated
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Grant
Error detection in stored data values
- Patent number 9,760,438
- Issue date Sep 12, 2017
- ARM Limited
- Vikas Chandra
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for testing circuitry programmability
- Patent number 9,664,740
- Issue date May 30, 2017
- QUALCOMM Incorporated
- Ayaskant Shrivastava
- G01 - MEASURING TESTING
Information Patent Grant
Method for checking a hardware-configurable logic circuit for faults
- Patent number 9,639,653
- Issue date May 2, 2017
- Robert Bosch GmbH
- Michael Frischke
- G11 - INFORMATION STORAGE
Information Patent Grant
Registers for post configuration testing of programmable logic devices
- Patent number 9,575,123
- Issue date Feb 21, 2017
- Lattice Semiconductor Corporation
- Pradeep Lenka
- G01 - MEASURING TESTING
Information Patent Grant
Monolithic integrated circuit die having modular die regions stitch...
- Patent number 9,547,034
- Issue date Jan 17, 2017
- Xilinx, Inc.
- Rafael C. Camarota
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power distribution network IP block
- Patent number 9,525,423
- Issue date Dec 20, 2016
- Xilinx, Inc.
- Austin H. Lesea
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scan chain latch design that improves testability of integrated cir...
- Patent number 9,372,231
- Issue date Jun 21, 2016
- International Business Machines Corporation
- Dzmitry S. Maliuk
- G01 - MEASURING TESTING
Information Patent Grant
Scan chain latch design that improves testability of integrated cir...
- Patent number 9,261,561
- Issue date Feb 16, 2016
- International Business Machines Corporation
- Dzmitry S. Maliuk
- G01 - MEASURING TESTING
Information Patent Grant
Initializing and testing integrated circuits with selectable scan c...
- Patent number 9,244,124
- Issue date Jan 26, 2016
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G01 - MEASURING TESTING
Information Patent Grant
System and method for optimized board test and configuration
- Patent number 9,164,858
- Issue date Oct 20, 2015
- TESTONICA LAB OU
- Sergei Devadze
- G01 - MEASURING TESTING
Information Patent Grant
Micro-granular delay testing of configurable ICs
- Patent number 9,128,153
- Issue date Sep 8, 2015
- Altera Corporation
- Brian Fox
- G01 - MEASURING TESTING
Information Patent Grant
Scan chain latch design that improves testability of integrated cir...
- Patent number 9,086,457
- Issue date Jul 21, 2015
- International Business Machines Corporation
- Dzmitry Maliuk
- G01 - MEASURING TESTING
Information Patent Grant
On-chip IR drop detectors for functional and test mode scenarios, c...
- Patent number 9,081,063
- Issue date Jul 14, 2015
- Texas Instruments Incorporated
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for monitoring and using internal signals in a pr...
- Patent number 8,959,308
- Issue date Feb 17, 2015
- Adacsys
- Erik Hochapfel
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
ARITHMETIC OPERATION DEVICE, TESTING METHOD
- Publication number 20230409518
- Publication date Dec 21, 2023
- Hitachi Astemo, Ltd.
- Yasuhiro IKEDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On-Die Aging Measurements for Dynamic Timing Modeling
- Publication number 20230129176
- Publication date Apr 27, 2023
- Intel Corporation
- Dheeraj Subbareddy
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS AND METHOD FOR IMPLEMENTING A SCALABLE DIGITAL INFRASTRUC...
- Publication number 20220413045
- Publication date Dec 29, 2022
- IC ANALYTICA, LLC
- Richard WUNDERLICH
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR REAL-TIME FIRMWARE CONFIGURATION AND DEBUGGING APPARATUS
- Publication number 20220334179
- Publication date Oct 20, 2022
- Realtek Semiconductor Corp.
- YUE-FENG CHEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE INTEGRATED CIRCUIT WITH INTERNAL DIAGNOSTIC HARDWARE
- Publication number 20210033673
- Publication date Feb 4, 2021
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- John E. Tilleman
- G01 - MEASURING TESTING
Information Patent Application
ROOT MONITORING ON AN FPGA USING SATELLITE ADCS
- Publication number 20210011172
- Publication date Jan 14, 2021
- Xilinx, Inc.
- Brendan Farley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE LOAD TRANSIENT CIRCUIT
- Publication number 20190242937
- Publication date Aug 8, 2019
- TEXAS INSTRUMENTS INCORPORATED
- DANIEL ALEXANDER KATZ
- G01 - MEASURING TESTING
Information Patent Application
DATA ANALYTICS AND COMPUTATIONAL ANALYTICS FOR SEMICONDUCTOR PROCES...
- Publication number 20190170812
- Publication date Jun 6, 2019
- Applied Materials, Inc.
- Raman K. NURANI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable Shift Register With Programmable Load Location
- Publication number 20190131973
- Publication date May 2, 2019
- Synopsys, Inc.
- Vijay A. NEBHRAJANI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE AND SCAN TEST METHOD
- Publication number 20180059183
- Publication date Mar 1, 2018
- RENESAS ELECTRONICS CORPORATION
- Yoichi MAEDA
- G01 - MEASURING TESTING
Information Patent Application
RECONFIGURABLE SEMICONDUCTOR DEVICE
- Publication number 20170301587
- Publication date Oct 19, 2017
- Taiyo Yuden Co., Ltd.
- Hideaki YOSHIDA
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM-ON-CHIP INCLUDING ON-CHIP CLOCK CONTROLLER AND MOBILE DEVICE...
- Publication number 20160179074
- Publication date Jun 23, 2016
- MINSU KIM
- G01 - MEASURING TESTING
Information Patent Application
SCAN CHAIN LATCH DESIGN THAT IMPROVES TESTABILITY OF INTEGRATED CIR...
- Publication number 20140298128
- Publication date Oct 2, 2014
- International Business Machines Corporation
- Dzmitry Maliuk
- G01 - MEASURING TESTING
Information Patent Application
System and method for optimized board test and configuration
- Publication number 20140298125
- Publication date Oct 2, 2014
- Testonica Lab OU
- Sergei DEVADZE
- G01 - MEASURING TESTING
Information Patent Application
FAULT DETECTION METHOD AND DEVICE
- Publication number 20140229126
- Publication date Aug 14, 2014
- Xi Hu
- G01 - MEASURING TESTING
Information Patent Application
SECURE DIGEST FOR PLD CONFIGURATION DATA
- Publication number 20140043059
- Publication date Feb 13, 2014
- Microsemi SoC Corp.
- Theodore Speers
- G01 - MEASURING TESTING
Information Patent Application
JTAG-BASED PROGRAMMING AND DEBUG
- Publication number 20130346814
- Publication date Dec 26, 2013
- Timothy Zadigian
- G01 - MEASURING TESTING
Information Patent Application
MAGNETIC FIELD SENSING DEVICE
- Publication number 20130320972
- Publication date Dec 5, 2013
- Uwe Loreit
- B82 - NANO-TECHNOLOGY
Information Patent Application
SIGNAL MANAGER
- Publication number 20130145026
- Publication date Jun 6, 2013
- Patrick M. Schoeller
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR TESTING CIRCUITRY PROGRAMMABILITY
- Publication number 20130144544
- Publication date Jun 6, 2013
- CSR Technology Inc.
- Ayaskant Shrivastava
- G01 - MEASURING TESTING
Information Patent Application
Optoelectronic Semiconductor Chip and Method for Adapting a Contact...
- Publication number 20120299049
- Publication date Nov 29, 2012
- Osram Opto Semiconductors GmbH
- Patrick Rode
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ON-CHIP IR DROP DETECTORS FOR FUNCTIONAL AND TEST MODE SCENARIOS, C...
- Publication number 20120126781
- Publication date May 24, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Application
MICRO-GRANULAR DELAY TESTING OF CONFIGURABLE ICS
- Publication number 20120112786
- Publication date May 10, 2012
- Brian Fox
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR MINIMIZING SKEW BETWEEN SIGNALS
- Publication number 20110221497
- Publication date Sep 15, 2011
- Yan Chong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR VERIFICATION APPARATUS, METHOD AND PROGRAM
- Publication number 20110191735
- Publication date Aug 4, 2011
- Kohei Hosokawa
- G01 - MEASURING TESTING
Information Patent Application
PROGRAMMABLE LOGIC DEVICE HAVING AN EMBEDDED TEST LOGIC WITH SECURE...
- Publication number 20110156746
- Publication date Jun 30, 2011
- Intuitive Research and Technology
- Charles E. Fulks, III
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Micro-Granular Delay Testing of Configurable ICs
- Publication number 20110068820
- Publication date Mar 24, 2011
- Brian Fox
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DEVICE AND METHOD FOR MONITORING AND USING INTERNAL SIGNALS IN A PR...
- Publication number 20100332742
- Publication date Dec 30, 2010
- ADACSYS
- Erik Hochapfel
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR DETECTING AND CORRECTING ERRORS IN A PARAL...
- Publication number 20100199136
- Publication date Aug 5, 2010
- Xilinx, Inc.
- Madan M. Patra
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20100188923
- Publication date Jul 29, 2010
- Masayuki Satoh
- H03 - BASIC ELECTRONIC CIRCUITRY

Test of programmable logic devices [PLDs]

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Root monitoring on an FPGA using satellite ADCs

On-die aging measurements for dynamic timing modeling

Field programmable gate array (FPGA) for improving reliability of k...

Method for real-time firmware configuration and debugging apparatus

Method for adaptively utilizing programmable logic devices

Programmable integrated circuit with internal diagnostic hardware

Electronic controller and control method thereof, and electronic co...

Scan chain latch design that improves testability of integrated cir...

Data analytics and computational analytics for semiconductor proces...

Programmable load transient circuit

Timing optimizations in circuit designs using opposite clock edge t...

Programmable shift register with programmable load location

Semiconductor device and scan test method including writing and rea...

Implementing robust readback capture in a programmable integrated c...

Reconfigurable semiconductor device

On-chip IR drop detectors for functional and test mode scenarios, c...

Error detection in stored data values

Systems and methods for testing circuitry programmability

Method for checking a hardware-configurable logic circuit for faults

Registers for post configuration testing of programmable logic devices

Monolithic integrated circuit die having modular die regions stitch...

Power distribution network IP block

Scan chain latch design that improves testability of integrated cir...

Scan chain latch design that improves testability of integrated cir...

Initializing and testing integrated circuits with selectable scan c...

System and method for optimized board test and configuration

Micro-granular delay testing of configurable ICs

Scan chain latch design that improves testability of integrated cir...

On-chip IR drop detectors for functional and test mode scenarios, c...

Device and method for monitoring and using internal signals in a pr...

Patents Applicationslast 30 patents

ARITHMETIC OPERATION DEVICE, TESTING METHOD

On-Die Aging Measurements for Dynamic Timing Modeling

APPARATUS AND METHOD FOR IMPLEMENTING A SCALABLE DIGITAL INFRASTRUC...

METHOD FOR REAL-TIME FIRMWARE CONFIGURATION AND DEBUGGING APPARATUS

PROGRAMMABLE INTEGRATED CIRCUIT WITH INTERNAL DIAGNOSTIC HARDWARE

ROOT MONITORING ON AN FPGA USING SATELLITE ADCS

PROGRAMMABLE LOAD TRANSIENT CIRCUIT

DATA ANALYTICS AND COMPUTATIONAL ANALYTICS FOR SEMICONDUCTOR PROCES...

Programmable Shift Register With Programmable Load Location

SEMICONDUCTOR DEVICE AND SCAN TEST METHOD

RECONFIGURABLE SEMICONDUCTOR DEVICE

SYSTEM-ON-CHIP INCLUDING ON-CHIP CLOCK CONTROLLER AND MOBILE DEVICE...

SCAN CHAIN LATCH DESIGN THAT IMPROVES TESTABILITY OF INTEGRATED CIR...

System and method for optimized board test and configuration

FAULT DETECTION METHOD AND DEVICE

SECURE DIGEST FOR PLD CONFIGURATION DATA

JTAG-BASED PROGRAMMING AND DEBUG

MAGNETIC FIELD SENSING DEVICE

SIGNAL MANAGER

SYSTEMS AND METHODS FOR TESTING CIRCUITRY PROGRAMMABILITY

Optoelectronic Semiconductor Chip and Method for Adapting a Contact...

ON-CHIP IR DROP DETECTORS FOR FUNCTIONAL AND TEST MODE SCENARIOS, C...

MICRO-GRANULAR DELAY TESTING OF CONFIGURABLE ICS

METHOD AND APPARATUS FOR MINIMIZING SKEW BETWEEN SIGNALS

SEMICONDUCTOR VERIFICATION APPARATUS, METHOD AND PROGRAM

PROGRAMMABLE LOGIC DEVICE HAVING AN EMBEDDED TEST LOGIC WITH SECURE...

Micro-Granular Delay Testing of Configurable ICs

DEVICE AND METHOD FOR MONITORING AND USING INTERNAL SIGNALS IN A PR...

METHOD AND APPARATUS FOR DETECTING AND CORRECTING ERRORS IN A PARAL...

SEMICONDUCTOR DEVICE