Test trigger logic

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G11C29/46

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

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G11C29/46Test trigger logic

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Patents Grantslast 30 patents

Information Patent Grant
Indicating a status of a memory built-in self-test for multiple mem...
- Patent number 12,362,031
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Indicating a status of a memory built-in self-test using a data mas...
- Patent number 12,340,860
- Issue date Jun 24, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic devices related to compensation of monitoring signals
- Patent number 12,334,174
- Issue date Jun 17, 2025
- SK hynix Inc.
- Yoon Jae Shin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including sense amplifying circuit
- Patent number 12,315,579
- Issue date May 27, 2025
- SK Hynix Inc.
- Yeonsu Jang
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing a non-volatile memory
- Patent number 12,300,342
- Issue date May 13, 2025
- Infineon Technologies LLC
- Bogdan Georgescu
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit for detecting word line defect and semiconductor appar...
- Patent number 12,283,331
- Issue date Apr 22, 2025
- SK hynix Inc.
- Suk Hwan Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory BIST circuit and method
- Patent number 12,283,332
- Issue date Apr 22, 2025
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Vera detection method to catch erase fail
- Patent number 12,272,417
- Issue date Apr 8, 2025
- SanDisk Technologies, Inc.
- Parth Amin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and operation method thereof
- Patent number 12,266,395
- Issue date Apr 1, 2025
- Samsung Electronics Co., Ltd.
- Kyo-Gil Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test circuit for row hammering in memory
- Patent number 12,266,413
- Issue date Apr 1, 2025
- Synopsys, Inc.
- Grigor Tshagharyan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and test method of memory device
- Patent number 12,266,414
- Issue date Apr 1, 2025
- Samsung Electronics Co., Ltd.
- Jaewon Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit, test method and memory
- Patent number 12,254,941
- Issue date Mar 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jianyong Qin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, device, and circuit for high-speed memories
- Patent number 12,243,602
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Grant
Indicating a status of a memory built-in self-test
- Patent number 12,243,607
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Control method, semiconductor memory, and electronic device
- Patent number 12,230,348
- Issue date Feb 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yoonjoo Eom
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and information processing system for testing storage...
- Patent number 12,224,027
- Issue date Feb 11, 2025
- Kioxia Corporation
- Masayoshi Sato
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and memory system performing error corr...
- Patent number 12,224,026
- Issue date Feb 11, 2025
- SK Hynix Inc.
- Hong Ki Moon
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory testing system and memory testing method
- Patent number 12,217,815
- Issue date Feb 4, 2025
- NANYA TECHNOLOGY CORPORATION
- Chien Yu Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst indicator systems and methods
- Patent number 12,211,573
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory built-in self-test power fail mitigation
- Patent number 12,190,979
- Issue date Jan 7, 2025
- Intel Corporation
- Bill Nale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test method for testing decision feedback equalization of memory de...
- Patent number 12,176,051
- Issue date Dec 24, 2024
- NANYA TECHNOLOGY CORPORATION
- Yi-Hsuan Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory test circuit, memory array, and testing method of memory array
- Patent number 12,170,123
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory system with secure detection of virgin memory c...
- Patent number 12,154,643
- Issue date Nov 26, 2024
- NXP B.V.
- Soenke Ostertun
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing method and testing system
- Patent number 12,154,641
- Issue date Nov 26, 2024
- NANYA TECHNOLOGY CORPORATION
- Wei-Chun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for parallel memory test
- Patent number 12,142,337
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Nitesh Mishra
- G11 - INFORMATION STORAGE
Information Patent Grant
Read destructive memory wear leveling system
- Patent number 12,112,821
- Issue date Oct 8, 2024
- Seagate Technology LLC
- Jon D. Trantham
- G11 - INFORMATION STORAGE
Information Patent Grant
Repairable latch array
- Patent number 12,100,464
- Issue date Sep 24, 2024
- Advanced Micro Devices, Inc.
- Joel Thornton Irby
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for testing redundant fuse latches in a memory...
- Patent number 12,100,467
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-write method and apparatus for LEPS soft decoding estimation,...
- Patent number 12,088,323
- Issue date Sep 10, 2024
- Institute of Microelectronics, Chinese Academy of Sciences
- Qi Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic contact management systems and methods
- Patent number 12,079,819
- Issue date Sep 3, 2024
- LeadAssign Corporation
- Desmond Von Teichman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY BIST CIRCUIT AND METHOD
- Publication number 20250218524
- Publication date Jul 3, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BUILT-IN SELF-TEST (MBIST) AND BIST ADAPTIVE PORT (BAP) FOR...
- Publication number 20250218527
- Publication date Jul 3, 2025
- Intel Corporation
- Rakesh Kandula
- G11 - INFORMATION STORAGE
Information Patent Application
READ DISTURB CHARGE LOSS HANDLING
- Publication number 20250218528
- Publication date Jul 3, 2025
- Micron Technology, Inc.
- Murong Lang
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES
- Publication number 20250191669
- Publication date Jun 12, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh SHAH
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE AND OPERATING METHOD THEREOF
- Publication number 20250157559
- Publication date May 15, 2025
- SK HYNIX INC.
- Jung Sik Choi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TESTING SYSTEM AND MEMORY TESTING METHOD
- Publication number 20250131974
- Publication date Apr 24, 2025
- NANYA TECHNOLOGY CORPORATION
- Chien Yu CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE FOR CONTROLLING OPERATING POWER SUPPLIED TO WO...
- Publication number 20250124998
- Publication date Apr 17, 2025
- SK HYNIX INC.
- Byeong Cheol LEE
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES RELATED TO GENERATION OF INTERNAL COMMMANDS
- Publication number 20250124999
- Publication date Apr 17, 2025
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage Ramp Memory Calibration
- Publication number 20250104790
- Publication date Mar 27, 2025
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Application
READ DESTRUCTIVE MEMORY WEAR LEVELING SYSTEM
- Publication number 20250104793
- Publication date Mar 27, 2025
- SEAGATE TECHNOLOGY LLC
- Jon D. TRANTHAM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST CIRCUIT, MEMORY ARRAY, AND TESTING METHOD OF MEMORY ARRAY
- Publication number 20250095762
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER AND OUTPUT LATCH CIRCUIT FOR TESTING
- Publication number 20250087291
- Publication date Mar 13, 2025
- Taiwan Semiconductor Manufacturing company Ltd.
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING METHOD AND MEMORY MODULE UNDER TEST
- Publication number 20250046391
- Publication date Feb 6, 2025
- NANYA TECHNOLOGY CORPORATION
- Wei-Chun CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH MULTIPLE DATA RESOLUTIONS
- Publication number 20250037783
- Publication date Jan 30, 2025
- Western Digital Technologies, Inc.
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK GENERATION CIRCUITS FOR MEMORY DEVICES WITH BUILT-IN SELF TEST
- Publication number 20250022526
- Publication date Jan 16, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Che Tsai
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD FOR CALIBRATING IMPEDANCE THEREOF
- Publication number 20250022524
- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- YOUNGSAN KANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT
- Publication number 20250014667
- Publication date Jan 9, 2025
- ROHM CO., LTD.
- Daigo FUJIMURA
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCE
- Publication number 20250006288
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Jiahui Yuan
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION
- Publication number 20240420752
- Publication date Dec 19, 2024
- SK HYNIX INC.
- Woongrae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS
- Publication number 20240412803
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Qun Su
- G11 - INFORMATION STORAGE
Information Patent Application
RUNTIME ALERT SIGNAL ACTIVATION TEST MODE
- Publication number 20240404617
- Publication date Dec 5, 2024
- Intel Corporation
- Kuljit S. Bains
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...
- Publication number 20240404616
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR FORCING MEMORY CELL FAILURES IN A MEMOR...
- Publication number 20240395349
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN
- Publication number 20240363187
- Publication date Oct 31, 2024
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G11 - INFORMATION STORAGE
Information Patent Application
INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST FOR MULTIPLE MEM...
- Publication number 20240347125
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
INTERRUPTING A MEMORY BUILT-IN SELF-TEST
- Publication number 20240339170
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
Magnetic Memory Device
- Publication number 20240331796
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Hsiang CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
TEST METHOD FOR TESTING DECISION FEEDBACK EQUALIZATION OF MEMORY DE...
- Publication number 20240331791
- Publication date Oct 3, 2024
- NANYA TECHNOLOGY CORPORATION
- Yi-Hsuan Chu
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE ACCESS FOR GROUPED MEMORY DIES
- Publication number 20240321329
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH SLOW VOLTAGE RAMP COMPENSATION
- Publication number 20240321379
- Publication date Sep 26, 2024
- SANDISK TECHNOLOGIES LLC
- Sai Gautham Thoppa
- G11 - INFORMATION STORAGE

Test trigger logic

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Indicating a status of a memory built-in self-test for multiple mem...

Indicating a status of a memory built-in self-test using a data mas...

Electronic devices related to compensation of monitoring signals

Memory device including sense amplifying circuit

System and method for testing a non-volatile memory

Test circuit for detecting word line defect and semiconductor appar...

Memory BIST circuit and method

Vera detection method to catch erase fail

Memory device and operation method thereof

Built-in self-test circuit for row hammering in memory

Memory device and test method of memory device

Test circuit, test method and memory

Method, device, and circuit for high-speed memories

Indicating a status of a memory built-in self-test

Control method, semiconductor memory, and electronic device

Memory system and information processing system for testing storage...

Semiconductor memory device and memory system performing error corr...

Memory testing system and memory testing method

Burst indicator systems and methods

Dynamic random access memory built-in self-test power fail mitigation

Test method for testing decision feedback equalization of memory de...

Memory test circuit, memory array, and testing method of memory array

Non-volatile memory system with secure detection of virgin memory c...

Testing method and testing system

System and method for parallel memory test

Read destructive memory wear leveling system

Repairable latch array

Systems and methods for testing redundant fuse latches in a memory...

Read-write method and apparatus for LEPS soft decoding estimation,...

Dynamic contact management systems and methods

Patents Applicationslast 30 patents

MEMORY BIST CIRCUIT AND METHOD

MEMORY BUILT-IN SELF-TEST (MBIST) AND BIST ADAPTIVE PORT (BAP) FOR...

READ DISTURB CHARGE LOSS HANDLING

METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES

STORAGE DEVICE AND OPERATING METHOD THEREOF

MEMORY TESTING SYSTEM AND MEMORY TESTING METHOD

SEMICONDUCTOR DEVICE FOR CONTROLLING OPERATING POWER SUPPLIED TO WO...

SEMICONDUCTOR DEVICES RELATED TO GENERATION OF INTERNAL COMMMANDS

Voltage Ramp Memory Calibration

READ DESTRUCTIVE MEMORY WEAR LEVELING SYSTEM

MEMORY TEST CIRCUIT, MEMORY ARRAY, AND TESTING METHOD OF MEMORY ARRAY

SENSE AMPLIFIER AND OUTPUT LATCH CIRCUIT FOR TESTING

TESTING METHOD AND MEMORY MODULE UNDER TEST

NON-VOLATILE MEMORY WITH MULTIPLE DATA RESOLUTIONS

CLOCK GENERATION CIRCUITS FOR MEMORY DEVICES WITH BUILT-IN SELF TEST

MEMORY DEVICE AND METHOD FOR CALIBRATING IMPEDANCE THEREOF

MEMORY CIRCUIT

NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCE

SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION

REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS

RUNTIME ALERT SIGNAL ACTIVATION TEST MODE

SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...

APPARATUSES AND METHODS FOR FORCING MEMORY CELL FAILURES IN A MEMOR...

AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN

INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST FOR MULTIPLE MEM...

INTERRUPTING A MEMORY BUILT-IN SELF-TEST

Magnetic Memory Device

TEST METHOD FOR TESTING DECISION FEEDBACK EQUALIZATION OF MEMORY DE...

SELECTIVE ACCESS FOR GROUPED MEMORY DIES

NON-VOLATILE MEMORY WITH SLOW VOLTAGE RAMP COMPENSATION