Test trigger logic

Industry

CPC
G11C29/46

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/46Test trigger logic

Industries

Patents Grantslast 30 patents

Information Patent Grant
Burst indicator systems and methods
- Patent number 12,211,573
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory built-in self-test power fail mitigation
- Patent number 12,190,979
- Issue date Jan 7, 2025
- Intel Corporation
- Bill Nale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test method for testing decision feedback equalization of memory de...
- Patent number 12,176,051
- Issue date Dec 24, 2024
- NANYA TECHNOLOGY CORPORATION
- Yi-Hsuan Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory test circuit, memory array, and testing method of memory array
- Patent number 12,170,123
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory system with secure detection of virgin memory c...
- Patent number 12,154,643
- Issue date Nov 26, 2024
- NXP B.V.
- Soenke Ostertun
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing method and testing system
- Patent number 12,154,641
- Issue date Nov 26, 2024
- NANYA TECHNOLOGY CORPORATION
- Wei-Chun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for parallel memory test
- Patent number 12,142,337
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Nitesh Mishra
- G11 - INFORMATION STORAGE
Information Patent Grant
Read destructive memory wear leveling system
- Patent number 12,112,821
- Issue date Oct 8, 2024
- Seagate Technology LLC
- Jon D. Trantham
- G11 - INFORMATION STORAGE
Information Patent Grant
Repairable latch array
- Patent number 12,100,464
- Issue date Sep 24, 2024
- Advanced Micro Devices, Inc.
- Joel Thornton Irby
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for testing redundant fuse latches in a memory...
- Patent number 12,100,467
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-write method and apparatus for LEPS soft decoding estimation,...
- Patent number 12,088,323
- Issue date Sep 10, 2024
- Institute of Microelectronics, Chinese Academy of Sciences
- Qi Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic contact management systems and methods
- Patent number 12,079,819
- Issue date Sep 3, 2024
- LeadAssign Corporation
- Desmond Von Teichman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indicating a status of a memory built-in self-test for multiple mem...
- Patent number 12,051,477
- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing disruptive memories
- Patent number 12,051,476
- Issue date Jul 30, 2024
- NXP USA, INC.
- Timothy Strauss
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory built-in self-test with automated reference trim feedback fo...
- Patent number 12,046,315
- Issue date Jul 23, 2024
- SIEMENS INDUSTRY SOFTWARE INC.
- Jongsin Yun
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with autonomous cycling
- Patent number 12,040,031
- Issue date Jul 16, 2024
- Western Digital Technologies, Inc.
- Liang Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetic memory device
- Patent number 12,040,036
- Issue date Jul 16, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chia-Hsiang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Interrupting a memory built-in self-test
- Patent number 12,040,037
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for generating command sequence, method and devic...
- Patent number 12,040,030
- Issue date Jul 16, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yu Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective access for grouped memory dies
- Patent number 12,009,050
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Detection of an incorrectly located read voltage
- Patent number 12,009,040
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and devices for flexible RAM loading
- Patent number 11,984,178
- Issue date May 14, 2024
- STMicroelectronics S.r.l.
- Gabriele Solcia
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for fault-resilient system management random ac...
- Patent number 11,984,183
- Issue date May 14, 2024
- Dell Products L.P.
- Balasingh P. Samuel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling or disabling on-die error-correcting code for a memory bui...
- Patent number 11,984,180
- Issue date May 14, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor apparatus related to a test function
- Patent number 11,967,389
- Issue date Apr 23, 2024
- SK hynix Inc.
- Seon Woo Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing multicore SSD firmware based on preco...
- Patent number 11,967,391
- Issue date Apr 23, 2024
- SK Hynix Inc.
- Yahor Zaitsau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for testing failure of memory, storage medium,...
- Patent number 11,967,392
- Issue date Apr 23, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Chenggong Zhou
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing of on-chip analog-mixed signal circuits using on-chip memory
- Patent number 11,961,577
- Issue date Apr 16, 2024
- NXP USA, INC.
- Kumar Abhishek
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing circuit, testing device and testing method thereof
- Patent number 11,948,650
- Issue date Apr 2, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Liang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed phased SRAM repair for systems on a chip
- Patent number 11,948,654
- Issue date Apr 2, 2024
- Meta Platforms Technologies, LLC
- Shrirang Madhav Yardi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE MEMORY WITH MULTIPLE DATA RESOLUTIONS
- Publication number 20250037783
- Publication date Jan 30, 2025
- Western Digital Technologies, Inc.
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK GENERATION CIRCUITS FOR MEMORY DEVICES WITH BUILT-IN SELF TEST
- Publication number 20250022526
- Publication date Jan 16, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Che Tsai
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD FOR CALIBRATING IMPEDANCE THEREOF
- Publication number 20250022524
- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- YOUNGSAN KANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT
- Publication number 20250014667
- Publication date Jan 9, 2025
- ROHM CO., LTD.
- Daigo FUJIMURA
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCE
- Publication number 20250006288
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Jiahui Yuan
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION
- Publication number 20240420752
- Publication date Dec 19, 2024
- SK HYNIX INC.
- Woongrae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS
- Publication number 20240412803
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Qun Su
- G11 - INFORMATION STORAGE
Information Patent Application
RUNTIME ALERT SIGNAL ACTIVATION TEST MODE
- Publication number 20240404617
- Publication date Dec 5, 2024
- Intel Corporation
- Kuljit S. Bains
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...
- Publication number 20240404616
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR FORCING MEMORY CELL FAILURES IN A MEMOR...
- Publication number 20240395349
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN
- Publication number 20240363187
- Publication date Oct 31, 2024
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G11 - INFORMATION STORAGE
Information Patent Application
INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST FOR MULTIPLE MEM...
- Publication number 20240347125
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
INTERRUPTING A MEMORY BUILT-IN SELF-TEST
- Publication number 20240339170
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
Magnetic Memory Device
- Publication number 20240331796
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Hsiang CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
TEST METHOD FOR TESTING DECISION FEEDBACK EQUALIZATION OF MEMORY DE...
- Publication number 20240331791
- Publication date Oct 3, 2024
- NANYA TECHNOLOGY CORPORATION
- Yi-Hsuan Chu
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE ACCESS FOR GROUPED MEMORY DIES
- Publication number 20240321329
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH SLOW VOLTAGE RAMP COMPENSATION
- Publication number 20240321379
- Publication date Sep 26, 2024
- SANDISK TECHNOLOGIES LLC
- Sai Gautham Thoppa
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY PACKAGE, STORAGE DEVICE INCLUDING THE SAME, AND...
- Publication number 20240312551
- Publication date Sep 19, 2024
- Samsung Electronics Co., Ltd.
- Anil Kavala
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC DEVICES RELATED TO COMPENSATION OF MONITORING SIGNALS
- Publication number 20240304272
- Publication date Sep 12, 2024
- SK HYNIX INC.
- Yoon Jae SHIN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE FOR DETECTING DEFECT IN WORD LINE DRIVER
- Publication number 20240290415
- Publication date Aug 29, 2024
- SK HYNIX INC.
- Byeong Cheol LEE
- G11 - INFORMATION STORAGE
Information Patent Application
ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...
- Publication number 20240274216
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING SENSE AMPLIFYING CIRCUIT
- Publication number 20240233851
- Publication date Jul 11, 2024
- Yeonsu JANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER, AN OPERATION METHOD THEREOF, A MEMORY DEVICE, AN...
- Publication number 20240212782
- Publication date Jun 27, 2024
- Samsung Electronics Co., Ltd.
- Changho YUN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND OPERATING METHOD T...
- Publication number 20240212776
- Publication date Jun 27, 2024
- Samsung Electronics Co., Ltd.
- Jongpil SON
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR TESTING A NON-VOLATILE MEMORY
- Publication number 20240212781
- Publication date Jun 27, 2024
- Infineon Technologies LLC
- Bogdan Georgescu
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY SYSTEM WITH SECURE DETECTION OF VIRGIN MEMORY C...
- Publication number 20240203518
- Publication date Jun 20, 2024
- NXP B.V.
- Soenke Ostertun
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING METHOD AND TESTING SYSTEM
- Publication number 20240177790
- Publication date May 30, 2024
- NANYA TECHNOLOGY CORPORATION
- Wei-Chun CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
COUNTER-BASED SENSE AMPLIFIER METHOD FOR MEMORY CELLS
- Publication number 20240177792
- Publication date May 30, 2024
- Micron Technology, Inc.
- Riccardo Muzzetto
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BIST CIRCUIT AND METHOD
- Publication number 20240170083
- Publication date May 23, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
VERA DETECTION METHOD TO CATCH ERASE FAIL
- Publication number 20240161858
- Publication date May 16, 2024
- SANDISK TECHNOLOGIES LLC
- Parth Amin
- G11 - INFORMATION STORAGE

Test trigger logic

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Burst indicator systems and methods

Dynamic random access memory built-in self-test power fail mitigation

Test method for testing decision feedback equalization of memory de...

Memory test circuit, memory array, and testing method of memory array

Non-volatile memory system with secure detection of virgin memory c...

Testing method and testing system

System and method for parallel memory test

Read destructive memory wear leveling system

Repairable latch array

Systems and methods for testing redundant fuse latches in a memory...

Read-write method and apparatus for LEPS soft decoding estimation,...

Dynamic contact management systems and methods

Indicating a status of a memory built-in self-test for multiple mem...

Testing disruptive memories

Memory built-in self-test with automated reference trim feedback fo...

Non-volatile memory with autonomous cycling

Magnetic memory device

Interrupting a memory built-in self-test

Method and device for generating command sequence, method and devic...

Selective access for grouped memory dies

Detection of an incorrectly located read voltage

Methods and devices for flexible RAM loading

Systems and methods for fault-resilient system management random ac...

Enabling or disabling on-die error-correcting code for a memory bui...

Semiconductor apparatus related to a test function

System and method for testing multicore SSD firmware based on preco...

Method and apparatus for testing failure of memory, storage medium,...

Testing of on-chip analog-mixed signal circuits using on-chip memory

Testing circuit, testing device and testing method thereof

Distributed phased SRAM repair for systems on a chip

Patents Applicationslast 30 patents

NON-VOLATILE MEMORY WITH MULTIPLE DATA RESOLUTIONS

CLOCK GENERATION CIRCUITS FOR MEMORY DEVICES WITH BUILT-IN SELF TEST

MEMORY DEVICE AND METHOD FOR CALIBRATING IMPEDANCE THEREOF

MEMORY CIRCUIT

NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCE

SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION

REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS

RUNTIME ALERT SIGNAL ACTIVATION TEST MODE

SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...

APPARATUSES AND METHODS FOR FORCING MEMORY CELL FAILURES IN A MEMOR...

AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN

INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST FOR MULTIPLE MEM...

INTERRUPTING A MEMORY BUILT-IN SELF-TEST

Magnetic Memory Device

TEST METHOD FOR TESTING DECISION FEEDBACK EQUALIZATION OF MEMORY DE...

SELECTIVE ACCESS FOR GROUPED MEMORY DIES

NON-VOLATILE MEMORY WITH SLOW VOLTAGE RAMP COMPENSATION

NONVOLATILE MEMORY PACKAGE, STORAGE DEVICE INCLUDING THE SAME, AND...

ELECTRONIC DEVICES RELATED TO COMPENSATION OF MONITORING SIGNALS

SEMICONDUCTOR DEVICE FOR DETECTING DEFECT IN WORD LINE DRIVER

ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...

MEMORY DEVICE INCLUDING SENSE AMPLIFYING CIRCUIT

MEMORY CONTROLLER, AN OPERATION METHOD THEREOF, A MEMORY DEVICE, AN...

MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND OPERATING METHOD T...

SYSTEM AND METHOD FOR TESTING A NON-VOLATILE MEMORY

NON-VOLATILE MEMORY SYSTEM WITH SECURE DETECTION OF VIRGIN MEMORY C...

TESTING METHOD AND TESTING SYSTEM

COUNTER-BASED SENSE AMPLIFIER METHOD FOR MEMORY CELLS

MEMORY BIST CIRCUIT AND METHOD

VERA DETECTION METHOD TO CATCH ERASE FAIL